Abstract: In a magnetic recording writing circuit, a current having a higher level than a write current is supplied for a period of time during rise and fall of the write current, and a current having a lower level than the write current is supplied for a period of time during overshoot at the rise and fall of the write current. Accordingly, the write current can recover quickly from overshoot.

Abstract: Includes first and second current mirror circuits, an N channel transistor connected to an output terminal of the second current mirror circuit, an npn transistor connected to an output terminal of the first current mirror circuit and the N channel transistor, and an operational transistor connected to a node between the second current circuit and the N channel transistor. Current that flow from the second current mirror circuit to the N channel transistor and from the N channel transistor to the npn transistor have different temperature coefficients. The operational amplifier corrects the difference in the temperature coefficients of these currents to output a voltage of ground electric potential standard.

Abstract: An H-type bridge circuit includes four transistors, two resistors, and a write head. A write current supplied from a current supply circuit including a first of the transistors and resistors flows through the write head and is received in a current receiving circuit including a second of the resistors and a fourth of the transistors, and another write current supplied from a current supply circuit including the second of the transistors and the second resistor flows through the write head and is received in a current receiving circuit including the first of the resistors and the third of the transistors. Impedance of the write head matches an output impedance of the current supply circuit and matches an input impedance of the current receiving circuit.

Abstract: Magneto-resistive (MR) head pre-amplifiers for single polarity power supply applications are presented. An exemplary pre-amplifier includes a bias network coupled to first and second input terminals of the pre-amplifier, the input terminals for receiving signals corresponding to variations in magnetic fields from an MR head. At least one gain stage having first and second input terminals and first and second output terminals for amplifying the received signals is included. A pair of coupling capacitors, each capacitor being connected between a respective input terminal of the pre-amplifier and a corresponding respective input terminal of the at least one gain stage, are further included in the pre-amplifier design. Finally, the exemplary pre-amplifier includes a pair of feedback capacitors, each capacitor being connected between respective input and output terminals of the at least one gain stage. The pre-amplifier is powered by a single polarity power supply.

Abstract: An N-transistor switches a current of a first constant current source by a positive input pulse to generate an output pulse current where an overshoot and an undershoot appear. A P-transistor switches a current of a second constant current source by a negative correction pulse applied at timing of occurrence of the overshoot to generate a correction pulse current. Another N-transistor switches a current of a third constant current source by a positive correction pulse applied at timing of occurrence of the undershoot to generate a correction pulse current. These correction pulse currents are added to the output pulse current to obtain a current as a wavelength where the overshoot and undershoot are largely reduced.

Abstract: An H-type bridge circuit having transistors Tr1 to Tr4, resistors R1 and R2 and a write head is disposed. A write current supplied from a current supply circuit having the transistor Tr1 and the resistor R1 flows through the write head and is received in a current receiving circuit having the resistor R2 and the transistor Tr4, and another write current supplied from a current supply circuit having the transistor Tr2 and the resistor R2 flows through the write head and is received in a current receiving circuit having the resistor R1 and the transistor Tr3. An impedance of the write head matches with an output impedance of the current supply circuit and matches with an input impedance of the current receiving circuit.

Abstract: The current bias circuit used in a magnetic-signal detection head includes an amplifier that generates a bias current control voltage based on a reference current which regulates the bias current. A bias current I supplied to a MR head is controlled based on this control voltage. The current bias circuit is also provided with a control voltage changing unit that includes a current source and a switch. This control voltage changing unit changes a value of the control voltage without changing the reference current.

Abstract: In the magnetic record writing circuit, an arrangement is provided such that, a current having a higher level than a level of a write current is supplied for a desired period of time during rise and fall of the write current, and a current having a lower level than the level of the write current is supplied for a desired period of time during overshoot at the rise and fall of the write current. Accordingly, the write current can be recovered quickly from the overshoot.

Abstract: In an optical information reproduction method and apparatus with a tracking servo system using a tracking error signal in the phase difference method, the effect of the offset which varies depending on the pit depth and the lens position can be corrected and a tracking error detecting means free from the offset can be obtained. To this end, the phase comparison means are made to receive a certain set of input signals during the offset correction, and a different set of input signals during the tracking error signal detection. The offset in the tracking error signal which varies depending on the pit depth and the lens position is obtained as a voltage value, and through repeated learning control, this offset is corrected.

Abstract: In an optical information reproduction device for reproducing information from an optical disk medium on which an identification information area including first identification information shifted radially outward with respect to the center of a recording track by a specified distance and second identification information shifted radially inward with respect to the center of a recording track by a specified distance, and a user information area disposed along the center of a recording track are disposed, information is reproduced using a sum signal and a difference signal of the outputs from a split photodetector having at least two light-receiving parts disposed on opposite sides of a track tangential line. The first or second identification information signal is inverted and the direct-current component in the identification information signal and the user information signal are removed.

Abstract: Emitters of a first NPN transistor and a second NPN transistor forming a differential input section are respectively connected to collectors of a third NPN transistor and a fourth NPN transistor; the collectors and bases of the third NPN transistor and the fourth NPN transistor are respectively connected through first and second capacitors; and the bases of the third NPN transistor and the fourth NPN transistor are respectively connected to a first reference power source through first and second resistors.

Abstract: In the bias circuit of a magneto-resistive element signal amplifying circuit, a favorable high frequency characteristic is obtained by suppressing the influence of a parasitic capacitance that is generated. Furthermore, noise is removed by a lowpass filter including a resistor and a capacitor having a relatively small size in an integrated circuit.

Abstract: A signal amplifying circuit has a differential amplifying circuit, a capacitor and a voltage follower. This circuit takes as input signal the signals outputted from the two terminals of an MR element to which a bias electric current is supplied, and amplifies and outputs the difference in input signals from output terminals. One input terminal of this circuit is connected directly with one of the terminals of the MR element. A capacitor connects the other input terminal of this circuit with the another terminal of the MR element. The two input terminals of this circuit are connected respectively with a non-inverting input terminal and an inverting input terminal of the voltage follower. The voltage follower provides an output to an input terminal of this circuit via a resistance.

Abstract: A signal amplifying circuit for an MR element in which a first terminal of a selected MR element is connected to input of an amplifier through a first resistor as well as to a second input of the amplifier through a second resistor, and a second terminal of the MR element is connected to the input of the amplifier through a capacitor. The effect of an offset voltage generated in the MR element can be suppressed to minimum with a simple configuration.

Abstract: A write current driving circuit in which drains of the transistors A1 and B1 are commonly connected to the base of the transistor T1, drains of the transistors C1 and D1 are commonly connected to the base of the transistor T2, inverted signal of the input signal into the transistors C1 and D1 is inputted into the transistors A1 and B1. Therefore, the transistors T1 and T2 can speedily be switched ON/OFF with suppressed power consumption. Transistors A2, C2 and transistors B2, D2 are connected in parallel with the transistors A1, C1 and NMOS transistors B1, D1 respectively, and the transistors A2, C2, B2, and D2 are turned ON only for a specified period of time immediately after the transistors T1 and T2 are switched ON/OFF.

Abstract: A MR head amplifier of the present invention prevents a base potential of a transistor which supplies a current to a MR element from changing in a moment when the MR element changes from a write-state to a read-state. The MR head amplifier includes a loop amplifier that has a non-inverted input terminal connected to one end of a first transistor which supplies a current to a MR element and an inverted input terminal connected to one end of a second transistor which is supplied with a constant current through a constant current source. An output terminal of the loop amplifier is feedback to a base terminal of the first transistor via a first switch and one end of a capacitor whose other end is connected to a ground is connected to an output terminal of the first switch. The loop amplifier includes a second switch connected between the output terminal of the first switch and the base terminal of the first transistor, the second switch being closed during read-state and opened during write-state.

Abstract: An amplifier for an MR head comprises a means for switching cut-off frequencies of a plurality of lowpass filters, when a data signal superposed by a disturbance signal (a composite signal) is input from an MR head, a means for extracting the disturbance signal from the composite signal, a means for adding the extracted disturbance signal to the composite signal. Accordingly, it possible to obtain a data signal less influenced and less distorted even if a disturbance signal appears.

Abstract: A signal reproduction circuit used for an MR head has a simple circuit configuration to suppress a disturbance signal caused by the contact between the MR head and a disk, and to remove the ripples completely from the reproduced signal. The signal reproduction circuit used for the MR head includes a first circuit for generating a switching signal in accordance with a disturbance signal extracted from an input data signal, a second circuit including a filter circuit and a switching circuit, the filter having a first and a second cut-off frequency, the switching circuit for switching either the first of second cut-off frequency for outputting an un-suppressed data signal and a suppressed disturbance signal.

Abstract: A current switching circuit in an integrated semiconductor circuit includes a load connected to a positive power supply; a first pnp bipolar transistor having a collector electrode connected to the load, and a base electrode connected to a DC bias source and an emitter electrode; and a first n channel MOS transistor having a drain electrode connected to the emitter electrode of the first npn bipolar transistor, a source electrode connected to the ground, and a gate electrode connected to an input terminal, the first MOS transistor turning on and off in response to a voltage applied to the input terminal.

Abstract: A single end input type high frequency amplifier of the present invention decreases noise superposed on a power supply of a pre-amplifier in a read amplifier which amplifies a signal from MR head. The single end input type high frequency amplifier includes a transistor connected to an input side terminal of a differential input amplifier. A single end type resistor is connected to the transistor and a loop amplifier is connected to the single end type resistor to feedback a difference voltage between a reference side terminal and an input side terminal of the differential input amplifier.