Patents by Inventor Takeo Yasuda

Takeo Yasuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020167264
    Abstract: A compact self-ballasted fluorescent lamp (10) which is equivalent to a typical light bulb is provided.
    Type: Application
    Filed: June 26, 2002
    Publication date: November 14, 2002
    Applicant: Toshiba Lighting & Technology Corp.
    Inventors: Kiyoshi Nishio, Toshiya Tanaka, Takayuki Fujita, Takeo Yasuda
  • Publication number: 20020167263
    Abstract: A compact self-ballasted fluorescent lamp (10) which is equivalent to a typical light bulb is provided.
    Type: Application
    Filed: June 26, 2002
    Publication date: November 14, 2002
    Applicant: Toshiba Lighting & Technology Corp.
    Inventors: Kiyoshi Nishio, Toshiya Tanaka, Takayuki Fujita, Takeo Yasuda
  • Patent number: 6437502
    Abstract: A compact self-ballasted fluorescent lamp (10) which is equivalent to a typical light bulb is provided. The self-ballasted fluorescent lamp (10) includes a cover (14), a lighting circuit (16), an arc tube (18), a base (12) and a globe (17) and formed into a shape whose outline dimensions are nearly identical to the standard dimensions of a typical light bulb. The arc tube (18) is comprised of a plurality of U-shaped bent bulbs (31) which have an inner tube diameter ranging from 6 to 9 min and arranged in parallel with one another. Having a bulb height -ranging from 50 to 60 mm and a discharge path from 200 to 300 mm long, the arc tube (18) is designed such that the total luminous flux is not less than 700 1m with a lamp efficiency of not less than 60 lm/W when the lamp is lit at the lamp power of 7 to 15 W, An envelope (19) comprising the cover (14) and the globe (17) has a height ranging from 110 to 125 mm including the height of the base (12).
    Type: Grant
    Filed: February 11, 1999
    Date of Patent: August 20, 2002
    Assignee: Toshiba Lighting & Technology Corp.
    Inventors: Kiyoshi Nishio, Toshiya Tanaka, Takayuki Fujita, Takeo Yasuda
  • Publication number: 20020109462
    Abstract: A compact self-ballasted fluorescent lamp (10) which is equivalent to a typical light bulb is provided
    Type: Application
    Filed: November 28, 2001
    Publication date: August 15, 2002
    Applicant: Toshiba Lighting & Technology Corp.
    Inventors: Kiyoshi Nishio, Toshiya Tanaka, Takayuki Fujita, Takeo Yasuda
  • Patent number: 6417615
    Abstract: A compact self-ballasted fluorescent lamp (10) which is equivalent to a typical light bulb is provided. The self-ballasted fluorescent lamp (11) induces a cover (14), a ballast (16), an arc tube (18), a base (12) and a globe (17) and formed into a shape whose outline dimensions are nearly identical to the standard dimensions of a typical light bulb. The arc tube (18) is comprised of a plurality of U-shaped bent bulbs (31) which have an inner tube diameter ranging from 6 to 9 mm and arranged in parallel with one another. Having a bulb height ranging form 50 to 60 mm and a discharge path from 400 to 500 mm, the lamp power is 16 to 23 W. An envelope (19) comprising the cover (14)and the globe (17) has a height ranging from 110 to 125 mm including the height of the base (12).
    Type: Grant
    Filed: December 27, 1999
    Date of Patent: July 9, 2002
    Assignee: Toshiba Lighting & Technology Corporation
    Inventors: Takeo Yasuda, Mamoru Ikeda, Junji Hasegawa, Hidenori Ito, Fuminori Nakaya, Yusuke Shibahara, Toshiyuki Ikeda, Takayuki Fujita
  • Patent number: 6259300
    Abstract: A differential input interface circuit includes a reference level generation stage generating a DC level that coincides with the DC level within the system; capacitors for cutting-off the DC level of the differential input signals; resistors for matching the average of the non-inverting phase signal and the inverting phase signal of the differential input signals from which the DC levels have been cut-off on the output DC level generated by the reference level generation stage. Thus, a differential input interface circuit make it possible to match the DC level of differential inputs to the DC level within a system which is responsive to the differential inputs.
    Type: Grant
    Filed: January 3, 2000
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Takeo Yasuda, Naohisa Hatani
  • Patent number: 6246653
    Abstract: A method and apparatus for reducing the effect of inter-wave interference on signals read from a storage medium and to precisely digitize the read signals are described. An apparatus for digitizing a signal read from a storage medium according to an embodiment of the invention, comprises: a peak detector, for detecting a peak value for an amplitude of a signal read from the storage medium; a threshold value determiner, for employing the peak value obtained by the peak detector to determine a compensation value that is used for compensating for the effect of inter-wave interference on the signal, and for employing the threshold value calculated by the conventional method and the compensation value to determine a compensated threshold value; and a digitization circuit, for digitizing the signal by using the threshold value determined by the threshold value determiner. Optionally an interpolator may be used to obtain more accurate peak values which occur between sample points.
    Type: Grant
    Filed: December 11, 1998
    Date of Patent: June 12, 2001
    Assignee: International Business Machines Corporation
    Inventors: Toshio Kanai, Takeo Yasuda, Kazuhiro Tsuruta, Wataru Ichihara
  • Patent number: 6229774
    Abstract: A PLL circuit and a phase locking method for rapidly phase locking a sample signal to a target clock. The phase locked loop (PLL) circuit comprises: a voltage controlled oscillator; an error correction logic circuit for determining a phase difference between a signal output by the voltage controlled oscillator and a target signal; and a controllable variable delay circuit for determining a delay of the signal output of the voltage controlled oscillator instantly on the basis of an initial phase difference that is determined by the error correction logic circuit.
    Type: Grant
    Filed: January 21, 1999
    Date of Patent: May 8, 2001
    Assignee: International Business Machines Corporation
    Inventor: Takeo Yasuda
  • Patent number: 6175282
    Abstract: A method is disclosed for calibrating the oscillation frequency versus control voltage characteristic of a voltage controlled oscillator (VCO). The method includes establishing an oscillation frequency of the VCO at a maximum target frequency value ft_H (point Q) when the control voltage Vc equals a predetermined reference voltage Vref which lies within the operating range of the control voltage Vc, and verifying that the oscillation frequency becomes a minimum target frequency value ft_L when the control voltage Vc is changed to a value between the minimum value Vclamp_L and the reference voltage Vref. An automatically calibrated PLL circuit including a VCO is disclosed which performs a calibration to set the oscillation frequency versus control voltage characteristic of the VCO.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: January 16, 2001
    Assignee: International Business Machines Corporation
    Inventor: Takeo Yasuda
  • Patent number: 6089749
    Abstract: A byte synchronization detection system and method in which a vector subtractor circuit determines an error vector between a current read data pattern and a synchronization bit pattern, and an offset adder circuit determines a Hamming Distance of the next read data pattern by adding the difference between the Hamming Distance from current error vector to the synchronization bit pattern and the Hamming Distance from the next error vector to the synchronization bit pattern. The Hamming Distance is determined by selected elements of the error vector which are the output from the vector subtractor circuit. The offset adder circuit determines a difference between the Hamming Distance of the current read data pattern and of the next read data pattern. The synchronization bit pattern is between 16 and 18 bits in length, inclusive.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: July 18, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mario Blaum, Denny Duan-lee Tang, Takeo Yasuda
  • Patent number: 5828170
    Abstract: A fluorescent lamp unit includes a fluorescent lamp having a bulb constituting one discharge path, said bulb including three U-shaped tube portions, a lighting circuit operatively connected to the fluorescent lamp for lighting the fluorescent lamp, and a cover part having a cap at one end thereof and having a globe at other end thereof for containing the lighting circuit and the fluorescent lamp. Each of the three U-shaped tube portions has a pair of straight tube portions provided straight in a direction along to a basic center axis of the fluorescent lamp unit and has a bent portion being bent so as to be convexly curved toward the globe side opposite to the cap side thereby to form substantially U-shape and linking the glove side ends of the pair of straight tube portions. The straight tube portions are arranged equidistantly on a circumference of a certain radius from the basic center axis.
    Type: Grant
    Filed: September 20, 1996
    Date of Patent: October 27, 1998
    Assignee: Toshiba Lighting & Technology Corporation
    Inventors: Kiyoshi Nishio, Kazuhisa Ogishi, Takeo Yasuda, Toshiya Tanaka
  • Patent number: 5821795
    Abstract: An analog front end for signal processing circuit such as a hard-disk data read channel having a calibration circuit for canceling DC offset is described. First, the DC offset is cancelled from a positive phase input to an A/D converter (ADC). Second, a DC offset is cancelled separately from a negative phase input to the A/D converter. The combined positive and negative phases form an amplified analog signal that is used as the differential input to the A/D converter. Finally, the DC offset in a path that encompasses the system analog input through the system digital output is cancelled. Controlling the buffer amplifier bias makes trimming unnecessary. It also enables faster calibration. Further, the two differential phase lines, i.e., the positive phase line and the negative phase line, are each calibrated in turn. As such, a common calibration circuit may be used, thereby avoiding circuit duplication.
    Type: Grant
    Filed: February 11, 1997
    Date of Patent: October 13, 1998
    Assignee: International Business Machines Corporation
    Inventors: Takeo Yasuda, Hajime Andoh
  • Patent number: 5629586
    Abstract: A compact fluorescent lamp unit has a phosphor coated bulb of which first and second sealed end portions. A pair of filaments is disposed in the bulb. The filament contains an emitter for enhancing thermionic emission of electrons therefrom and is caused to be cut off by the self-generated heat when the emitter is substantially dissipated. The lamp device has an inverter circuit containing a resonant capacitor disposed between each one end of the filament coils to pass a resonant current through the capacitor during the operation of the lamp. The filament coil is substantially composed of a tungsten wire having a diameter corresponding to 8 MG though 12 MG and is normally operated with a lamp current ranging from 250 mA to 350 mA. The filament coil has a cold resistance ranging from 2 .OMEGA. to 4 .OMEGA. and an output voltage of the inverter circuit exhibits more than 260 volts when the fluorescent lamp is substituted by a resistor having 5 .OMEGA..
    Type: Grant
    Filed: June 29, 1995
    Date of Patent: May 13, 1997
    Assignee: Toshiba Lighting and Technology Corporation
    Inventors: Takeo Yasuda, Kenichi Asami
  • Patent number: 5252890
    Abstract: Opposite ends of the bent arc bulb of a compact type fluorescent lamp having a relatively long crooked arc path are loosely supported by the base through holes, respectively. Each hole has an outer distance formed between the outer side surface of the end portion of the arc bulb and the edge of the hole greater than the inner distance defined between the inner side surface of the end portion of the arc bulb and the edge of the hole when the lamp is not operated. Each outer distance allows the outward movement of the corresponding end portions of the arc bulb over a variable moving distance under the influence of heat when the lamp is operated.
    Type: Grant
    Filed: August 10, 1992
    Date of Patent: October 12, 1993
    Assignee: Toshiba Lighting and Technology Corporation
    Inventor: Takeo Yasuda
  • Patent number: 5138223
    Abstract: In a fluorescent lamp, a curved discharge path is constituted by a plurality of bulbs and a cap interconnecting end portions of the bulbs. Terminal electrodes are provided at end portions of the bulbs, which are situated at both ends of the discharge path. An intermediate electrode is arranged within the cap. A voltage is applied selectively between the intermediate electrode and the terminal electrodes, thereby selectively enabling the bulbs to emit light. The bulbs may have apertures having different widths and positions. Different types of phosphor layers may be formed on the inner surfaces of the bulbs, thereby selectively emitting light of different wavelengths.
    Type: Grant
    Filed: June 15, 1990
    Date of Patent: August 11, 1992
    Assignee: Toshiba Lighting & Technology Corporation
    Inventors: Kimio Osada, Takeo Yasuda
  • Patent number: 4384936
    Abstract: Electrochemical method for determining the concentration of a carbon source and L-amino acid in a fermentation medium or cultured broth by contacting a microbial electrode consisting of an oxygen-sensitive electrode or a carbon dioxide gas-sensitive electrode combined with fixed microbial cells of a microorganism capable of assimilating said carbon source or decarboxylating said L-amino acid with a sample solution and sensing electrically the rate of current decrease which is caused by the consumed oxygen in the solution in proportion to the concentration of carbon source; or the electric motive force which is caused by the liberation of carbon dioxide in the sample solution in proportion to the concentration of L-amino acid. Microbial electrodes and systems useful in carrying out the aforementioned method are disclosed.
    Type: Grant
    Filed: February 24, 1981
    Date of Patent: May 24, 1983
    Assignee: Ajinomoto Company, Incorporated
    Inventors: Haruo Obana, Tadashi Shirakawa, Motohiko Hikuma, Takeo Yasuda, Isao Karube, Shuichi Suzuki
  • Patent number: 4299669
    Abstract: Electrochemical method for determining the concentration of a carbon source and L-amino acid in a fermentation medium or cultured broth by contacting a microbial electrode consisting of an oxygen-sensitive electrode or a carbon dioxide gas-sensitive electrode combined with fixed microbial cells of a micro-organism capable of assimilating said carbon source or decarboxylating said L-amino acid with a sample solution and sensing electrically the rate of current decrease which is caused by the consumed oxygen in the solution in proportion to the concentration of carbon source; or the electric motive force which is caused by the liberation of carbon dioxide in the sample solution in proportion to the concentration of L-amino acid. Microbial electrodes and systems useful in carrying out the aforementioned method.
    Type: Grant
    Filed: March 27, 1979
    Date of Patent: November 10, 1981
    Assignee: Ajinomoto Company, Incorporated
    Inventors: Haruo Obana, Tadashi Shirakawa, Motohiko Hikuma, Takeo Yasuda, Isao Karube, Shuichi Suzuki
  • Patent number: 4297173
    Abstract: The concentration of ammonia in an aqueous liquid is determined by contacting a sample of the liquid with dissolved oxygen and with a microbial electrode comprising an oxygen-sensitive electrode, a porous membrane, and nitrifying bacteria confined or immobilised by the membrane which are in direct or close contact with the diaphragm of the electrode. The rate of oxygen consumption under otherwise uniform conditions is as precise a measure of concentration of ammonia as a conventional colorimetric method and distillation-titration method.
    Type: Grant
    Filed: May 22, 1980
    Date of Patent: October 27, 1981
    Assignee: Ajinomoto Company, Incorporated
    Inventors: Motohiko Hikuma, Tatsuru Kubo, Takeo Yasuda, Isao Karube, Shuichi Suzuki