Abstract: A drain pan includes: a drain pan unit that includes a horizontal water receiving unit and a vertical water receiving unit intersecting with each other in an L shape and is used as horizontal and vertical types; and a water discharge socket for discharging, from the drain pan unit, drain water received on the drain pan unit. A drain port is opened through a water-receiving surface of each of the horizontal water receiving unit and the vertical water receiving unit at a corner of intersection of the drain pan unit. The water discharge socket entirely covers the drain port on an outer side of the corner, which is a major angle side.

Abstract: An upper surface of a plug (PL1) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate (1S), completing a CMP method for forming the plug (PL1) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL1) and a wiring (W1) in a vertical direction can be ensured. Also, the wiring (W1) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.

Abstract: An upper surface of a plug (PL1) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate (1S), completing a CMP method for forming the plug (PL1) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL1) and a wiring (W1) in a vertical direction can be ensured. Also, the wiring (W1) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.

Abstract: An upper surface of a plug (PL1) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate (1S), completing a CMP method for forming the plug (PL1) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL1) and a wiring (W1) in a vertical direction can be ensured. Also, the wiring (W1) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.

Abstract: An upper surface of a plug (PL1) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate (1S), completing a CMP method for forming the plug (PL1) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL1) and a wiring (W1) in a vertical direction can be ensured. Also, the wiring (W1) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.

Abstract: A first tier structure including a first alternating stack of first insulating layers and first sacrificial material layers is formed over a substrate. First support openings and first memory openings are formed through the first tier structure. A dielectric material portion providing electrical isolation from the substrate is formed in each first memory openings. A second tier structure including a second alternating stack of second insulating layers and second sacrificial material layers is formed the first tier structure. Second support openings and second memory openings are formed through the second tier structure above the first support openings and the first memory openings. Memory stack structures are formed in inter-tier openings formed by adjoining the first and second memory openings.

Abstract: A first tier structure including a first alternating stack of first insulating layers and first sacrificial material layers is formed over a substrate. First support openings and first memory openings are formed through the first tier structure. A dielectric material portion providing electrical isolation from the substrate is formed in each first memory openings. A second tier structure including a second alternating stack of second insulating layers and second sacrificial material layers is formed the first tier structure. Second support openings and second memory openings are formed through the second tier structure above the first support openings and the first memory openings. Memory stack structures are formed in inter-tier openings formed by adjoining the first and second memory openings.

Abstract: An alternating current loss measuring apparatus for superconductors includes a superconductor specimen, a magnetic field applying coil, a radiation shield, a vacuum vessel, first cooling means, and second cooling means. The first cooling means or the second cooling means is provided with a temperature regulating mechanism. The magnetic field applying means and the radiation shield are set to be a first cooling part, whereas the superconductor specimen is set to be a second cooling part, and the first cooling part and the second cooling part are cooled by first and second cooling means, respectively. A high thermal resistance member is disposed between the superconductor specimen and the second cooling means, and temperature measuring means are disposed at at least two positions on the high thermal resistance member. The alternating current loss of a superconductor under an external magnetic field can be measured at each of different temperatures.

Abstract: A first tier structure including a first alternating stack of first insulating layers and first sacrificial material layers is formed over a substrate. First support pillar structures are formed through the first tier structure. A second tier structure including a second alternating stack of second insulating layers and second sacrificial material layers is formed over the first tier structure. Memory stack structures and second support pillar structures are formed through the second tier structure. The first and second sacrificial material layers are replaced with first and second electrically conductive layers while the first support pillar structures, the second support pillar structures, and the memory stack structures provide structural support to the first and second insulating layers. By limiting the spatial extent of the first support pillar structures within the first tier structure, electrical short to backside contact via structures can be reduced.

Abstract: Unwanted erosion of dielectric materials around a backside contact trench can be avoided or minimized employing an aluminum oxide liner. An aluminum oxide liner can be formed inside an insulating material layer in a backside contact trench to prevent collateral etching of the insulating material at an upper portion of the backside contact trench during an anisotropic etch that forms an insulating spacer. Alternatively, an aluminum oxide layer can be employed as a backside blocking dielectric layer. An upper portion of the aluminum oxide layer can be converted into an aluminum compound layer including aluminum and a non-metallic element other than oxygen at an upper portion of the trench, and can be employed as a protective layer during formation of a backside contact structure.

Abstract: In a gradient magnetic field coil device including: a plurality of main coils generating in an imaging region of a magnetic field resonance imaging device a magnetic field distribution in which an intensity linearly inclines; and a plurality of shield coils, arranged on an opposite side of the imaging region across the main coils, suppressing residual magnetic field generated by the main coils on the opposite side. The plurality of main coils and the plurality of shield coils are connected in series. The device further includes a plurality of current adjusting devices, connected to the shield coils in parallel, independently adjusting currents flowing through the shield coils, respectively, to enhance symmetry of the residual magnetic field. The gradient magnetic field coil device is provided which can suppress generation of eddy current magnetic field even if there is a relative position deviation between the main coils and shield coils.

Abstract: Provided is a semiconductor integrated circuit device having pixel regions in a photodiode array region and having, in each of the pixel regions, a waveguide holding hole having a substantially perpendicular sidewall above the photodiode and embedded with a silicon oxide-based sidewall insulating film reaching the bottom surface of the hole and two or more silicon nitride-based insulating films having a higher refractive index on the inner side of the hole. This structure makes it possible to prevent deterioration of pixel characteristics of an imaging device, such as CMOS sensor, which is rapidly decreasing in size.

Abstract: A device includes: a static magnetic field generating device including static magnetic field generating sources generating a homogeneous magnetic field in a space; gradient magnetic field generating sources superimposing a gradient magnetic field on the homogeneous magnetic field, and conductor rings arranged between the static magnetic field generating sources and the gradient magnetic field generating sources in a pair of arranging regions on both sides in a direction of the homogeneous magnetic field in a region where the homogeneous magnetic field is generated (imaging region), respectively, the conductor rings being separated from each other and making a pair. The conductor rings are mechanically connected to the gradient magnetic field generating device or the static magnetic field generating device. This provides an MRI device 1 capable of reduction in vibration with suppression of the image quality deterioration of the tomographic images.

Abstract: A NAND flash memory array includes a select line having a first edge region containing a first portion of floating gate material and a second edge region containing a second portion of floating gate material, and having a central region between the first edge region and the second edge region where no floating gate material is present.

Abstract: A NAND flash memory array includes a select line having a first edge region containing a first portion of floating gate material and a second edge region containing a second portion of floating gate material, and having a central region between the first edge region and the second edge region where no floating gate material is present.

Abstract: The present invention relates to an evacuation apparatus for evacuating a vacuum chamber of a substrate processing apparatus for processing a substrate such as a semiconductor wafer or liquid crystal panel. An evacuation apparatus according to the present invention includes a first vacuum pump connected to a vacuum chamber, and a second vacuum pump connected to the first vacuum pump. The first vacuum pump has a pair of multistage pump rotors.

Abstract: An alternating current loss measuring apparatus for superconductors includes a superconductor specimen, a magnetic field applying coil, a radiation shield, a vacuum vessel, first cooling means, and second cooling means. The first cooling means or the second cooling means is provided with a temperature regulating mechanism. The magnetic field applying means and the radiation shield are set to be a first cooling part, whereas the superconductor specimen is set to be a second cooling part, and the first cooling part and the second cooling part are cooled by first and second cooling means, respectively. A high thermal resistance member is disposed between the superconductor specimen and the second cooling means, and temperature measuring means are disposed at at least two positions on the high thermal resistance member. The alternating current loss of a superconductor under an external magnetic field can be measured at each of different temperatures.

Abstract: Provided is a semiconductor integrated circuit device having pixel regions in a photodiode array region and having, in each of the pixel regions, a waveguide holding hole having a substantially perpendicular sidewall above the photodiode and embedded with a silicon oxide-based sidewall insulating film reaching the bottom surface of the hole and two or more silicon nitride-based insulating films having a higher refractive index on the inner side of the hole. This structure makes it possible to prevent deterioration of pixel characteristics of an imaging device, such as CMOS sensor, which is rapidly decreasing in size.

Abstract: An upper surface of a plug (PL1) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate (1S), completing a CMP method for forming the plug (PL1) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL1) and a wiring (W1) in a vertical direction can be ensured. Also, the wiring (W1) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.

Abstract: Provided is a semiconductor integrated circuit device having pixel regions in a photodiode array region and having, in each of the pixel regions, a waveguide holding hole having a substantially perpendicular sidewall above the photodiode and embedded with a silicon oxide-based sidewall insulating film reaching the bottom surface of the hole and two or more silicon nitride-based insulating films having a higher refractive index on the inner side of the hole. This structure makes it possible to prevent deterioration of pixel characteristics of an imaging device, such as CMOS sensor, which is rapidly decreasing in size.