Patents by Inventor Takeshi Matsumoto
Takeshi Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9342807Abstract: A management system includes a plurality of analyzers; and a computer system connected to the analyzers via a network, wherein each of the analyzers comprises: a data transmitter for transmitting data produced by the analyzer to the computer system via the network, and wherein the computer system includes a memory under control of a processor, the memory storing instructions enabling the processor to carry out operations, comprising: (a) receiving a plurality of data transmitted from the data transmitters of the plurality of analyzers; (b) generating an aggregate result used for determining a determination condition for making a determination as to whether or not a notification to a user of the analyzer is required based on the plurality of received data; and (c) outputting the aggregate result. A computer system and a method of providing information are also disclosed.Type: GrantFiled: February 19, 2015Date of Patent: May 17, 2016Assignee: SYSMEX CORPORATIONInventors: Tadayuki Yamaguchi, Atsushi Shirakami, Takeshi Matsumoto
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Publication number: 20160124148Abstract: An optical waveguide includes a waveguide core including a first region, a second region having a step at which a thickness varies, and a third region having a thickness smaller than that of the first region. The second region has thick film regions continuing with the first region and positioned at both sides in a widthwise direction. The thick film regions have a thickness that is equal to that of the first region and have a gradually reducing width from the first region side to the third region side. The second region further has a thin film region sandwiched by the thick film regions and continuing with the third region. The thin film region has a thickness equal to that of the third region.Type: ApplicationFiled: September 30, 2015Publication date: May 5, 2016Inventor: Takeshi Matsumoto
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Publication number: 20160118714Abstract: In one embodiment, a method of manufacturing an RFID label includes providing a web structure comprising a dielectric layer and a metal layer; depositing a non-removable resist on the metal layer, the deposition of the non-removable resist defining an antenna; depositing a removable resist on the metal layer, the deposition of the removable resist defining connection pads for connecting an integrated circuit (IC) to the antenna; etching the metal layer to form the antenna and the connection pads; removing the removable resist from the metal layer to expose the connection pads; and attaching the IC to the connection pads.Type: ApplicationFiled: December 31, 2015Publication date: April 28, 2016Inventors: Zhonghe Ji, Takeshi Matsumoto
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Patent number: 9299586Abstract: Manufacturing antennas for a dual tag by: providing a web structure having a dielectric layer between a first metal layer and a second metal layer; depositing a first resist on the first metal layer to define a radio frequency (RF) coil and a first electrode of an RF capacitor; depositing the first resist on the second metal layer to define a second electrode of the RF capacitor; depositing a second resist on the second metal layer to define connection pads for a near field antenna, wherein one of the first resist and the second resist on the second metal layer defines a far field antenna and the near field antenna; and etching the first and second metal layers to form the RF coil, the electrodes of the RF capacitor, the far field antenna, the near field antenna, and the connection pads.Type: GrantFiled: September 24, 2014Date of Patent: March 29, 2016Assignee: CHECKPOINT SYSTEMS, INC.Inventors: George West, Takeshi Matsumoto, Kenichiro Uemizu
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Publication number: 20160086821Abstract: Manufacturing antennas for a dual tag by: providing a web structure having a dielectric layer between a first metal layer and a second metal layer; depositing a first resist on the first metal layer to define a radio frequency (RF) coil and a first electrode of an RF capacitor; depositing the first resist on the second metal layer to define a second electrode of the RF capacitor; depositing a second resist on the second metal layer to define connection pads for a near field antenna, wherein one of the first resist and the second resist on the second metal layer defines a far field antenna and the near field antenna; and etching the first and second metal layers to form the RF coil, the electrodes of the RF capacitor, the far field antenna, the near field antenna, and the connection pads.Type: ApplicationFiled: September 24, 2014Publication date: March 24, 2016Inventors: George West, Takeshi Matsumoto, Kenichiro Uemizu
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Publication number: 20160068370Abstract: An elevator car includes a car-platform device including a car-platform panel, anti-vibration devices, and a car-platform support frame. The car-platform panel includes a panel main body, a frame structure including a panel frame surrounding an outer peripheral portion of the panel main body, and a panel upper plate and a panel lower plate for individually covering upper surfaces and lower surfaces of the panel main body and the panel frame. The anti-vibration devices receive the frame structure by upper surfaces thereof. The car-platform support frame supports the car-platform panel through an intermediation of the anti-vibration devices. The upper surfaces of the anti-vibration devices are arranged at a height position between an upper surface and a lower surface of the car-platform panel in a vertical direction.Type: ApplicationFiled: April 26, 2013Publication date: March 10, 2016Applicant: Mitsubishi Electric CorporationInventors: Kazuhiro KYUE, Takeshi MATSUMOTO, Seiji WATANABE
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Patent number: 9230776Abstract: An ion irradiation apparatus is provided. The ion irradiation apparatus includes a support member, a measuring device, and a control device. The support member is larger than the substrate. The measuring device is disposed forwardly in a traveling direction of an ion beam. The ion irradiation apparatus operates in a first mode during which the measuring device is irradiated with a remaining part of the ion beam after being partially shielded by the support member, when the substrate is not irradiated with the ion beam after crossing the ion beam; and a second mode during which the measuring device is irradiated with the ion beam without being shielded by the support member, when the substrate is not irradiated with the ion beam after crossing the ion beam. The control device controls the substrate so that the ion treatment process is performed in the first mode at least one time during the treatment.Type: GrantFiled: January 14, 2015Date of Patent: January 5, 2016Assignee: NISSIN ION EQUIPMENT CO., LTD.Inventors: Takeshi Matsumoto, Koichi Orihira, Masatoshi Onoda
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Patent number: 9225147Abstract: An optical semiconductor device includes a semiconductor substrate; a lower cladding layer formed over the semiconductor substrate; a quantum well active layer formed on the lower cladding layer; a diffraction grating layer formed over the quantum well active layer and having diffraction gratings formed in a surface thereof; and an upper cladding layer formed on the diffraction gratings of the diffraction grating layer. Further, a band gap in outer regions of the quantum well active layer that are adjacent to outer end surfaces of the optical semiconductor device is greater than the band gap in an inner region of the quantum well active layer that is located between the outer regions, and a thickness of one or more layers, which include the lower cladding layer and positioned between the semiconductor substrate and the quantum well active layer, is greater than or equal to 2.3 ?m.Type: GrantFiled: July 17, 2013Date of Patent: December 29, 2015Assignee: FUJITSU LIMITEDInventors: Akinori Hayakawa, Takeshi Matsumoto
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Patent number: 9184558Abstract: An optical semiconductor device, includes: a plurality of first diffraction grating layers disposed at a spacing from each other along first direction above first semiconductor layer, length of a lower surface of each of a plurality of first diffraction gratings along first direction being longer than a length of an upper surface of first diffraction grating; second diffraction grating layer disposed along first direction above first semiconductor layer, first and second diffraction grating layers being alternately disposed at a spacing from each other, a length of an upper surface of second diffraction grating layer along first direction being longer than the length of a lower surface of second diffraction layer; a diffraction grating including first and second diffraction grating layers; a second semiconductor layer disposed between first and second diffraction grating layers and under second diffraction grating layer; and third semiconductor layer disposed on first and second diffraction grating layers.Type: GrantFiled: July 14, 2014Date of Patent: November 10, 2015Assignee: FUJITSU LIMITEDInventor: Takeshi Matsumoto
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Publication number: 20150262790Abstract: An ion irradiation apparatus is provided. The ion irradiation apparatus includes a support member, a measuring device, and a control device. The support member is larger than the substrate. The measuring device is disposed forwardly in a traveling direction of an ion beam. The ion irradiation apparatus operates in a first mode during which the measuring device is irradiated with a remaining part of the ion beam after being partially shielded by the support member, when the substrate is not irradiated with the ion beam after crossing the ion beam; and a second mode during which the measuring device is irradiated with the ion beam without being shielded by the support member, when the substrate is not irradiated with the ion beam after crossing the ion beam. The control device controls the substrate so that the ion treatment process is performed in the first mode at least one time during the treatment.Type: ApplicationFiled: January 14, 2015Publication date: September 17, 2015Applicant: NISSIN ION EQUIPMENT CO., LTD.Inventors: Takeshi MATSUMOTO, Koichi ORIHIRA, Masatoshi ONODA
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Publication number: 20150161552Abstract: A management system includes a plurality of analyzers; and a computer system connected to the analyzers via a network, wherein each of the analyzers comprises: a data transmitter for transmitting data produced by the analyzer to the computer system via the network, and wherein the computer system includes a memory under control of a processor, the memory storing instructions enabling the processor to carry out operations, comprising: (a) receiving a plurality of data transmitted from the data transmitters of the plurality of analyzers; (b) generating an aggregate result used for determining a determination condition for making a determination as to whether or not a notification to a user of the analyzer is required based on the plurality of received data; and (c) outputting the aggregate result. A computer system and a method of providing information are also disclosed.Type: ApplicationFiled: February 19, 2015Publication date: June 11, 2015Inventors: Tadayuki YAMAGUCHI, Atsushi Shirakami, Takeshi Matsumoto
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Publication number: 20150117818Abstract: A spot size converter includes a first silicon waveguide core that includes a width-fixed region having a fixed width and a width-tapered region continuing to the width-fixed region and having a width reducing toward a terminal portion, and a second waveguide core continuing to the first silicon waveguide core and covering at least the width-tapered region. The first silicon waveguide core has a thickness-wise step in the width-fixed region.Type: ApplicationFiled: September 17, 2014Publication date: April 30, 2015Applicant: FUJITSU LIMITEDInventors: Takeshi Matsumoto, Shigeaki Sekiguchi
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Patent number: 8996929Abstract: A management system includes a plurality of analyzers; and a computer system connected to the analyzers via a network, wherein each of the analyzers comprises: a data transmitter for transmitting data produced by the analyzer to the computer system via the network, and wherein the computer system includes a memory under control of a processor, the memory storing instructions enabling the processor to carry out operations, comprising: (a) receiving a plurality of data transmitted from the data transmitters of the plurality of analyzers; (b) generating an aggregate result used for determining a determination condition for making a determination as to whether or not a notification to a user of the analyzer is required based on the plurality of received data; and (c) outputting the aggregate result. A computer system and a method of providing information are also disclosed.Type: GrantFiled: January 30, 2009Date of Patent: March 31, 2015Assignee: Sysmex CorporationInventors: Tadayuki Yamaguchi, Atsushi Shirakami, Takeshi Matsumoto
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Publication number: 20140321887Abstract: A developing device for an image forming apparatus includes a developing roller for carrying a developer; a developing blade including a blade member for regulating a developer amount carried on a surface of the developing roller and a supporting member for supporting the blade member; and a frame supporting the supporting member: wherein the supporting member is fixed to the frame in a state that a first region thereof adjacent the blade member tends to expand and a second region thereof remote from the blade member tends to contract, such that a stretching force is applied to the blade member in a rotation axial direction of the developing roller, and the blade member is fixed to the supporting member in the first region.Type: ApplicationFiled: April 25, 2014Publication date: October 30, 2014Applicant: Canon Kabushiki KaishaInventors: Takeshi Matsumoto, Masanari Morioka
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Publication number: 20140321493Abstract: An optical semiconductor device, includes: a plurality of first diffraction grating layers disposed at a spacing from each other along first direction above first semiconductor layer, length of a lower surface of each of a plurality of first diffraction gratings along first direction being longer than a length of an upper surface of first diffraction grating; second diffraction grating layer disposed along first direction above first semiconductor layer, first and second diffraction grating layers being alternately disposed at a spacing from each other, a length of an upper surface of second diffraction grating layer along first direction being longer than the length of a lower surface of second diffraction layer; a diffraction grating including first and second diffraction grating layers; a second semiconductor layer disposed between first and second diffraction grating layers and under second diffraction grating layer; and third semiconductor layer disposed on first and second diffraction grating layers.Type: ApplicationFiled: July 14, 2014Publication date: October 30, 2014Inventor: Takeshi MATSUMOTO
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Patent number: 8830004Abstract: A crystal resonator comprises a first vibrating region provided on a crystal wafer, a second vibrating region provided on the crystal wafer, the second vibrating region having a different thickness and positive/negative orientation of the X-axis from those of the first vibrating region, and excitation electrodes which are provided respectively on the first vibrating region and the second vibrating region for causing the vibrating regions to vibrate independently. Frequencies that change by different amounts from each other relative to a temperature change can be retrieved from one vibrating region and the other vibrating region. Thus, based on an oscillating frequency of the vibrating region in which a clear frequency change occurs relative to the temperature, the oscillating frequency of the other vibrating region can be controlled. Thereby, increases in the complexity of the crystal oscillator can be suppressed.Type: GrantFiled: July 27, 2012Date of Patent: September 9, 2014Assignee: Nihon Dempa Kogyo Co., Ltd.Inventors: Mitsuaki Koyama, Toshihiko Kagami, Takeshi Matsumoto, Takeru Mutoh, Manabu Ishikawa, Shinichi Sato
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Patent number: 8824842Abstract: An optical semiconductor device, includes: a plurality of first diffraction grating layers disposed at a spacing from each other along first direction above first semiconductor layer, length of a lower surface of each of a plurality of first diffraction gratings along first direction being longer than a length of an upper surface of first diffraction grating; second diffraction grating layer disposed along first direction above first semiconductor layer, first and second diffraction grating layers being alternately disposed at a spacing from each other, a length of an upper surface of second diffraction grating layer along first direction being longer than the length of a lower surface of second diffraction layer; a diffraction grating including first and second diffraction grating layers; a second semiconductor layer disposed between first and second diffraction grating layers and under second diffraction grating layer; and third semiconductor layer disposed on first and second diffraction grating layers.Type: GrantFiled: March 8, 2011Date of Patent: September 2, 2014Assignee: Fujitsu LimitedInventor: Takeshi Matsumoto
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Publication number: 20140199492Abstract: An ion implanter that introduces a process gas into an ion source, extracts a ribbon-shaped ion beam from the ion source using an extraction electrode system made up of multiple electrodes, and uses the ion beam to irradiate a substrate disposed in a processing chamber during ion implantation processing, and that also introduces a cleaning gas into the ion source and performs cleaning inside said ion source at times other than during ion implantation processing, wherein during the re-initiation of the ion beam upon termination of cleaning, a predetermined voltage is applied to the extraction electrode system and the operating parameters of the ion source are then set to values corresponding to the implantation recipe of the substrate to be processed.Type: ApplicationFiled: October 25, 2013Publication date: July 17, 2014Applicant: NISSIN ION EQUIPMENT CO., LTD.Inventor: Takeshi MATSUMOTO
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Patent number: 8686564Abstract: A first transistor group, a second transistor group, and an electrode pad are formed on a semiconductor substrate. A first protective film is formed so as to cover the semiconductor substrate except for an upper region of the electrode pad. The second protective film which generates a stress in a projecting direction is formed so as to cover the first protective film except for an upper region of the first transistor group. A transistor ability of the first transistor group is varied to be relatively higher due to a presence of the second protective film, based on a transistor ability of the second transistor group, as a reference.Type: GrantFiled: February 24, 2012Date of Patent: April 1, 2014Assignee: Panasonic CorporationInventor: Takeshi Matsumoto
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Publication number: 20140036948Abstract: An optical semiconductor device includes a semiconductor substrate; a lower cladding layer formed over the semiconductor substrate; a quantum well active layer formed on the lower cladding layer; a diffraction grating layer formed over the quantum well active layer and having diffraction gratings formed in a surface thereof; and an upper cladding layer formed on the diffraction gratings of the diffraction grating layer. Further, a band gap in outer regions of the quantum well active layer that are adjacent to outer end surfaces of the optical semiconductor device is greater than the band gap in an inner region of the quantum well active layer that is located between the outer regions, and a thickness of one or more layers, which include the lower cladding layer and positioned between the semiconductor substrate and the quantum well active layer, is greater than or equal to 2.3 ?m.Type: ApplicationFiled: July 17, 2013Publication date: February 6, 2014Inventors: Akinori HAYAKAWA, Takeshi Matsumoto