Abstract: According to one embodiment, a semiconductor memory device includes a first conductive line, a second conductive line, a rectifying element, a switching element, a first side wall film and a second side wall film. The first conductive line extends in a first direction. The second conductive line extends in a second direction crossing the first direction. The rectifying element is connected between the first and second conductive lines. The switching element is connected in series with the rectifying element between the first and second conductive lines. The first side wall film is formed on a side surface of the rectifying element. The second side wall film is formed on a side surface of at least one of the first and second conductive lines. At least one of a film type and a film thickness of the second side wall film is different from that of the first side wall film.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A semiconductor memory device according to an embodiment includes a cell array block having a plurality of cell arrays stacked therein, each of the cell arrays including a plurality of memory cells and a plurality of selective wirings selecting the plurality of memory cells are stacked, a pillar-shaped first via extending in a stack direction from a first height to a second height and having side surfaces connected to a first wiring, and a pillar-shaped second via extending in the stack direction from the first height to the second height and having side surfaces connected to a second wiring upper than the first wiring, the second wiring being thicker in the stack direction than the first wiring and having a higher resistivity than the first wiring.

Abstract: There is provided an oil-in-water emulsion composition whose continuous phase is an aqueous phase, but which has a high moisture evaporation suppressing effect and is also superior in feeling, and a method for producing the same. An oil-in-water emulsion composition containing an oily component having an inorganic value of 2500 or less, an organic value of 5000 or less and an IOB value of 0.3 to 0.5, the oil-in-water emulsion composition containing the following components (A) to (C) in an aqueous phase. (A) a polyoxyethylene alkyl or alkenyl ether having alkyl group or alkenyl group having 20 to 24 carbon atoms and an average molar number of ethylene oxide added of 1.

Abstract: Provided is an aqueous composition contained in a container, maintaining an excellent water-evaporation-inhibiting effect even when an alkali metal salt or the like is contained in the aqueous composition, and having excellent long-term stability. The aqueous composition contained in a container includes the following components (A) to (D): (A) a polyoxyethylene alkyl or alkenyl ether having an alkyl or alkenyl group having 20 to 24 carbon atoms and an average molar number of ethylene oxide added of 1.5 to 4, (B) a water-soluble polymer, (C) a nonionic surfactant having an ethylene oxide group (but excluding component (A)), and (D) water.

Abstract: An LED drive circuit which is connectable to a phase control type light adjuster, including: a first reference voltage generation portion that generates a first reference voltage; a second reference voltage generation portion that generates a second reference voltage according to a phase angle of the light adjuster; an input voltage detection portion that detects a size relationship between an input voltage and a threshold value voltage; a current draw-out portion that draws out a current in accordance with the first reference voltage or the second reference voltage from an electricity supply line that supplies electricity to an LED drive portion; and a switch portion that in accordance with a detection result by the input voltage detection portion, performs switching between an output from the first reference voltage generation portion to the current draw-out portion and an output from the second reference voltage generation portion to the current draw-out portion.

Abstract: Provided is an aqueous composition contained in a container, where water evaporation of the aqueous composition contained in a container is inhibited, and thereby the contents are prevented from solidifying or changing in properties. As a result, excellent long-term stability is obtained, and even when the container is a spray container or a pump container, the contents adhering to the discharge opening of the container is inhibited from drying, and thereby clogging can be prevented. The aqueous composition contained in a container contains the following components (A), (B), and (C): (A) a polyoxyethylene alkyl or alkenyl ether having an alkyl or alkenyl group having 20 to 24 carbon atoms and an average molar number of ethylene oxide added of 1.5 to 4, (B) a water-soluble polymer, and (C) water.

Abstract: According to one embodiment, a semiconductor storage device includes a plurality of parallel first interconnects extending in a first direction, a plurality of parallel second interconnects which extend in a second direction perpendicular to the first direction and which make a two-level crossing with respect to the first interconnects, and memory cell structures provided in regions where the first interconnects and the second interconnects make two-level crossings, the memory cell structures being connected on one end to the first interconnects and connected on the other end to the second interconnects, the memory cell structure including a variable resistive element and a non-ohmic element which are connected in series, wherein the endmost first interconnect is disconnected in at least one portion.

Abstract: Provided is an LED driving circuit (4), including: an impedance detecting section (7) for detecting an impedance value of a phase-control type dimmer (2); and an impedance adjusting section (6) for adjusting an impedance of the LED driving circuit (4) based on the impedance value detected by the impedance detecting section (7).

Abstract: A nonvolatile semiconductor memory device includes a first stack unit with a first selection transistor and a second selection transistor formed on a semiconductor substrate and a second stack unit with first insulating layers and first conductive layers stacked alternately on the upper surface of the first stack unit. The second stack unit includes a second insulating layer formed in contact with side walls of the first insulating layer and the first conductive layer, a charge storage layer formed in contact with the second insulating layer for storing electrical charges, a third insulating layer formed in contact with the charge storage layer, and a first semiconductor layer formed in contact with the third insulating layer so as to extend in a stacking direction, with one end connected to one diffusion layer of the first selection transistor and the other end connected to a diffusion layer of the second selection transistor.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: An LED drive circuit that is connectable to a phase control type of light adjuster and receives a voltage based on an a.c. voltage to drive an LED load, the LED drive circuit has a structure which includes: an adjustment signal generation portion that generates an adjustment signal in accordance with a characteristic of a phase control type of light adjuster which is connected to the LED drive circuit; and an adjustment portion that receives the adjustment signal to adjust a characteristic for driving the LED load.

Abstract: A semiconductor memory device according to an embodiment includes a cell array block having a plurality of cell arrays stacked therein, each of the cell arrays including a plurality of memory cells and a plurality of selective wirings selecting the plurality of memory cells are stacked, a pillar-shaped first via extending in a stack direction from a first height to a second height and having side surfaces connected to a first wiring, and a pillar-shaped second via extending in the stack direction from the first height to the second height and having side surfaces connected to a second wiring upper than the first wiring, the second wiring being thicker in the stack direction than the first wiring and having a higher resistivity than the first wiring.

Abstract: A nonvolatile semiconductor memory device includes a first stack unit with a first selection transistor and a second selection transistor formed on a semiconductor substrate and a second stack unit with first insulating layers and first conductive layers stacked alternately on the upper surface of the first stack unit. The second stack unit includes a second insulating layer formed in contact with side walls of the first insulating layer and the first conductive layer, a charge storage layer formed in contact with the second insulating layer for storing electrical charges, a third insulating layer formed in contact with the charge storage layer, and a first semiconductor layer formed in contact with the third insulating layer so as to extend in a stacking direction, with one end connected to one diffusion layer of the first selection transistor and the other end connected to a diffusion layer of the second selection transistor.

Abstract: According to one embodiment, a semiconductor memory device includes a first conductive line, a second conductive line, a rectifying element, a switching element, a first side wall film and a second side wall film. The first conductive line extends in a first direction. The second conductive line extends in a second direction crossing the first direction. The rectifying element is connected between the first and second conductive lines. The switching element is connected in series with the rectifying element between the first and second conductive lines. The first side wall film is formed on a side surface of the rectifying element. The second side wall film is formed on a side surface of at least one of the first and second conductive lines. At least one of a film type and a film thickness of the second side wall film is different from that of the first side wall film.

Abstract: A nonvolatile semiconductor memory device includes a first stack unit with a first selection transistor and a second selection transistor formed on a semiconductor substrate and a second stack unit with first insulating layers and first conductive layers stacked alternately on the upper surface of the first stack unit. The second stack unit includes a second insulating layer formed in contact with side walls of the first insulating layer and the first conductive layer, a charge storage layer formed in contact with the second insulating layer for storing electrical charges, a third insulating layer formed in contact with the charge storage layer, and a first semiconductor layer formed in contact with the third insulating layer so as to extend in a stacking direction, with one end connected to one diffusion layer of the first selection transistor and the other end connected to a diffusion layer of the second selection transistor.

Abstract: This invention provides a reagent for protein electrophoresis, an electrophoresis gel or buffer composition containing the reagent, and a protein separation method and an electrophoresis kit using the reagent and the composition.

Abstract: The present invention provides a metal gasket to be fitted between a cylinder head and a cylinder block to seal a gap between the surfaces thereof, which comprises: a thin metal plate with an opening formed at a position corresponding to a bore portion of the cylinder block, the opening having a diameter larger than that of the bore portion; and a pair of elastic metal substrates each having: an opening which substantially agrees with the bore portion of the cylinder block; an annular convex portion formed concentrically with the opening at a position apart from an edge portion of the opening by a specified distance; and an annular holding portion for holding a peripheral portion of the opening of the thin metal plate, horizontally extending out from an outer edge portion of the convex portion, wherein the pair of the elastic metal substrates are disposed so that top portions of the respective convex portions face each other and that the holding portions overlap with the thin metal plate, and engaged to the t

Abstract: A toner supply device for supplying toner to a developing device includes: a first toner supply portion for supplying toner to a developing hopper; a second toner supply portion for supplying the stored toner to the first toner supply portion; a first toner supply driver for driving the first toner supply portion; a first residual toner quantity detector for detecting the residual toner quantity in the first toner supply portion; a second toner supply driver for driving the second toner supply portion; a second residual toner quantity detector for detecting the residual toner quantity in the second toner supply portion; and a controller for controlling the drives of the first and second toner supply drivers by switching on and off the drives of the first and second toner supply drivers in accordance with the residual toner quantities detected by the first and second residual toner quantity detectors.

Abstract: According to one embodiment, a semiconductor storage device includes a plurality of parallel first interconnects extending in a first direction, a plurality of parallel second interconnects which extend in a second direction perpendicular to the first direction and which make a two-level crossing with respect to the first interconnects, and memory cell structures provided in regions where the first interconnects and the second interconnects make two-level crossings, the memory cell structures being connected on one end to the first interconnects and connected on the other end to the second interconnects, the memory cell structure including a variable resistive element and a non-ohmic element which are connected in series, wherein the endmost first interconnect is disconnected in at least one portion.