Patents by Inventor Takeshi Sakai
Takeshi Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240147154Abstract: An acoustic device includes a first acoustic unit and a second acoustic unit. The first acoustic unit includes: a first loudspeaker module that includes a first sound emitting surface provided to face the second acoustic unit; and a first sound absorbing module that includes a first sound absorbing surface provided around the first sound emitting surface to face the second acoustic unit. The second acoustic unit includes: a second loudspeaker module that includes a second sound emitting surface provided to face the first acoustic unit; and a second sound absorbing module that includes a second sound absorbing surface provided around the second sound emitting surface to face the first acoustic unit.Type: ApplicationFiled: December 7, 2023Publication date: May 2, 2024Inventors: Akihisa KAWAMURA, Satoshi TAKAYAMA, Takeshi SAKAI
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Patent number: 11973321Abstract: A light emitting device includes a wiring substrate, a light emitting element array that includes a first side surface and a second side surface facing each other, and a third side surface and a fourth side surface connecting the first side surface and the second side surface to each other and facing each other, the light emitting element array being provided on the wiring substrate, a driving element that is provided on the wiring substrate on the first side surface side and drives the light emitting element array, a first circuit element and a second circuit element that are provided on the wiring substrate on the second side surface side to be arranged in a direction along the second side surface, and a wiring member that is provided on the third side surface side and the fourth side surface side and extends from a top electrode of the light emitting element array toward an outside of the light emitting element array.Type: GrantFiled: May 31, 2023Date of Patent: April 30, 2024Assignee: FUJIFILM Business Innovation Corp.Inventors: Kazuhiro Sakai, Daisuke Iguchi, Takeshi Minamiru, Yoshinori Shirakawa, Tomoaki Sakita, Tsutomu Otsuka
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Patent number: 11953526Abstract: A current sensor includes a wiring board, a shield, an insulating sensor housing, and a shield adhesive. The wiring board and the shield are accommodated in the sensor housing. The sensor housing has a shield support part to support the shield, and a shield adhesion part. An application surface of the shield adhesion part is further from the shield than a contact surface of the shield support part. The shield is mounted on the contact surface of the shield support part, and the shield adhesive is disposed between the application surface of the shield adhesion part and the shield. The shield and the wiring board are aligned with and spaced from each other in the sensor housing.Type: GrantFiled: June 27, 2022Date of Patent: April 9, 2024Assignee: DENSO CORPORATIONInventors: Akito Sasaki, Ryosuke Sakai, Hiroaki Miwa, Takeshi Tsukamoto, Hiroshi Nomura, Takuma Esaka, Tatsuaki Sugito
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Publication number: 20240098574Abstract: A communication system is a communication system that includes first and second information processing devices. The first information processing device performs control such that a signal (which is a signal having backward compatibility) serving as an index by which the second information processing device receiving a frame stops the reception of the frame is transmitted to the second information processing device. The second information processing device performs control such that the reception of the frame is stopped based on the signal (which is a signal having backward compatibility) serving as an index by which reception of the frame is stopped when the frame transmitted from the first information processing device is received.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Applicant: Sony Group CorporationInventors: Eisuke SAKAI, Takeshi ITAGAKI, Kazuyuki SAKODA, Tomoya YAMAURA
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Patent number: 11935967Abstract: The purpose of the invention is to form the TFT of the oxide semiconductor, in which influence of variation in mask alignment is suppressed, thus, manufacturing a display device having a TFT of stable characteristics. The concrete measure is as follows. A display device including plural pixels, each of the plural pixels having a thin film transistor (TFT) of an oxide semiconductor comprising: a width of the oxide semiconductor in the channel width direction is wider than a width of the gate electrode in the channel width direction.Type: GrantFiled: August 4, 2021Date of Patent: March 19, 2024Assignee: Japan Display Inc.Inventors: Takeshi Sakai, Yuichiro Hanyu, Masahiro Watabe
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Patent number: 11936164Abstract: A light emitting device includes a wiring substrate, a light emitting element array that includes a first side surface and a second side surface facing each other, and a third side surface and a fourth side surface connecting the first side surface and the second side surface to each other and facing each other, the light emitting element array being provided on the wiring substrate, a driving element that is provided on the wiring substrate on the first side surface side and drives the light emitting element array, a first circuit element and a second circuit element that are provided on the wiring substrate on the second side surface side to be arranged in a direction along the second side surface, and a wiring member that is provided on the third side surface side and the fourth side surface side and extends from a top electrode of the light emitting element array toward an outside of the light emitting element array.Type: GrantFiled: May 31, 2023Date of Patent: March 19, 2024Assignee: FUJIFILM Business Innovation Corp.Inventors: Kazuhiro Sakai, Daisuke Iguchi, Takeshi Minamiru, Yoshinori Shirakawa, Tomoaki Sakita, Tsutomu Otsuka
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Publication number: 20240086146Abstract: A content playback device includes: a network interface that receives the current perceived temperature information for a person in a specific area from a server via a communication network; a memory that stores the perceived temperature information and date information indicating the current date; and a central processing unit (CPU) that causes the memory to store the perceived temperature information received by the network interface, selects playback content from a plurality of pieces of content, based on the perceived temperature information and the date information, and plays back the playback content.Type: ApplicationFiled: November 17, 2023Publication date: March 14, 2024Inventors: Toya Kitagawa, Nobuhiko WASHIO, Takeshi SAKAI
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Publication number: 20240087114Abstract: An information processing system according to an embodiment is an information processing system that has a detection unit that has a sensor that is mounted on a toilet where a bowl part that receives excrement is formed where a plurality of elements are linearly arranged to detect dropping feces, a feces image acquisition unit that acquires a feces image that is based on information that is acquired in time series by the detection unit, and a determination unit that determines an amount of feces from the feces image, wherein the determination unit determines an amount of feces based on a length of feces in a dropping direction thereof on the feces image and a property of feces.Type: ApplicationFiled: March 9, 2022Publication date: March 14, 2024Inventors: Takeshi Takaki, Masamichi Tosaki, Satoko Kizuka, Yuta Sakai, Shota Fujino, Hitoaki Higuchi
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Patent number: 11927859Abstract: A display device comprising a transistor and a display element over the transistor, wherein the transistor includes a gate electrode on an insulating surface, a gate insulating layer on the gate electrode, and source/drain electrodes on the oxide semiconductor layer and the gate insulating layer, each including a first conductive layer containing nitrogen and a second conductive layer on the first conductive layer, and an insulating layer contains oxygen on the oxide semiconductor layer and the source/drain electrodes.Type: GrantFiled: September 15, 2021Date of Patent: March 12, 2024Assignee: Japan Display Inc.Inventors: Masashi Tsubuku, Takeshi Sakai, Tatsuya Toda
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Patent number: 11817309Abstract: Provided are: a method of producing heated ozone water, the method capable of producing heated ozone water having an extremely high ozone concentration by suppressing a reduction in the ozone concentration in high-concentration heated ozone water; heated ozone water; and a semiconductor wafer-cleaning liquid using the heated ozone water. A method of producing heated ozone water obtained by dissolving ozone in pure water, the method being characterized by including: adjusting a pH of the pure water to 3 or less by adding acid to the pure water; to obtain an acid water, dissolving an ozone gas in the acid water; and heating the pure water, the acid water or the ozone water, to 60° C. or more.Type: GrantFiled: October 23, 2020Date of Patent: November 14, 2023Assignees: TOHOKU UNIVERSITY, NOMURA MICRO SCIENCE CO., LTD.Inventors: Yasuyuki Shirai, Takeshi Sakai, Takayuki Jizaimaru
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Publication number: 20230292551Abstract: A display device includes a light-emitting element; a first transistor and a second transistor connected in series between the light-emitting element and a driving power line; a third transistor electrically connected to a gate electrode of the first transistor; and a fourth transistor connected in parallel between a drain electrode of the first transistor and the light-emitting element, wherein a ratio of a channel width W1 to a channel length L1 of the first transistor (a W1/L1 ratio) and a ratio of a channel width W2 to a channel length L2 of the second transistor (a W2/L2 ratio) are larger than a ratio of a channel width W3 to a channel length L3 of the third transistor (a W3/L3 ratio) and a ratio of a channel width W4 to a channel length L4 of the fourth transistor (a W4/L4 ratio).Type: ApplicationFiled: March 1, 2023Publication date: September 14, 2023Applicant: Japan Display Inc.Inventors: Masashi TSUBUKU, Takeshi SAKAI, Kentaro MIURA, Hajime WATAKABE, Takaya TAMARU, Hiroshi TABATAKE, Yutaka UMEDA
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Patent number: 11710746Abstract: The semiconductor device comprises a gate electrode, a first gate insulating film overlapping a part of the side surface and the upper surface of the gate electrode, a second gate insulating film overlapping the upper surface of the gate electrode, a semiconductor film provided on the upper surface of the second gate insulating film and overlapping the gate electrode and a first terminal and a second terminal overlapping the upper surface of the semiconductor film. In a plan view, a first region is a region where the semiconductor film overlaps the upper surface of the first gate insulating film and the second gate insulating film between the first terminal and the second terminal, and a third region is a region that overlaps both a part of the upper surface of the gate electrode and the second gate insulating film and does not overlap the first gate insulating film.Type: GrantFiled: March 4, 2021Date of Patent: July 25, 2023Assignee: JAPAN DISPLAY INC.Inventor: Takeshi Sakai
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Patent number: 11659735Abstract: The semiconductor device includes a first gate electrode, a first gate insulating film, a semiconductor film, a first electrode, a second electrode, a second gate insulating film, and a second gate electrode. The first gate insulating film is located over the first gate electrode. The semiconductor film is located over the first gate insulating film and overlaps with the first gate electrode. The first electrode and the second electrode are each located over and in contact with the semiconductor film. The second gate insulating film is located over the first electrode and the second electrode. The second gate electrode is located over the second gate insulating film and overlaps with the second electrode and the first gate electrode. The first electrode is completely exposed from the second gate electrode.Type: GrantFiled: March 4, 2021Date of Patent: May 23, 2023Assignee: JAPAN DISPLAY INC.Inventor: Takeshi Sakai
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Publication number: 20230126273Abstract: A motor control device includes an abnormality determination unit that determines the presence of any abnormality in a current detector. The abnormality determination unit includes, for example, a U-phase abnormality determination device. The U-phase abnormality determination device calculates, as a voltage command threshold, a value obtained by adding a dead time voltage error, which is a voltage error occurring due to a dead time, to an ideal voltage command threshold, which is a value obtained by multiplying a prescribed reference current value by a motor resistance value, and outputs a signal indicating an abnormality in the current detector when the effective value of a voltage command value is equal to or greater than the voltage command threshold and the effective value of a current detection value is equal to or less than a current detection threshold that is lower than the reference current value.Type: ApplicationFiled: October 25, 2022Publication date: April 27, 2023Inventors: Ai KOJIMA, Yuji UCHIDA, Takeshi SAKAI
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Publication number: 20230125931Abstract: A sound reproduction device includes a cabinet and a loudspeaker disposed inside the cabinet, the cabinet includes a baffle including a plurality of through holes provided in a ringshaped area, and the loudspeaker is disposed in an orientation in which sound is emitted toward the plurality of through holes.Type: ApplicationFiled: May 24, 2021Publication date: April 27, 2023Inventors: Isao KAKUHARI, Nobuhiko WASHIO, Takeshi SAKAI
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Publication number: 20230101477Abstract: Provided is a stripping method capable of stripping a resist while suppressing the time and cost of processing required for stripping, while giving sufficient consideration to the load on the environment. The resist stripping method is a method for stripping a resist film-formed on a substrate, including: a pretreatment step of exposing the resist to a heated steam in a predetermined temperature range for a predetermined time; and a stripping step of stripping the resist exposed to the heated steam in the pretreatment step by using a resist stripping liquid, wherein the predetermined temperature range and the predetermined time are set according to the resist.Type: ApplicationFiled: December 7, 2022Publication date: March 30, 2023Applicants: NOMURA MICRO SCIENCE CO., LTD., TOHOKU UNIVERSITYInventors: Takayuki Jizaimaru, Takao Funakoshi, Yasuyuki Shirai, Hisashi Fujimoto, Takeshi Sakai
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Publication number: 20230058988Abstract: According to one embodiment, a transistor includes a gate electrode, an oxide semiconductor layer which overlaps the gate electrode and including a central portion and an end portion, and a source electrode and a drain electrode each connected to the oxide semiconductor layer, wherein an oxidation degree of the end portion is lower than an oxidation degree of the central portion, and a length of the gate electrode overlapping the central portion is greater than a length of the gate electrode overlapping the end portion.Type: ApplicationFiled: August 19, 2022Publication date: February 23, 2023Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Hajime WATAKABE, Takeshi SAKAI
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Patent number: 11575048Abstract: A display device including a plurality of thin film transistors. One of the plurality of thin film transistors includes a gate electrode, a semiconductor layer having a region overlapping the gate electrode, a gate insulating layer between the gate electrode and the semiconductor layer, a source electrode and a drain electrode in contact with a surface of the semiconductor layer opposite to the side of the gate insulating layer, and a first shield electrode arranged in a region where the source electrode and the gate electrode overlap, and a second shield electrode arranged in a region where the drain electrode and the gate electrode overlap. The first shield electrode and the second shield electrode are arranged between the gate electrode and the semiconductor layer, and are insulated from the gate electrode, the semiconductor layer, the source electrode, and the drain electrode.Type: GrantFiled: March 16, 2022Date of Patent: February 7, 2023Assignee: Japan Display Inc.Inventor: Takeshi Sakai
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Publication number: 20230007861Abstract: According to one embodiment, a semiconductor device includes a first transistor which includes a an oxide semiconductor layer, and a second transistor connected to first and a second gate electrodes of the first transistor, wherein the oxide semiconductor layer is provided between the first and second gate electrodes in a cross-sectional view, the oxide semiconductor layer includes a first channel formation region overlapping the second gate electrode and a second channel formation region not overlapping the second gate electrode in a plan view, and a resistance value between the second gate electrode and the second transistor is higher than a resistance value between the first gate electrode and the second transistor.Type: ApplicationFiled: July 7, 2022Publication date: January 12, 2023Applicant: Japan Display Inc.Inventors: Takeshi SAKAI, Hajime WATAKABE, Akihiro HANADA
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Patent number: 11493788Abstract: An optical modulator includes a substrate on which an optical waveguide and a modulation electrode that modulates a light wave propagating through the optical waveguide are formed, and a case housing the substrate, the optical waveguide includes at least an optical branching part that branches one light wave into two light waves or an optical combining part that combines two light waves into one light wave, the modulation electrode has a signal electrode and a ground electrode, and a part of the signal electrode is disposed so as to cross the optical branching part or the optical combining part, and the optical modulator is provided with a suppressing unit that suppresses changes in an intensity ratio of the light waves branched at the optical branching part or an intensity ratio of the light waves combined at the optical combining part, by the signal electrode.Type: GrantFiled: February 8, 2021Date of Patent: November 8, 2022Assignee: SUMITOMO OSAKA CEMENT CO., LTD.Inventors: Takeshi Sakai, Toshio Kataoka