Patents by Inventor Takeshi Sakai

Takeshi Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120080683
    Abstract: A thin film transistor, a display device and a liquid crystal display device are provided. The thin film transistor includes a gate electrode film onto which light from a light source is irradiated, a semiconductor film formed on the gate electrode film and on an opposite side to the light source side through an insulating film, first and second electrode films formed to be in electrical contact with the semiconductor film, and a first shielding film formed in a same layer as the gate electrode film and electrically isolated from the gate electrode film, wherein the first shielding film overlaps a part of the semiconductor film as seen from the light irradiation direction and also overlaps at least a part of the first electrode film as seen from the light irradiation direction.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 5, 2012
    Inventors: Takeshi NODA, Takuo Kaitoh, Hidekazu Miyake, Takeshi Sakai
  • Patent number: 8111263
    Abstract: A video display device that allows the color temperature of the signals in white color attributes having high luminance and low chroma saturation to be corrected with high precision is provided with a color temperature correction method so as to visually obtain a desirable white color on display. In some embodiments, the signal processing circuit can include an A/D converter to convert video signals into digitalized signals, a matrix circuit to convert the digitalized signals into luminance signals and at least two color difference signals, a hue conversion circuit to obtain hue signals from the color difference signals, a hue correction circuit to correct hue signals, a chroma saturation conversion circuit to obtain chroma saturation signals from color difference signals, a chroma saturation correction circuit to correct chroma saturation signals and a color temperature correction circuit to perform the color temperature correction on the respective hue and chroma saturation signals.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: February 7, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Katsunobu Kimura, Takaaki Matono, Haruki Takata, Takeshi Sakai, Wataru Kato
  • Patent number: 8049255
    Abstract: A semiconductor device includes an insulating substrate and a TFT element disposed on the substrate. The TFT element includes a gate electrode, a gate insulating film, a semiconductor layer, and a source electrode and a drain electrode arranged in that order on the insulating substrate. The semiconductor layer includes an active layer composed of polycrystalline semiconductor and a contact layer segment interposed between the active layer and the source electrode and another contact layer segment interposed between the active layer and the drain electrode. The source and drain electrodes each have a first face facing the opposite face of the active layer from the interface with the gate insulating layer and a second face facing an etched side face of the active layer. Each contact layer segment is disposed between the active layer and each of the first and second faces of the source or drain electrode.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: November 1, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Takeshi Sakai, Toshio Miyazawa, Takuo Kaitoh, Hidekazu Miyake
  • Publication number: 20110255010
    Abstract: Display embodiments including arrangements wherein a waiting condition of a display apparatus includes a first waiting condition, and a second waiting condition being shorter in a starting time, from time when the operation is made for turning a power source ON until time when the image is displayed on a display portion, and smaller in a power consumption, comparing to those of the first waiting condition. A controller portion changes the waiting condition of the display apparatus into the second waiting condition, when a sensor detects the presence of a human being while under the first waiting condition, and changes the waiting condition of the display apparatus into the first waiting condition, when no operation is made for turning a power source ON, for a predetermined time period, after changing the waiting condition into the second waiting condition.
    Type: Application
    Filed: June 15, 2011
    Publication date: October 20, 2011
    Inventors: Takeshi SAKAI, Katsunobu Kimura
  • Publication number: 20110227559
    Abstract: The electric field measuring device measures an electric field intensity of an electromagnetic wave generated from equipment under test 8 in an area for detecting an electromagnetic wave. An antenna 1 and an optical intensity modulator having a Mach-Zehnder type optical waveguide are inside the area and an output signal of the antenna is supplied to a modulation electrode of the optical intensity modulator. A light source unit, a light receiving unit, and a DC bias control unit controlling a DC bias voltage supplied to the optical intensity modulator are outside the area. An optical wave is guided to the optical intensity modulator from the light source unit, and is guided to the light receiving unit from the optical intensity modulator via an optical fiber 4. The DC bias voltage is supplied to the optical intensity modulator from the DC bias control unit via a power supply line 4.
    Type: Application
    Filed: November 27, 2009
    Publication date: September 22, 2011
    Applicant: SUMITOMO OSAKA CEMENT CO., LTD
    Inventors: Norikazu Miyazaki, Takeshi Sakai
  • Publication number: 20110186848
    Abstract: A semiconductor device can easily reduce a leak current which flows when a reversely-staggered-type TFT element in which an active layer is made of polycrystalline semiconductor is turned off. The semiconductor device includes a reversely-staggered-type TFT element in which a semiconductor layer, a source electrode and a drain electrode are arranged on a surface of an insulation film, and a portion of the source electrode and a portion of the drain electrode respectively get over the semiconductor layer.
    Type: Application
    Filed: April 12, 2011
    Publication date: August 4, 2011
    Inventor: Takeshi Sakai
  • Publication number: 20110162043
    Abstract: A controller controls a selector to connect a portable apparatus to the controller, to authenticate the portable apparatus. When the authentication of the portable apparatus is successful, the controller controls the selector to connect the portable apparatus to an audio and visual processing device circuit.
    Type: Application
    Filed: July 21, 2010
    Publication date: June 30, 2011
    Inventor: Takeshi Sakai
  • Patent number: 7948140
    Abstract: When electric wires (joint conductors) are disposed adjacent each other in a peeled state of coatings, a gap corresponding to the total thickness of both conductors' insulating films as skin layers is formed between end joined face portions of the conductors. The gap becomes larger because the conductors are tapered. Therefore, the adhesion between both conductors is impaired, with a consequent fear of occurrence of joining imperfection. In opposed joined face portions of electric wires (joint conductors), the conductors are deformed from the tips of their axes to the joined face side in such a manner that exposed portions at the tips of the conductors and insulating film faces located in the vicinity thereof are flush with each other or the exposed portions are projected.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: May 24, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Sakai, Yoshimi Mori, Yasuhiko Kimura, Masahiko Honma, Fuminori Ishikawa
  • Patent number: 7939829
    Abstract: A semiconductor device can easily reduce a leak current which flows when a reversely-staggered-type TFT element in which an active layer is made of polycrystalline semiconductor is turned off. The semiconductor device includes a reversely-staggered-type TFT element in which a semiconductor layer, a source electrode and a drain electrode are arranged on a surface of an insulation film, and a portion of the source electrode and a portion of the drain electrode respectively get over the semiconductor layer.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: May 10, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventor: Takeshi Sakai
  • Publication number: 20110024820
    Abstract: For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film.
    Type: Application
    Filed: October 14, 2010
    Publication date: February 3, 2011
    Inventors: Takeshi SAKAI, Yasushi ISHII, Tsutomu OKAZAKI, Masaru NAKAMICHI, Toshikazu MATSUI, Kyoya NITTA, Satoru MACHIDA, Munekatsu NAKAGAWA, Yuichi TSUKADA
  • Publication number: 20110001897
    Abstract: A liquid crystal display device having thin film transistors which can alleviate the required alignment accuracy of a semiconductor film while suppressing the generation of an optical leak current is provided.
    Type: Application
    Filed: July 1, 2010
    Publication date: January 6, 2011
    Inventor: Takeshi SAKAI
  • Patent number: 7863135
    Abstract: For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: January 4, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Takeshi Sakai, Yasushi Ishii, Tsutomu Okazaki, Masaru Nakamichi, Toshikazu Matsui, Kyoya Nitta, Satoru Machida, Munekatsu Nakagawa, Yuichi Tsukada
  • Publication number: 20100231807
    Abstract: A display apparatus, including: a display portion to display an image based upon a digital broadcasting signal received by a receiving portion; a main control portion to control each portion within the display apparatus; and a sub-control portion to control a supply of electronic power within the display apparatus, responsive to a signal wherein a waiting condition of the display apparatus in which an image is not displayed after stopping a supply of the electronic power to the display portion, is controlled by the sub-control portion, to be placeable into either of a first or second waiting condition, the first waiting condition is smaller in consumption of electronic power and the sub-control portion and the main control portion are controlled not to be set in operation, under the first waiting condition, while both are controlled to be set in operation, under the second waiting condition.
    Type: Application
    Filed: May 27, 2010
    Publication date: September 16, 2010
    Inventors: Takeshi Sakai, Katsunobu Kimura
  • Patent number: 7795524
    Abstract: A musical performance processing apparatus that provides better assistance for student's practice. The apparatus includes a main unit in which music data including performance information of right- and left hand parts is stored, and a performance terminal having a keyboard divided into two key ranges by a split point. Each key range is set as a tapping or normal performance key range. The main unit generates a musical tone when input with performance information generated by depression of a key in the normal performance key range, and automatically reproduces performance information of designated part of music data for the number of beats corresponding to key depression, when input with performance information generated by depression of a key in the tapping performance key range. Sounding is stopped, if there is a deviation between a tempo of teacher's tapping performance and timing of student's performance.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: September 14, 2010
    Assignee: Yamaha Corporation
    Inventors: Miki Arai, Satoshi Usa, Takeshi Sakai
  • Publication number: 20100202205
    Abstract: The degree of integration and the number of rewriting of a semiconductor device having a nonvolatile memory element are improved. A first MONOS nonvolatile-memory-element and a second MONOS nonvolatile-memory-element having a large gate width compared with the first MONOS nonvolatile-memory-element are mounted together on the same substrate, and the first MONOS nonvolatile-memory-element is used for storing program data which is scarcely rewritten, and the second MONOS nonvolatile-memory-element is used for storing processed data which is frequently rewritten.
    Type: Application
    Filed: April 20, 2010
    Publication date: August 12, 2010
    Inventors: Fumitoshi Ito, Yoshiyuki Kawashima, Takeshi Sakai, Yasushi Ishii, Yasuhiro Kanamaru, Takashi Hashimoto, Makoto Mizuno, Kousuke Okuyama, Yukiko Manabe
  • Publication number: 20100201608
    Abstract: A technique that can prevent breakdown of a thin film transistor due to static electricity is provided. A manufacturing method of a display device includes, in forming a plurality of thin film transistors constituting a drive circuit outside a display region as an assembly of pixels, forming a first wiring that is connected to gate electrodes of the thin film transistors to cause the thin film transistors to perform generating operation of a drive signal and a second wiring that connects gate electrodes of the thin film transistors adjacent to one another in the forming region of the drive unit in the same layer as the first wiring, and cutting the second wiring after forming the connected thin film transistors.
    Type: Application
    Filed: February 5, 2010
    Publication date: August 12, 2010
    Inventors: Takeshi SAKAI, Takuo Kaitoh
  • Publication number: 20100144108
    Abstract: For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film.
    Type: Application
    Filed: February 16, 2010
    Publication date: June 10, 2010
    Inventors: Takeshi SAKAI, Yasushi Ishii, Tsutomu Okazaki, Masaru Nakamichi, Toshikazu Matsui, Kyoya Nitta, Satoru Machida, Munekatsu Nakagawa, Yuichi Tsukada
  • Publication number: 20100137228
    Abstract: Medicinal compositions for treating, ameliorating or preventing diseases with sensitivity to 3,6-anhydrogalactopyranose represented by formula (1): foods, drinks, cosmetics, etc. containing as the active ingredient at least one member selected from the group consisting of the above-mentioned compound, its aldehyde, its hydrate and 2-O-methylated derivatives thereof and soluble sugar compounds containing the above compound. This compound also shows, for example, an apoptosis-inducing activity, a carcinostatic activity and inhibitory activities on the production of active oxygen, lipid peroxide radicals and NO, which makes it useful also as the active ingredient of antioxidants and preservatives.
    Type: Application
    Filed: August 11, 2008
    Publication date: June 3, 2010
    Applicant: TAKARA BIO INC.
    Inventors: Tatsuji ENOKI, Hiroaki SAGAWA, Takanari TOMINAGA, Eiji NISHIYAMA, Nobuto KOYAMA, Takeshi SAKAI, Fu-Gong YU, Katsushige IKAI, Ikunoshin KATO
  • Patent number: 7730507
    Abstract: For providing a broadcast receiving apparatus and a method for staring thereof, suppressing electric power consumption therein, under waiting condition, irrespective of mounting a constituent part requiring a long time for starting up, according to the present invention, within a broadcast receiving apparatus, detection is made, always, upon an approach of a human being, by means of a human sensor 40 and a sub-CPU 60, under the condition that a power plug 75 is inserted into a commercial electric power source, so as to control supply of electric power form a main electric power source unit to each of portions of that apparatus. Thus, prior to startup of that apparatus through a main switch 22 and a remote controller 30, a constituent portion (i.e.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: June 1, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Sakai, Katsunobu Kimura
  • Patent number: 7719052
    Abstract: The degree of integration and the number of rewriting of a semiconductor device having a nonvolatile memory element are improved. A first MONOS nonvolatile-memory-element and a second MONOS nonvolatile-memory-element having a large gate width compared with the first MONOS nonvolatile-memory-element are mounted together on the same substrate, and the first MONOS nonvolatile-memory-element is used for storing program data which is scarcely rewritten, and the second MONOS nonvolatile-memory-element is used for storing processed data which is frequently rewritten.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: May 18, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Fumitoshi Ito, Yoshiyuki Kawashima, Takeshi Sakai, Yasushi Ishii, Yasuhiro Kanamaru, Takashi Hashimoto, Makoto Mizuno, Kousuke Okuyama, Yukiko Manabe