Abstract: A method of manufacturing a silicon carbide semiconductor device includes a step of preparing a silicon carbide substrate having a first main surface and a second main surface located opposite to the first main surface, a step of forming a doped region in the silicon carbide substrate by doping the first main surface with an impurity, a step of forming a first protecting film on the doped region at the first main surface, and a step of activating the impurity included in the doped region by annealing with the first protecting film having been formed, the step of forming a first protecting film including a step of disposing a material which will form the first protecting film and in which the concentration of a metal element is less than or equal to 5 ?g/kg on the first main surface.

Abstract: A method of manufacturing a silicon carbide semiconductor device includes the following steps. A silicon carbide substrate is prepared. A first mask layer is formed in contact with a first main surface of the silicon carbide substrate. The first mask layer includes a first layer disposed in contact with the first main surface, an etching stop layer disposed in contact with the first layer and made of a material different from that for the first layer, and a second layer disposed in contact with a surface of the etching stop layer opposite to the surface in contact with the first layer. A recess is formed in the first mask layer by etching the second layer and the etching stop layer. A first impurity region is formed in the silicon carbide substrate using the first mask layer with the recess. The first mask layer does not include a metallic element.

Abstract: A method for manufacturing a silicon carbide semiconductor device includes steps below. A silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface, the first main surface having a maximal diameter greater than 100 mm, is prepared. An impurity region is formed on a side of the first main surface of the silicon carbide substrate. In a plan view, a cover member is arranged on the side of the first main surface so as to cover at least the entire impurity region. The silicon carbide substrate is annealed at a temperature lower than a melting point of the cover member while the cover member is arranged on the side of the first main surface of the silicon carbide substrate.

Abstract: A silicon carbide epitaxial layer includes: a first impurity region; a second impurity region; and a third impurity region. A gate insulating film is in contact with the first impurity region, the second impurity region, and the third impurity region. A groove portion is formed in a surface of the first impurity region, the surface being in contact with the gate insulating film, the groove portion extending in one direction along the surface, a width of the groove portion in the one direction being twice or more as large as a width of the groove portion in a direction perpendicular to the one direction, a maximum depth of the groove portion from the surface being not more than 10 nm.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate, a main electrode, a first barrier layer, and an interconnection layer. The main electrode is directly provided on the silicon carbide substrate. The first barrier layer is provided on the main electrode, and is made of a conductive material containing no aluminum. The interconnection layer is provided on the first barrier layer, is separated from the main electrode by the first barrier layer, and is made of a material containing aluminum.

Abstract: A method for manufacturing a silicon carbide semiconductor device includes steps below. A silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface, the first main surface having a maximal diameter greater than 100 mm, is prepared. An impurity region is formed on a side of the first main surface of the silicon carbide substrate. In a plan view, a cover member is arranged on the side of the first main surface so as to cover at least the entire impurity region. The silicon carbide substrate is annealed at a temperature lower than a melting point of the cover member while the cover member is arranged on the side of the first main surface of the silicon carbide substrate.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate, a gate insulating film, and a gate electrode. The gate insulating film is provided as being in contact with the first main surface of the silicon carbide substrate. The gate electrode is provided on the gate insulating film such that the gate insulating film lies between the gate electrode and the silicon carbide substrate. In a first stress test in which a gate voltage of ?5 V is applied to the gate electrode for 100 hours at a temperature of 175° C., an absolute value of a difference between a first threshold voltage and a second threshold voltage is not more than 0.5 V, with a threshold voltage before the first stress test being defined as the first threshold voltage and a threshold voltage after the first stress test being defined as the second threshold voltage.

Abstract: A method of manufacturing a silicon carbide semiconductor device includes a step of preparing a silicon carbide substrate having a first main surface and a second main surface located opposite to the first main surface, a step of forming a doped region in the silicon carbide substrate by doping the first main surface with an impurity, a step of forming a first protecting film on the first main surface, and a step of forming a second protecting film on the second main surface, the step of forming a first protecting film being performed after the step of forming a doped region, the method further including a step of activating the impurity included in the doped region by annealing with at least a portion of the first main surface covered with the first protecting film and at least a portion of the second main surface covered with the second protecting film.

Abstract: A method of manufacturing a silicon carbide semiconductor device includes a step of preparing a silicon carbide substrate having a first main surface and a second main surface located opposite to the first main surface, a step of forming a doped region in the silicon carbide substrate by doping the first main surface with an impurity, a step of forming a first protecting film on the doped region at the first main surface, and a step of activating the impurity included in the doped region by annealing with the first protecting film having been formed, the step of forming a first protecting film including a step of disposing a material which will form the first protecting film and in which the concentration of a metal element is less than or equal to 5 ?g/kg on the first main surface.

Abstract: A silicon carbide semiconductor device includes a silicon carbide semiconductor layer, a gate insulating film formed on the silicon carbide semiconductor layer, and a gate electrode provided on the gate insulating film, wherein the gate electrode has a polysilicon layer at least on a side of an interface with the gate insulating film, and the gate insulating film has an oxide film derived from the polysilicon layer, at an interface between the gate insulating film and the polysilicon layer of the gate electrode.

Abstract: A silicon carbide semiconductor substrate includes: a base substrate that has a main surface having an outer diameter of not less than 100 mm and that is made of single-crystal silicon carbide; and an epitaxial layer formed on the main surface, a groove being formed in a main surface of the epitaxial layer or a backside surface of the base substrate opposite to the main surface of the base substrate. In this way, the groove suppresses the substrate from being deformed (warped during a high temperature treatment, for example). This can reduce a risk of causing defects such as crack in the silicon carbide semiconductor substrate during the manufacturing process in performing a method for manufacturing a silicon carbide semiconductor device using the silicon carbide semiconductor substrate.

Abstract: A silicon carbide semiconductor substrate includes: a base substrate that has a main surface having an outer diameter of not less than 100 mm and that is made of single-crystal silicon carbide; and an epitaxial layer formed on the main surface. The silicon carbide semiconductor substrate has an amount of warpage of not less than ?100 ?m and not more than 100 ?m when a substrate temperature is a room temperature and has an amount of warpage of not less than ?1.5 mm and not more than 1.5 mm when the substrate temperature is 400° C.

Abstract: A silicon carbide semiconductor device includes a silicon carbide layer and a gate insulating layer. The silicon carbide layer has a main surface. The gate insulating layer is arranged as being in contact with the main surface of the silicon carbide layer. The silicon carbide layer includes a drift region having a first conductivity type, a body region having a second conductivity type different from the first conductivity type and being in contact with the drift region, a source region having the first conductivity type and arranged as being spaced apart from the drift region by the body region, and a protruding region arranged to protrude from at least one side of the source region and the drift region into the body region, being in contact with the gate insulating layer, and having the first conductivity type.

Abstract: A silicon carbide semiconductor substrate includes: a base substrate that has a main surface having an outer diameter of not less than 100 mm and that is made of single-crystal silicon carbide; an epitaxial layer formed on the main surface; and a deformation suppression layer formed on a backside surface of the base substrate opposite to the main surface. In this way, the deformation suppression layer suppresses the substrate from being deformed (for example, warped during high-temperature treatment). This can reduce a risk of causing defects such as crack in the silicon carbide semiconductor substrate during the manufacturing process in performing a method for manufacturing a silicon carbide semiconductor device using the silicon carbide semiconductor substrate.

Abstract: The steps of preparing a silicon carbide layer having a main surface, forming on the main surface, a first mask layer located on a first region to be a channel region and having a first opening portion on each of opposing regions with the first region lying therebetween, and forming a high-concentration impurity region having a first conductivity type and being higher in impurity concentration than the silicon carbide layer in a region exposed through the first opening portion, by implanting ions into the main surface with the first mask layer being interposed are included.

Abstract: Included are the steps of: preparing a silicon carbide substrate having an epitaxial layer formed thereon; forming an upper-layer film on the epitaxial layer; and removing at least a portion of the upper-layer film in an outer peripheral portion of the silicon carbide substrate, and patterning the upper-layer film.

Abstract: A method for manufacturing a silicon carbide substrate includes the following steps. There is prepared a silicon carbide single crystal substrate having a first main surface, a second main surface, and a first side end portion, the second main surface being opposite to the first main surface, the first side end portion connecting the first main surface and the second main surface to each other, the first main surface having a width with a maximum value of more than 100 mm. A silicon carbide epitaxial layer is formed in contact with the first side end portion, the first main surface, and a boundary between the first main surface and the first side end portion. The silicon carbide epitaxial layer formed in contact with the first side end portion and the boundary is removed.

Abstract: A first impurity region is formed by ion implantation of a first impurity into a first main surface of a silicon carbide substrate. A metal layer is formed in contact with the first impurity region. By annealing the silicon carbide substrate and the metal layer, an electrode is formed. The metal layer is formed such that a concentration of a first impurity at a boundary portion between the metal layer and the first impurity region becomes less than a maximum value of a concentration of the first impurity in the first impurity region. The electrode is formed such that a concentration of the first impurity at a boundary portion between the electrode and the first impurity region becomes not less than 80% of a maximum value of a concentration of the first impurity in the first impurity region in a normal direction.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate, a main electrode, a first barrier layer, and an interconnection layer. The main electrode is directly provided on the silicon carbide substrate. The first barrier layer is provided on the main electrode, and is made of a conductive material containing no aluminum. The interconnection layer is provided on the first barrier layer, is separated from the main electrode by the first barrier layer, and is made of a material containing aluminum.

Abstract: A method of manufacturing a semiconductor device includes the steps of preparing a semiconductor layer including a wide bandgap semiconductor, the semiconductor layer having an element region and an outer peripheral region surrounding an outer periphery of the element region when viewed two-dimensionally, forming a step portion surrounding the outer periphery of the element region in the outer peripheral region, and forming a metal layer along the step portion. The step portion has a sidewall recessed downward from a main surface of the element region in a cross section parallel to a thickness direction of the semiconductor layer, and the metal layer extends to cover at least a portion of the sidewall. The method of manufacturing a semiconductor device further includes the step of dividing the semiconductor layer into the element regions on an outside of the step portion when viewed from the element region.