Abstract: The present disclosure includes a method of determining optical signal-to-noise ratio (OSNR) of a signal, comprising separating one polarization component from a plurality of polarization components in an optical signal, selecting one wavelength from a plurality of wavelengths in the optical signal, delaying a first portion of the one polarization component of the one wavelength of the optical signal, shifting a phase of the first portion by a first amount and the first amount plus pi radians, causing the first portion to interfere with a second portion, measuring a power of the interference of the first and second portions, receiving the power of the interference, and comparing the power of the interference when the phase is shifted by the first amount with the interference when the phase is shifted by the first amount plus pi radians to determine OSNR. The present disclosure also includes associated devices.

Abstract: Provided is a method that, in the case of managing areas of a non-volatile memory of an information recording module by a file system, increases the speed of processing for writing file data and file system management information, and furthermore prevents a decrease in the rewriting lifetime of the non-volatile memory. The information recording module (2) is provided with a page cache control unit (217) that stores page cache information (224) in the non-volatile memory (22) of the information recording module (2) and performs control such that a specific physical block is used as a cache when writing small-sized data. Also, an access module (1) is provided with a page cache information setting unit (104) that sets information necessary for page cache control in the information recording module (2).

Abstract: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A size of a partition control area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.

Abstract: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A size of a partition control area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.

Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.

Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.

Abstract: A functional device can communicate with an access apparatus through wireless communication. At least one additional device can be connected to the functional device. The functional device includes an access controller that performs an initialization process of the additional device to obtain characteristic information of the additional device from the additional device, before establishing communication between the access apparatus and the functional device, a memory that stores the obtained characteristic information, a communication unit that performs transmission and reception of data with the access apparatus, and a communication controller that transmits the characteristic information stored in the memory to the access apparatus without performing an initialization process of the additional device, upon establishment of communication with the access apparatus by the communication unit.

Abstract: A functional device can communicate with an access apparatus. The functional device includes an access controller that controls an additional device and obtains characteristic information of the additional device at an initialization process of the additional device, a memory that stores the obtained characteristic information, a communication unit that transmits and receives data to and from the access apparatus, and a communication controller that transmits the characteristic information stored in the memory to the access apparatus, when receiving a request for the initialization process from the access apparatus through the communication unit after transferring an exclusive right to the access apparatus, the exclusive right being a right to exclusively control the additional device.

Abstract: An access device 100 includes an access speed information part 112 for informing an access speed required for data recording by the access device 100 to a nonvolatile memory device 200. The nonvolatile memory device includes an access condition determination part 212 for determining an access condition required for meeting the informed access speed and an access area determination unit 213 for determining an access area according to the determined access condition. The access device 100 informs the required access speed to the nonvolatile memory device 200 in advance so that the access condition determination part 212 and the access area determination part 213 in the nonvolatile memory device 200 realize data recording which meets the access speed informed in advance upon the data recording. Thus, it is possible to access all the nonvolatile memory devices at a desired speed regardless of difference in characteristics of the recording speed of each of the nonvolatile memory devices.

Abstract: When multiple pieces of content data are being recorded continuously to a nonvolatile storage device having page cache function, a preparation time before starting next content data recording is reduced. When a cache releasing section of a nonvolatile storage device (1) receives cache releasing from an access device (2), it releases addresses included in one logical block among multiple addresses which are cache objects at the same time. Further, the nonvolatile storage device (1) includes a cache information outputting section which outputs information regarding a time period required for releasing addresses which are cache objects outside, and the access device (2) refers to the information to select the address to be an object of releasing.

Abstract: An access device 1 internally includes a logical-physical empty capacity management part 16 for obtaining information of a remaining capacity on a write once memory from a write once recording device 2A. In addition, the write once recording device 2A internally includes a physical empty capacity management part 27 for managing a remaining capacity on the write once memory and notifying the access device of the capacity. Prior to recording of file data, the access device 1 can know an accurate remaining capacity of the write once recording device by: obtaining a remaining capacity of the write once memory from the write once recording device 2A; and comparing the capacity with a remaining capacity on an FAT to decide an actually-recordable remaining capacity for file data.

Abstract: The access device comprises a memory and a device controller configured to send and receive a data control right between the data recording device and a central controller provided in a host device. When having received a request to interrupt transfer of data from the central controller while data is being transferred from the data recording device, the device controller releases the data control right from the data recording device, and has the data recording device determine whether or not mismatching has occurred in file system management information for data stored in the memory. The device controller then returns the data control right to the data recoding device when it is determined that mismatching has occurred in the file system management information. The data recording device releases the data control right after eliminating the mismatching in the file system management information according to the returned data control right.

Abstract: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A data length NOM of an area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.

Abstract: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A size of the partition control area of an area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.

Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.

Abstract: Without corresponding to different address spaces between an access device and a nonvolatile memory device, the access device designates a file ID to manage a data storing state only in a physical address space in the nonvolatile memory device. The access device sends the nonvolatile memory device a transfer rate through a transfer rate transmitting unit. A filling-up rate calculating unit calculates a filling-up rate of a physical block corresponding to an assurance speed required by the access device. A remaining amount corresponding to the transfer rate is sought by using the calculated filling-up rate and is transmitted to a remaining amount receiving unit of the access device.

Abstract: An optical transmission node including an optical preamplifier to amplify input light and an optical postamplifier to amplify light output from the optical preamplifier, includes the optical postamplifier configured to generate amplified spontaneous emission light without signals input, the optical preamplifier configured to amplify the amplified spontaneous emission light from the optical postamplifier, a loopback switch configured to discouple a path of the light output from the optical preamplifier to the optical postamplifier, and couple a path of the light output from the optical postamplifier to the optical preamplifier.

Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.

Abstract: A recording medium (100) for storing content that can be read and written by a host device stores a content key (a key that is used for encrypting content) (805a) encrypted in a first format, and a content key (805b) that is encrypted in a second format for content that is the same as the content related to the content key (805a) encrypted in the first format. The first format is, for example, a format used for distributed content, and the second format is a format used with local content.

Abstract: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A data length NOM of an area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.