Patents by Inventor Takuji Maeda

Takuji Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8209504
    Abstract: When an access device accesses a nonvolatile memory device, the nonvolatile memory device or the access device detects or calculates a temperature T of the nonvolatile memory device. A temperature-adaptive control part of the nonvolatile memory device controls an access rate to a nonvolatile memory on the basis of the temperature T. Accordingly, the control part controls the rate so that the temperature T of the nonvolatile memory devices cannot exceed a limit temperature Trisk. In this manner, a nonvolatile memory system can eliminate a risk of a burn when ejecting the semiconductor memory device and can read and write data at a high speed.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: June 26, 2012
    Assignee: Panasonic Corporation
    Inventors: Masahiro Nakanishi, Isao Kato, Masayuki Toyama, Tatsuya Adachi, Hirofumi Nakagaki, Takuji Maeda
  • Patent number: 8190912
    Abstract: An development environment of a high security level is provided for a key-installed system. Development of a program for a system having an LSI device which includes a secure memory is performed by providing another LSI device having the same structure and setting the provided LSI device to a development mode which is different from a product operation mode. Alternatively, the provided LSI device is set to an administrator mode to perform development and encryption of a key-generation program. The LSI device is set to a key-generation mode to execute the encrypted key-generation program, thereby generating various keys.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: May 29, 2012
    Assignee: Panasonic Corporation
    Inventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
  • Publication number: 20120131301
    Abstract: A method used in an access module that uses a file system to manage a nonvolatile memory of an information recording module enables an available storage space to be calculated in a short time before file data is recorded, and shortens the time required from initialization of the file system to recording. An access module (1) manages information about area management of the file system configured in an information recording module in units of fixed-length blocks. A divisional available storage space calculation unit (103) performs an available storage space calculation process in units of the fixed-length blocks, and completes preparations for recording when detecting a minimum required storage space for recording file data and enables recording of the file data. This shortens the time required from initialization of the file system to recording.
    Type: Application
    Filed: June 5, 2009
    Publication date: May 24, 2012
    Inventors: Takuji Maeda, Tsutomu Mori, Masafumi Nosaka, Takeshi Umemoto
  • Patent number: 8185705
    Abstract: An information recording medium such as a semiconductor memory card includes a first semiconductor memory having a first recording area accessed by a relatively small access unit and storing file system management information, a second semiconductor memory having a second recording area accessed by a relatively large access unit and storing file data (file entity data), and a controller for controlling the first and second semiconductor memories. The information recording medium selects either one of recording areas of the first and second semiconductor memories depending on the data type, and writes data into the selected recording area.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: May 22, 2012
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Masahiro Nakanishi, Shinji Inoue, Hirokazu Sou
  • Patent number: 8176239
    Abstract: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A data length NOM of an area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: May 8, 2012
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Teruto Hirota
  • Publication number: 20120102264
    Abstract: Without corresponding to different address spaces between an access device and a nonvolatile memory device, the access device designates a file ID to manage a data storing state only in a physical address space in the nonvolatile memory device. The access device sends the nonvolatile memory device a transfer rate through a transfer rate transmitting unit. A filling-up rate calculating unit calculates a filling-up rate of a physical block corresponding to an assurance speed required by the access device. A remaining amount corresponding to the transfer rate is sought by using the calculated filling-up rate and is transmitted to a remaining amount receiving unit of the access device.
    Type: Application
    Filed: December 29, 2011
    Publication date: April 26, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Tadashi ONO, Tatsuya ADACHI, Masahiro NAKANISHI, Takuji MAEDA
  • Patent number: 8166231
    Abstract: The access device 100 designates a file ID without relating different address spaces of an access device 100 and a nonvolatile memory device 200 with each other and manages a data storing state only in a physical address space in the nonvolatile memory device 200. The access device 100 sends a transfer rate to the nonvolatile memory device 200 by using a transfer rate sending part 121. A filling rate calculation part 251 calculates a filling rate of physical block corresponding to a guaranteed speed required by the access device 100. A remaining capacity corresponding to the transfer rate is obtained by using the calculated filling rate and is sent to a remaining capacity receiving part 122 of the access device 100.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: April 24, 2012
    Assignee: Panasonic Corporation
    Inventors: Tadashi Ono, Tatsuya Adachi, Masahiro Nakanishi, Takuji Maeda
  • Patent number: 8161225
    Abstract: A card information-storing portion is provided in a semiconductor memory card, and information relating to access performance such as access condition and access rate is held in the storing portion. Further, an access device acquires the held information from the semiconductor memory card to make it possible that the information can be used for control of a file system. This optimizes processing of the access device and the semiconductor memory card independent of differences in characteristics of semiconductor memory cards and management methods used, realizing high-rate access from the access device to a semiconductor memory card.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: April 17, 2012
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Shinji Inoue, Yoshiho Gotoh, Jun Ohara, Masahiro Nakanishi, Shoichi Tsujita, Tomoaki Izumi, Tetsushi Kasahara, Kazuaki Tamura, Kiminori Matsuno, Koichi Horiuchi, Manabu Inoue, Makoto Ochi
  • Patent number: 8122262
    Abstract: A secure LSI device 1 includes an encryption section 2 for encrypting a program, and an external I/F 50 for inputting/outputting a program or data from/to an external memory 100. In the encryption section 2, the operation of a private key arithmetic processing section 20 is prohibited with respect to a sequence whose execution is determined by a key-generation/update sequencer 30 to be impermissible. In the external I/F 50, a program processing section 51 and a data processing section 55 are structured independently from each other.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: February 21, 2012
    Assignee: Panasonic Corporation
    Inventors: Makoto Fujiwara, Yusuke Nemoto, Junichi Yasui, Takuji Maeda, Takayuki Ito, Yasushi Yamada, Shinji Inoue
  • Patent number: 8112575
    Abstract: A file to be read or written is designated and accessed from an access device side to a nonvolatile memory device. In an initialization after start-up of the power source, an empty capacity detector detects empty capacity parameters of a nonvolatile memory with dividing the memory into a plurality of regions. An empty capacity parameter notification part notifies the access device of the empty capacity parameters in a stepwise fashion whenever the empty capacity detector detects an empty capacity. With this, at the time when the empty capacity becomes not less than a capacity required to write file data, the data can be written to the nonvolatile memory without waiting for completion of the initialization, resulting in improvement of a response in the recording.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: February 7, 2012
    Assignee: Panasonic Corporation
    Inventors: Masahiro Nakanishi, Takuji Maeda, Toshiyuki Honda, Tatsuya Adachi
  • Patent number: 8090920
    Abstract: A recording medium stores contents and contents keys to be used for encrypting the contents, in a plurality of storage formats. The storage formats include a storage format (a first format) for delivered contents acquired through a network, and a storage format (a second format) for local contents acquired by a method other than the delivery. The intrinsic storage formats of the contents to be stored in the recording medium are determined according to the kinds of the contents. The recording medium stores not only the contents and the contents keys but also original storage format information (an import flag) (851) which is information indicating the intrinsic storage formats of the contents. With reference to the original storage format information, a reproduction device selects a reproduction method in accordance with the intrinsic storage formats of the contents.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: January 3, 2012
    Assignee: Panasonic Corporation
    Inventors: Hirokazu So, Makoto Ochi, Takuji Maeda, Masato Suto, Kazuya Fujimura, Shinji Inoue, Yukiko Inoue
  • Publication number: 20110320692
    Abstract: Provided is a method for stabilizing and increasing the speed of processing for writing a plurality of different-sized files such as a video file and a management file in parallel in the case where the area in a non-volatile memory of an information recording module is managed by a file system. An access module (1) includes a means for retaining sequential areas in logical block units as areas for writing file data, and a means for realizing file data addition and overwriting by writing data to logical blocks and changing links in a FAT regardless of whether file data addition or overwriting is performed. Writing to the information recording module is performed by writing to sequential addresses in the logical blocks. This realizes the stabilization of and an increase in the file data recording speed by suppressing needless copy processing performed in the information recording module 2 in the case of recording a plurality of files such as a video file and a management file in parallel.
    Type: Application
    Filed: October 19, 2010
    Publication date: December 29, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Takuji Maeda, Masayuki Toyama, Hirokazu So, Yoshinori Nakashima, Katsumi Watanabe, Masafumi Nosaka
  • Publication number: 20110302225
    Abstract: An information recording device, which includes a nonvolatile memory whose areas are managed using an FAT file system and enhances the reliability of directory entries using a cyclic shift checksum, recalculates the cyclic shift checksum efficiently and performs seeking at a higher speed. A nonvolatile memory (25) of an information recording device 2 is managed using an FAT file system. In the memory, a plurality of directory entries are allocated to a single file. The device enhances the reliability of the directory entries using a cyclic shift checksum, and manages information indicating the position and the size of a storage area of file data using an extent information entry (203). The device further uses an update information entry (204) and a dummy entry (205).
    Type: Application
    Filed: August 5, 2011
    Publication date: December 8, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Takuji MAEDA, Shinji INOUE
  • Patent number: 8069306
    Abstract: Area management information is cached in a cache memory by controlling the access size when an information processor accesses the area management information in an information recording medium. When the processing content of the information processor is to retrieve a free area from the area management information, a physical management block size determined from the physical characteristics of the information recording medium is used. When the processing content is to acquire a link destination from the area management information, minimum access unit of the information recording medium is used. Consequently, overhead can be lessened when the area management information is accessed.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: November 29, 2011
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Masato Suto, Hirokazu So, Makoto Ochi, Shinji Inoue
  • Publication number: 20110282740
    Abstract: To combine thrifty power consumption with up-to-dateness of displayed information, an information processing apparatus (100) includes: a battery unit (114); a remaining amount determining unit (113) which determines a remaining battery amount; a display unit (111) having a memory characteristic; a power-off determining unit (116) which specifies an amount of power to be supplied from the battery unit to the information processing apparatus that is equal to or less than a predetermined amount; a timer unit (115) which controls a start of supplying power at a predetermined time; and a control unit (110) which (i) causes the timer unit to set the predetermined time, and causes the amount of the power to be equal to or less than the predetermined amount, and (ii) displays, on the display unit, information about the remaining battery amount when the timer unit starts the supply of the power to the information processing apparatus.
    Type: Application
    Filed: June 30, 2010
    Publication date: November 17, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Makoto Ochi, Takuji Maeda, Monta Nakatsuka, Kazuya Fujimura, Seiji Nakazawa
  • Publication number: 20110283076
    Abstract: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A data length NOM of an area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.
    Type: Application
    Filed: July 27, 2011
    Publication date: November 17, 2011
    Inventors: Takuji MAEDA, Teruto Hirota
  • Publication number: 20110264842
    Abstract: A lifetime parameter generation part 128 generates a lifetime parameter related to a lifetime of a nonvolatile memory device 110. When the remaining lifetime has become short, a mode switching part 129 switches a read-write mode of a read-write control part 124 from a rewritable mode to a write once mode and notifies an access device 100 that the mode has been switched to the write once mode. Thus, a user can easily recognize the moment when an apparatus having the built-in nonvolatile memory cannot be used, and, immediately before the lifetime is over, the mode can be automatically switched to the write once mode in which writing can be carried out only once.
    Type: Application
    Filed: June 12, 2008
    Publication date: October 27, 2011
    Inventors: Masahiro Nakanishi, Takuji Maeda
  • Publication number: 20110225370
    Abstract: When multiple pieces of content data are being recorded continuously to a nonvolatile storage device having page cache function, a preparation time before starting next content data recording is reduced. When a cache releasing section of a nonvolatile storage device (1) receives cache releasing from an access device (2), it releases addresses included in one logical block among multiple addresses which are cache objects at the same time. Further, the nonvolatile storage device (1) includes a cache information outputting section which outputs information regarding a time period required for releasing addresses which are cache objects outside, and the access device (2) refers to the information to select the address to be an object of releasing.
    Type: Application
    Filed: August 10, 2010
    Publication date: September 15, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Hirokazu So, Takuji Maeda, Masayuki Toyama
  • Patent number: 8019800
    Abstract: An information recording device, which includes a nonvolatile memory whose areas are managed using an FAT file system and enhances the reliability of directory entries using a cyclic shift checksum, recalculates the cyclic shift checksum efficiently and performs seeking at a higher speed. A nonvolatile memory (25) of an information recording device 2 is managed using an FAT file system. In the memory, a plurality of directory entries are allocated to a single file. The device enhances the reliability of the directory entries using a cyclic shift checksum, and manages information indicating the position and the size of a storage area of file data using an extent information entry (203). The device further uses an update information entry (204) and a dummy entry (205).
    Type: Grant
    Filed: April 1, 2009
    Date of Patent: September 13, 2011
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Shinji Inoue
  • Patent number: 8015349
    Abstract: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A data length NOM of an area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: September 6, 2011
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Teruto Hirota