Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, a well of the first conductivity type formed in the semiconductor substrate, a transistor formed in the well, a diffusion region of a second conductivity type formed in the semiconductor substrate so as to cover a lateral side and a bottom edge of the well, a terminal formed on the semiconductor substrate at an outside part of the diffusion region, and a conductive region contacting with the well, the well being in ohmic contact with the terminal via the conductive region and the semiconductor substrate, the conductive region having an impurity concentration level exceeding an impurity concentration level of the semiconductor substrate.

Abstract: A semiconductor device in which potential is uniformly controlled and in which the influence of noise is reduced. A p-type well region is formed beneath a surface of a p-type Si substrate. n-type MOS transistors are formed on the p-type well region. An n-type well region is formed in the p-type Si substrate so that it surrounds the p-type well region. A plurality of conductive regions which pierce through the n-type well region are formed at regular intervals. By doing so, parasitic resistance from the p-type Si substrate, through the plurality of conductive regions, to the n-type MOS transistors becomes low. Accordingly, when back bias is applied to a contact region, the back bias potential of the n-type MOS transistors can be controlled uniformly. As a result, the influence of noise from the p-type Si substrate or the p-type well region can be reduced.

Abstract: An active region and an opposite conductivity active region are formed in a semiconductor substrate. The opposite conductivity active region is covered with a resist pattern. Impurities are implanted into a surface layer of the active region. An angle ?0 is defined as a tilt angle obtained by tilting a virtual plane perpendicular to the substrate and including an edge of the active region, toward the resist pattern by using as a fulcrum a point on the substrate nearest to the resist pattern, until the virtual plane contacts the resist pattern. The ion implantation is performed in a direction having a tilt angle larger than ?0 and allowing ions passed through the uppermost edge of the resist pattern to be incident upon an area between the resist pattern and the active region, and is not performed along a direction allowing the ions to be incident upon the active region.

Abstract: The present invention provides a method for manufacturing a semiconductor device which includes a step of forming one optional impurity region in a semiconductor substrate at a place apart from the surface thereof, and in the method described above, ion implantation is performed a plurality of times while the position of an end portion of a mask pattern used for ion implantation is changed.

Abstract: The semiconductor device comprises a semiconductor substrate 10 of a first conduction type, a first well 32a of the first conduction type formed in the semiconductor substrate 10, a second well 32b of a second conduction type formed in the semiconductor substrate 10, and an impurity layer 14 of the second conduction type buried in the semiconductor substrate 10 below the first well 32a and below the second well 32b and connected to the second well 32b, for applying a bias voltage to the second well 32b, a contact region 34 of the first conduction type are formed selectively in the impurity layer 14 immediately below the first well 32a, and the first well 32a is connected to the semiconductor substrate 10 via the contact region 34.

Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, a well of the first conductivity type formed in the semiconductor substrate, a transistor formed in the well, a diffusion region of a second conductivity type formed in the semiconductor substrate so as to cover a lateral side and a bottom edge of the well, a terminal formed on the semiconductor substrate at an outside part of the diffusion region, and a conductive region contacting with the well, the well being in ohmic contact with the terminal via the conductive region and the semiconductor substrate, the conductive region having an impurity concentration level exceeding an impurity concentration level of the semiconductor substrate.

Abstract: A MOS transistor has a gate electrode formed on a semiconductor substrate via a gate insulation film and a source and a drain formed on both sides of the gate electrode, wherein, with sidewall films each consisting of two layers (a thin first film and a second film for covering the first film), a lower part of the first film, that is, only a side lower portion of the gate electrode becomes a local low permittivity region to be filled in with a low permittivity material, and then the second film is formed to cover the low permittivity material.

Abstract: The invention provides an anticarcinogenic drug composition which effectively inhibits the recurrence of hepatocellular carcinoma (the occurrence of second primary tumor), the occurrence of hepatocellular carcinoma in high risk groups with chronic hepatitis and liver cirrhosis, the occurrence of cervical carcinoma intraepitheliale, lung adenocarcinoma, lung squamous cell carcinoma, mammary tumor, and the like and is highly safe. The anticarcinogenic drug composition contains 3,7,11,15-tetramethyl-2,4,6,10,14-hexadecapentaenoic acid or a salt thereof.