Abstract: According to one embodiment, a memory device includes: a first layer stack including first insulating layers arranged in a first direction and spaced apart from one another; second and third layer stacks, each including conductive layers spaced apart from one another and provided at levels of layers identical to the first insulating layers, respectively, and being spaced apart from each other; a memory pillar extending in the first direction in the third layer stack, a portion of the memory pillar intersecting each of the conductive layers functioning as a memory cell; a first member in contact with the first and second layer stacks between the first and second layer stacks and extending in a second direction; and a second member in contact with the second and third layer stacks between the second and third layer stacks and extending in the second direction.

Abstract: According to one embodiment, a semiconductor device manufacturing method includes forming a stacked film with alternating first-type sacrificial layers and second-type sacrificial layers, then removing the first-type sacrificial layers from the stacked film to leave the second-type sacrificial layers with spaces therebetween. The second-type sacrificial layers are then each replaced with an insulating layer after removing the first-type sacrificial layers. After the second-type sacrificial layers are replaced with the insulating layer, a conductive layer is formed inside the spaces formed by removing the first-type sacrificial layers.

Abstract: A semiconductor device according to an embodiment includes a substrate, a transistor, an insulating layer, and a first sealing portion. The substrate includes a first region, and a second region provided to surround an outer periphery of the first region. The transistor is provided on the substrate in the first region. The insulating layer is provided above the transistor and over the first region and the second region. The first sealing portion is provided to divide the insulating layer and surround the outer periphery of the first region in the second region. The first sealing portion includes a first void.

Abstract: According to one embodiment, a semiconductor device includes a first substrate, a second substrate joined to the first substrate. A first region of the semiconductor device that includes a peripheral circuit is between the first substrate and the second substrate. A second region that includes a memory cell array is between the first region and the second substrate. A layer that is embedded in the second substrate has a Young's modulus that is higher than that of silicon and/or an internal stress that is higher than that of silicon oxide.

Abstract: According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer.

Abstract: A semiconductor storage device includes a stacked body in which a plurality of conductive layers and a plurality of insulating layers are alternately stacked along a stacking direction, and a plurality of first pillars extending in the stacked body along the stacking direction to form memory cells at intersections with at least some of the plurality of conductive layers. The stacked body includes a stair portion in which the plurality of conductive layers are stacked in a stepped manner at a position separated from the plurality of first pillars in a first direction intersecting the stacking direction. At least a lowermost insulating layer of the plurality of insulating layers has at least one bending portion bent in the stacking direction at an end of the plurality of conductive layers in the stair portion along the first direction.

Abstract: According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer.

Abstract: According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer.

Abstract: A radially biasing portion (19) of a pad spring (14) includes a first extending portion (19A) extending from a lower surface plate (18B) of a guide plate portion (18) outwardly in a disc axial direction, a curled portion (19B) folded on a distal end side of the first extending portion, and a second extending portion (19C) extending from the curled portion in a direction approaching a disc (1), the second extending portion with which an ear portion (11A) of a friction pad (10) comes into contact. A contact portion (20) extends from the second extending portion of the radially biasing portion (19) toward a middle of the friction pad in a disc rotational direction of the friction pad. The contact portion comes into surface contact with a contacted surface (11B) as a lateral surface of the friction pad (backing plate 11) in the disc rotational direction.

Abstract: The present invention relates to a conductive paste for bonding that comprises a metal powder and a solvent, wherein the metal powder comprises a first metal powder having a particle diameter (D50) of 10 to 150 nm and a second metal powder having a particle diameter (D50) of 151 to 500 nm. The paste is useful for manufacturing an electronic device comprising a substrate with an electrically conductive layer and an electrical or electronic component, which are reliably bonded together using the paste.

Abstract: According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer.

Abstract: A radially biasing portion (19) of a pad spring (14) includes a first extending portion (19A) extending from a lower surface plate (18B) of a guide plate portion (18) outwardly in a disc axial direction, a curled portion (19B) folded on a distal end side of the first extending portion, and a second extending portion (19C) extending from the curled portion in a direction approaching a disc (1), the second extending portion with which an ear portion (11A) of a friction pad (10) comes into contact. A contact portion (20) extends from the second extending portion of the radially biasing portion (19) toward a middle of the friction pad in a disc rotational direction of the friction pad. The contact portion comes into surface contact with a contacted surface (11B) as a lateral surface of the friction pad (backing plate 11) in the disc rotational direction.

Abstract: According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer.

Abstract: According to an embodiment, a semiconductor memory device includes a substrate, a stacked body and a columnar portion. The columnar portion is provided inside the stacked body and includes a semiconductor portion extending in a first direction. The columnar portion has widths having mutually-different sizes in a second direction perpendicular to the first direction. The widths include first and second widths. The first width is a width of the columnar portion positioned inside a first electrode film of lowermost layer of the electrode films. The first width is substantially the same width at positions in the first direction of the columnar portion. The second width is a width of the columnar portion positioned inside a second electrode film of the electrode films. The second width is substantially the same width at positions in the first direction of the columnar portion. The first width is smaller than the second width.

Abstract: According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer.

Abstract: According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer.

Abstract: According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer.

Abstract: According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer.

Abstract: The present invention relates to a conductive paste for bonding that comprises a metal powder and a solvent, wherein the metal powder comprises a first metal powder having a particle diameter (D50) of 10 to 150 nm and a second metal powder having a particle diameter (D50) of 151 to 500 nm. The paste is useful for manufacturing an electronic device comprising a substrate with an electrically conductive layer and an electrical or electronic component, which are reliably bonded together using the paste.

Abstract: According to an embodiment, a semiconductor memory device comprises first wiring lines, second wiring lines, and first variable resistance elements. The first wiring lines are arranged in a first direction and have as their longitudinal direction a second direction intersecting the first direction. The second wiring lines are arranged in the second direction and have the first direction as their longitudinal direction. The first variable resistance elements are respectively provided at intersections of the first wiring lines and the second wiring lines. In addition, this semiconductor memory device comprises a first contact extending in a third direction that intersects the first direction and second direction and having one end thereof connected to the second wiring line. The other end and a surface intersecting the first direction of this first contact are covered by a first conductive layer.