Abstract: The invention relates to heterocyclic sulfonamide derivatives and their use in the treatment and prophylaxis of autoimmune, inflammatory, cardiovascular, neuronal, auditory, renal and metabolic mediated diseases, and to compositions containing said derivatives and processes for their preparation.

Abstract: According to one embodiment, a cause analyzing apparatus includes a processing circuit. The processing circuit acquires a reference data group and target data. The processing circuit calculates an outlier score of an explanatory variable of the target data. The processing circuit calculates a relationship weight representing strength of a relationship between an objective variable and the explanatory variable of the reference data group. The processing circuit calculates a property weight representing a degree of match between values of the objective variable and the explanatory variable of the target data. The processing circuit calculates a cause score of the explanatory variable based on the outlier score, the relationship weight, and the property weight.

Abstract: The invention relates to heterocyclic sulfonamide derivatives and their use in the treatment and prophylaxis of autoimmune, inflammatory, cardiovascular, neuronal, auditory, renal and metabolic mediated diseases, and to compositions containing said derivatives and processes for their preparation.

Abstract: A display device according to the disclosure includes a substrate, a first transistor provided on the substrate, and a second transistor provided on the substrate, not overlapping the first transistor. The first transistor includes a polycrystalline silicon layer provided on the substrate, a first insulating film provided on the polycrystalline silicon layer, a first gate electrode provided on the first insulating film, and a second insulating film provided on the first gate electrode. The second transistor includes an oxide semiconductor layer provided on the first insulating film, a third insulating film provided on the oxide semiconductor layer, and a second gate electrode provided on the third insulating film. The first and third insulating films are SiOx films. The second insulating film is an SiNx film including hydrogen, and is provided overlapping the polycrystalline silicon layer, and is provided not overlapping the oxide semiconductor layer.

Abstract: A display device according to the disclosure includes a substrate, a first transistor provided on the substrate, and a second transistor provided on the substrate, not overlapping the first transistor. The first transistor includes a polycrystalline silicon layer provided on the substrate, a first insulating film provided on the polycrystalline silicon layer, a first gate electrode provided on the first insulating film, and a second insulating film provided on the first gate electrode. The second transistor includes an oxide semiconductor layer provided on the first insulating film, a third insulating film provided on the oxide semiconductor layer, and a second gate electrode provided on the third insulating film. The first and third insulating films are SiOx films. The second insulating film is an SiNx film including hydrogen, and is provided overlapping the polycrystalline silicon layer, and is provided not overlapping the oxide semiconductor layer.

Abstract: A display device according to the disclosure includes a substrate, a first transistor provided on the substrate, and a second transistor provided on the substrate, not overlapping the first transistor. The first transistor includes a polycrystalline silicon layer provided on the substrate, a first insulating film provided on the polycrystalline silicon layer, a first gate electrode provided on the first insulating film, and a second insulating film provided on the first gate electrode. The second transistor includes an oxide semiconductor layer provided on the first insulating film, a third insulating film provided on the oxide semiconductor layer, and a second gate electrode provided on the third insulating film. The first and third insulating films are SiOx films. The second insulating film is an SiNx film including hydrogen, and is provided overlapping the polycrystalline silicon layer, and is provided not overlapping the oxide semiconductor layer.

Abstract: According to an embodiment, an information processing apparatus includes a computing unit and a compressing unit. The computing unit is configured to execute computation of an input layer, a hidden layer, and an output layer of a neural network. The compressing unit is configured to irreversibly compress output data of at least a part of the input layer, the hidden layer, and the output layer and output the compressed data.

Abstract: The invention relates to heterocyclic sulfonamide derivatives and their use in the treatment and prophylaxis of autoimmune, inflammatory, cardiovascular, neuronal, auditory, renal and metabolic mediated diseases, and to compositions containing said derivatives and processes for their preparation.

Abstract: To provide a fuel cell stack device that is applicable to miniaturization of the device and does not require a pipe for discharging off-gas up to a combustion section. A fuel cell stack device including: a first manifold 2a for supplying fuel gas supplied from a reformer 12 to a plurality of fuel cells provided in a first cell stack from above, the first manifold being connected to upper ends of the plurality of fuel cells provided in the first cell stack 10a; and a second manifold 2b for recovering fuel gas discharged from the first cell stack, and supplying the recovered fuel gas to the plurality of fuel cells provided in the second cell stack from below, the second manifold being connected to lower ends of the plurality of fuel cells provided in the second cell stack 10b.

Abstract: A production method of a compound represented by the formula [I]: or a pharmaceutically acceptable salt thereof, or a hydrate thereof.

Abstract: A display device according to the disclosure includes a substrate, a first transistor provided on the substrate, and a second transistor provided on the substrate, not overlapping the first transistor. The first transistor includes a polycrystalline silicon layer provided on the substrate, a first insulating film provided on the polycrystalline silicon layer, a first gate electrode provided on the first insulating film, and a second insulating film provided on the first gate electrode. The second transistor includes an oxide semiconductor layer provided on the first insulating film, a third insulating film provided on the oxide semiconductor layer, and a second gate electrode provided on the third insulating film. The first and third insulating films are SiOx films. The second insulating film is an SiNx film including hydrogen, and is provided overlapping the polycrystalline silicon layer, and is provided not overlapping the oxide semiconductor layer.

Abstract: A data processing apparatus for compressing physical address values correlated to logical address values includes a first prediction unit that calculates a first predicted address value for a first input address value in input data to be compressed, a determination unit that selects an encoding processing for the first input address value according to the first predicted address value, and a compression unit configured to encode the first input address value according to the encoding processing selected by the determination unit.

Abstract: A production method of a compound represented by the formula [I]: or a pharmaceutically acceptable salt thereof, or a hydrate thereof.

Abstract: A solid oxide fuel cell apparatus 1 has: multiple fuel cell units 16; a module case 8 housing multiple fuel cell units; a heat insulating material 7 disposed to cover the area around the module case 8; a reformer 20 for reforming raw fuel gas using steam, thereby producing fuel gas; a combustion chamber 18 for combusting residual fuel gas and heating the reformer 20; a heat exchanger 23 for exchanging heat between oxidant gas and exhaust gas; and a steam generator 25, disposed within the heat insulating material 7 and on the outside of the module case 8, for exchanging heat between exhaust gas and water immediately after heat is exchanged in the heat exchanger 23, thereby producing steam.

Abstract: According to one embodiment, a memory controller includes one or more processors configured to function as a writing unit and a reading unit. The writing unit writes data as threshold voltages of individual memory cells. The reading unit reads the written data by detecting threshold voltages of the individual memory cells. The reading unit includes a selecting unit, a detecting unit, and an estimating unit. The selecting unit selects a read-target memory cell. The detecting unit detects a first threshold voltage at a time of reading of the read-target memory cell, and a second threshold voltage at a time of reading of at least one of adjacent memory cells that are adjacent to the read-target memory cell. The estimating unit estimates a third threshold voltage as a threshold voltage at a time of writing in the read-target memory cell based on the first threshold voltage and the second threshold voltage.

Abstract: A solid oxide fuel cell apparatus 1 has: multiple fuel cell units 16; a module case 8 housing multiple fuel cell units; a heat insulating material 7 disposed to cover the area around the module case 8; a reformer 20 for reforming raw fuel gas using steam, thereby producing fuel gas; a combustion chamber 18 for combusting residual fuel gas and heating the reformer 20; a heat exchanger 23 for exchanging heat between oxidant gas and exhaust gas; and a steam generator 25, disposed within the heat insulating material 7 and on the outside of the module case 8, for exchanging heat between exhaust gas and water immediately after heat is exchanged in the heat exchanger 23, thereby producing steam.

Abstract: A data processing apparatus for compressing physical address values correlated to logical address values includes a first prediction unit that calculates a first predicted address value for a first input address value in input data to be compressed, a determination unit that selects an encoding processing for the first input address value according to the first predicted address value, and a compression unit configured to encode the first input address value according to the encoding processing selected by the determination unit.

Abstract: According to an embodiment, an image decoding apparatus includes a memory, a decoder and a first filter. The memory stores reference pixels based on pixels included in a decoded pixel block. The decoder decodes encoded data in units of pixel blocks using the reference pixels to generate a first decoded pixel block, the first decoded pixel block being adjacent to the reference pixels. The first filter performs a first filtering on only the first decoded pixel block using the first decoded pixel block and part of the reference pixels perpendicularly adjacent to the first decoded pixel block in a scan direction of image decoding processing.

Abstract: According to an embodiment, an image decoding apparatus includes a memory, a decoder and a first filter. The memory stores reference pixels based on pixels included in a decoded pixel block. The decoder decodes encoded data in units of pixel blocks using the reference pixels to generate a first decoded pixel block, the first decoded pixel block being adjacent to the reference pixels. The first filter performs a first filtering on only the first decoded pixel block using the first decoded pixel block and part of the reference pixels perpendicularly adjacent to the first decoded pixel block in a scan direction of image decoding processing.

Abstract: A semiconductor device includes, a plurality of oxide semiconductor TFTs including a first gate electrode, a first insulating layer in contact with the first gate electrode, an oxide semiconductor layer opposing the first gate electrode via the first insulating layer, a source electrode and a drain electrode which are connected with the oxide semiconductor layer, and an organic insulating layer covering only some of the plurality of oxide semiconductor TFTs, wherein the plurality of oxide semiconductor TFTs include a first TFT which is covered with the organic insulating layer and a second TFT which is not covered with the organic insulating layer, and the second TFT includes a second gate electrode opposing the oxide semiconductor layer via a second insulating layer, the second gate electrode being arranged to overlap with at least a portion of the first gate electrode with the oxide semiconductor layer interposed therebetween.