Patents by Inventor Tamotsu Usami

Tamotsu Usami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020070825
    Abstract: A wiring structure for a transmission line has a ground line (2) and a signal line (1). The signal line (1) is disposed so as to face the ground line (2) through a dielectric (3). A surface of the signal line (1) facing the ground line (2) has a groove extending in the transmission direction. A surface of the ground line (2) facing the signal line (1) also has a groove extending in the transmission direction. The grooves restrain that electromagnetic induction is caused in the signal line (1) due to an electromagnetic field generated by other adjacent signal lines (1).
    Type: Application
    Filed: February 19, 2002
    Publication date: June 13, 2002
    Inventors: Kanji Otsuka, Tamotsu Usami
  • Publication number: 20020044012
    Abstract: A CMOS line driver is made up of p- and nMOS transistors. A pMOS varactor is interposed between the source of the pMOS transistor and a power supply, while an nMOS varactor is interposed between the source of the nMOS transistor and ground. The sizes of each of these MOS varactors may be the same as those of the p- or nMOS transistor. Alternatively, each of these MOS varactors may have a channel area twice greater than that of the p- or nMOS transistor. The inverted version of a signal input to the line driver is supplied to the gates of the MOS varactors. In this manner, the MOS transistors, making up the line driver, can switch at a high speed.
    Type: Application
    Filed: September 27, 2001
    Publication date: April 18, 2002
    Inventors: Kanji Otsuka, Tamotsu Usami
  • Patent number: 6373275
    Abstract: An electronic device which improves speed of signal transmission in a bus wiring system by specifying circuit configuration of a driver circuit and transmission line characteristic impedance. An input/output circuit combines a differential driver of current switch type with a bus wiring system having a transmission line for transmitting a differential complementary digital signal and a termination end resistor matching the transmission line. An integrated circuit chip including the differential driver is mounted on a wiring board including the transmission line and the termination end resistor. The transmission line includes wires having an equal length which have characteristic impedance of 25&OHgr; or less. In combination with the current switch type differential driver, this transmission line structure restricts attenuation of signal energy during transmission and restricts electromagnetic interference between transmission lines close to each other.
    Type: Grant
    Filed: December 8, 1999
    Date of Patent: April 16, 2002
    Assignees: Kabushiki Kaisha Toshiba, Oki Electric Industry Co., Ltd., Sanyo Electric Co., Ltd., Sharp Kabushiki Kaisha, Sony Corporation, NEC Corporation, Fujitsu Limited, Matsushita Electronics Corporation, Mitsubishi Denki Kabushiki Kaisha, Hitachi, Ltd., Rohm Co., Ltd.
    Inventors: Kanji Otsuka, Tamotsu Usami
  • Publication number: 20020008597
    Abstract: In a semiconductor chip are arranged power pads, ground pads and signal pads. A ground line is provided which is formed as one in the vicinity of the chip and branches off at some distance from the chip. Signal lines and power lines are each formed over one of the branched ground lines. The signal lines and the power lines are extended radially together with the underlying ground lines. Each of the signal lines and the power lines are extended together with the corresponding ground line to form a stacked pair line.
    Type: Application
    Filed: July 10, 2001
    Publication date: January 24, 2002
    Inventors: Kanji Otsuka, Tamotsu Usami
  • Publication number: 20010013075
    Abstract: A signal transmission bus system has a transmission line pair on which binary data values are indicated by the presence and absence of a complementary signal. A driver circuit opens and closes a current path that supplies the complementary signal to the transmission line pair. When this path is opened, the driver circuit closes a bypass current path, so that the driver circuit behaves as a direct-current circuit and does not generate power-supply and ground noise. A receiver that senses the presence and absence of the complementary signal on the transmission line pair includes a differential amplifier and a termination transistor coupled across the input terminals of the differential amplifier, to discharge the input capacitance of the differential amplifier so that high-speed signals can be sensed rapidly.
    Type: Application
    Filed: January 18, 2001
    Publication date: August 9, 2001
    Inventors: Kanji Otsuka, Tamotsu Usami
  • Publication number: 20010010272
    Abstract: Signal wirings 22, 23 are formed on a pair of substrates 20, 21, and the substrates are joined together through an insulating layer 24 so that the signal wirings 22, 23 are placed in parallel and facing to each other. The surfaces of the overlapping faces of the signal wirings 22, 23 are made smooth, and the roughness of the same surfaces is smaller than the skin depth &dgr;s due to the skin effect, preferably less than one third, for minimizing the increase in the electric resistance due to the skin effect.
    Type: Application
    Filed: December 8, 2000
    Publication date: August 2, 2001
    Inventors: Kanji Otsuka, Tamotsu Usami
  • Patent number: 4527730
    Abstract: A wire bonding apparatus which can variously change the shape of a loop of a bonding wire and can restrict the loop shape in accordance with specifications of an article being wire bonded. In the wire bonding apparatus, a wire guide unit moving both vertically and transversely, independently of a bonding tool, is disposed in proximity of the bonding tool which moves relative to the article to be wire bonded and which connects the wire between a first bonding region and the second bonding region. A mechanism is provided which changes the shape of the loop of the bonding wire when the wire guide unit moves vertically and transversely.
    Type: Grant
    Filed: January 27, 1983
    Date of Patent: July 9, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Yuji Shirai, Kanji Otsuka, Tamotsu Usami, Yasuyuki Yamasaki
  • Patent number: 3978248
    Abstract: A method for manufacturing a composite sintered structure, comprising the steps of preparing a green ceramic sheet, printing a green ceramic insulator paste and a conductor paste on the green ceramic sheet, and sintering the resulting lamination to form a monolithic structure, the green ceramic sheet and the insulator and conductor pastes being made of the same starting ceramic base materials, so that the difference in the coefficient of shrinkage between the green ceramic sheet and the printed insulator and conductor layers is eliminated.
    Type: Grant
    Filed: January 10, 1974
    Date of Patent: August 31, 1976
    Assignee: Hitachi, Ltd.
    Inventor: Tamotsu Usami