Abstract: A method of manufacturing a semiconductor device includes: forming a substrate over the substrate, the substrate defining a logic region and a memory region; depositing a bottom electrode layer across the logic region and the memory region; depositing a magnetic tunnel junction (MTJ) layer over the bottom electrode layer; depositing a first conductive layer over the MTJ layer; depositing a sacrificial layer over the first conductive layer; etching the sacrificial layer in the memory region to expose the first conductive layer in the memory region while keeping the first conductive layer in the logic region covered; depositing a second conductive layer in the memory region and the logic region; patterning the second conductive layer to expose the MTJ layer in the memory region; and etching the patterned second conductive layer and the MTJ layer to form a top electrode and an MTJ, respectively, in the memory region.

Abstract: An information handling system housing includes an interior frame that integrates removeable slot adapters and a garage to hold the slot adapters once separate from the frame. In one example embodiment, a slot adapter has plural support structures and screw openings with an offset bottom surface alignment pin so that insertion into openings in different device slots will support different types of devices, such as solid state drives (SSDs) and wireless network interface controllers.

Abstract: An information handling system housing includes an interior frame that integrates removeable slot adapters and a garage to hold the slot adapters once separate from the frame. In one example embodiment, a slot adapter has plural support structures and screw openings with an offset bottom surface alignment pin so that insertion into openings in different device slots will support different types of devices, such as solid state drives (SSDs) and wireless network interface controllers.

Abstract: A fastening system, including: a fastener including: a hollow shaft; a threaded portion positioned on an outer surface of the hollow shaft; a first protrusion extending from an inner surface of the hollow shaft, the first protrusion including: a first angled surface; a first engagement surface; a nut corresponding to the fastener, including: a cavity having threaded portion; a projection positioned within the cavity of the nut, the projection including: a first locking feature positioned on an outer surface of the projection, the first locking feature including: a second angled surface; a first locking surface; wherein, in a first state of engagement of the fastener with the nut, the first angled surface of the first protrusion of the fastener engages with the second angled surface of the first locking feature of the projection to rotate the fastener with respect to the nut in response to downward force on the fastener.

Abstract: A holder for stacked compression attached memory modules (CAMMs) includes an outer frame, a first recessed area for receiving a bottom one of the stacked CAMMs, a second recessed area for receiving a top one of the stacked CAMMs, and a metal plate assembly affixed within the outer frame and situated between the first recessed area and the second recessed area.

Abstract: A method includes placing a wafer on a wafer holder, depositing a film on a front surface of the wafer, and blowing a gas through ports in a redistributor onto a back surface of the wafer at a same time the deposition is performed. The gas is selected from a group consisting of nitrogen (N2), He, Ne, and combinations thereof.

Abstract: A global computer aided engineering (CAE) model representing an electronic product that contains solder joints and an individual detailed solder joint model are received. The solder joint model can include a solder ball, one or more metal pads, a portion of printed circuit board, and a portion of semiconductor chip component. The global CAE model includes locations of the solder joints to be evaluated in a drop test simulation. The solder joint model is replicated at each location to create a local CAE model via a geometric relationship between the global CAE model and the local CAE model. Simulated physical behaviors of the product under a design condition are obtained in a co-simulation using the global CAE model in a first time scale and the local CAE model in a second time scale. Simulated physical behaviors are periodically synchronized based on kinematic and force constraints.

Abstract: A holder for a compression attached memory module (CAMM) includes a spine and first and second beam protrusions. The spine encloses an end of the CAMM adjacent to a contact pad array of a CAMM printed circuit board (PCB) of the CAMM. The first beam protrusion extends from the spine away from the end of the CAMM. The second beam protrusion extends from the spine away from the end of the CAMM. When the CAMM is installed into the holder and installed into an information handling system, the first and second beam protrusions transfer a compression applied at the first and a compression applied at the second beam protrusions to a portion of the spine between the first beam protrusion and the second beam protrusion to limit a deformation of the CAMM PCB.

Abstract: An embedded-damper speaker for an information handling system includes a top speaker housing, a bottom speaker housing, and a damper. The bottom speaker housing is in physical communication with the top speaker housing. The damper is secured in between the top and bottom speaker housings. The damper reduces acoustic resonance between the embedded-damper speaker and the information handling system.

Abstract: A method includes placing a wafer on a wafer holder, depositing a film on a front surface of the wafer, and blowing a gas through ports in a redistributor onto a back surface of the wafer at a same time the deposition is performed. The gas is selected from a group consisting of nitrogen (N2), He, Ne, and combinations thereof.

Abstract: A brightness control device for controlling light-emitting diodes (LEDs) during a video recording performed by an image sensor. The brightness control device includes a pulse width modulation (PWM) signal output unit and a brightness control signal generation unit. The signal output unit is configured to provide at least one PWM signal. The brightness control signal generation unit is configured to generate a brightness control signal according to an exposure signal of the image sensor and the at least one PWM signal.

Abstract: An information handling system, including a cover structure including a plurality of coupling members positioned on a surface of the cover structure, each of the coupling members defining a cavity; and a computing module having a perimeter and including a plurality of protruding members positioned on the perimeter, wherein each of a subset of the plurality of protruding members corresponds to a respective coupling member of the plurality of coupling members, wherein, when the computing module is coupled to the cover structure, each of subset of the plurality of protruding members is positioned with the cavity of the corresponding coupling member of the plurality of coupling members to maintain a positioning of the computing module with respect to the cover structure.

Abstract: A fastening system, including a fastener including a threaded portion positioned on an outer surface of the fastener; a protrusion positioned on an outer surface of the fastener, the protrusion including a first angled surface; and an engagement surface; a nut corresponding to the fastener, including a threaded portion positioned on an inner surface of the nut; a first locking feature positioned on an inner surface of the nut, the first locking feature including a second angled surface; a first locking surface; a second locking feature positioned on the inner surface of the nut, the second locking feature including a third angled surface; a second locking surface.

Abstract: A fastening system, including: a fastener including: a hollow shaft; a threaded portion positioned on an outer surface of the hollow shaft; a first protrusion extending from an inner surface of the hollow shaft, the first protrusion including: a first angled surface; a first engagement surface; a nut corresponding to the fastener, including: a cavity having threaded portion; a projection positioned within the cavity of the nut, the projection including: a first locking feature positioned on an outer surface of the projection, the first locking feature including: a second angled surface; a first locking surface; wherein, in a first state of engagement of the fastener with the nut, the first angled surface of the first protrusion of the fastener engages with the second angled surface of the first locking feature of the projection to rotate the fastener with respect to the nut in response to downward force on the fastener.

Abstract: A method of manufacturing a semiconductor device includes: forming a substrate over the substrate, the substrate defining a logic region and a memory region; depositing a bottom electrode layer across the logic region and the memory region; depositing a magnetic tunnel junction (MTJ) layer over the bottom electrode layer; depositing a first conductive layer over the MTJ layer; depositing a sacrificial layer over the first conductive layer; etching the sacrificial layer in the memory region to expose the first conductive layer in the memory region while keeping the first conductive layer in the logic region covered; depositing a second conductive layer in the memory region and the logic region; patterning the second conductive layer to expose the MTJ layer in the memory region; and etching the patterned second conductive layer and the MTJ layer to form a top electrode and an MTJ, respectively, in the memory region.

Abstract: A structure includes a substrate, a transistor, a contact, an oxygen-free etch stop layer, an oxygen-containing etch stop layer, a dielectric layer, and a via. The transistor is on the substrate. The contact is on a source/drain region of the transistor. The oxygen-free etch stop layer spans the contact. The oxygen-containing etch stop layer extends along a top surface of the oxygen-free etch stop layer. The dielectric layer is over the oxygen-containing etch stop layer. The via passes through the dielectric layer, the oxygen-containing etch stop layer, and the oxygen-free etch stop layer and lands on the contact. The memory stack lands on the via.

Abstract: A method of manufacturing a semiconductor device includes: providing a substrate, the substrate defining a logic region and a memory region; depositing a bottom electrode layer across the logic region and the memory region; depositing a magnetic tunnel junction (MTJ) layer over the bottom electrode layer; depositing a first conductive layer over the MTJ layer; depositing a sacrificial layer over the first conductive layer; etching the sacrificial layer in the memory region to expose the first conductive layer in the memory region while keeping the first conductive layer in the logic region covered; depositing a second conductive layer in the memory region and the logic region; patterning the second conductive layer to expose the MTJ layer in the memory region; and etching the patterned second conductive layer and the MTJ layer to form a top electrode and an MTJ, respectively, in the memory region.

Abstract: A variable holder module secures a variety of different expansion cards that may be installed within a computer or other information handling system. The holder module has a multi-sided component that is orientable according to which expansion card is to be secured within the computer. Each side of the component may thus correspond to a different one of the expansion cards. Once the expansion card is determined, a human or robotic picker need only orient component to the side that corresponds to the make/model of the expansion card. The holder module is thus adaptable to secure many different expansion cards that may be installed within the computer.

Abstract: Methods of forming magnetic tunnel junction (MTJ) memory cells used in a magneto-resistive random access memory (MRAM) array are provided. A pre-clean process is performed to remove a metal oxide layer that may form on the top surface of the bottom electrodes of MTJ memory cells during the time the bottom electrode can be exposed to air prior to depositing MTJ layers. The pre-clean processes may include a remote plasma process wherein the metal oxide reacts with hydrogen radicals generated in the remote plasma.

Abstract: A display panel and a display device are disclosed. The display panel comprises a display area and a light-transmitting area, and at least one alignment layer is provided with a hole in the light-transmitting area. In the present application, a hole is provided in at least one alignment layer of the display panel. Therefore, when external light enters the optical element through the display panel, the filtering effect of the alignment layer on the light is greatly reduced, and light loss is reduced, to improve the light transmittance of the area of the display panel corresponding to the optical element to effectively increase the amount of light collected by the optical element.