Patents by Inventor Tansen Varghese

Tansen Varghese has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180047873
    Abstract: A radiation body and a method for producing a radiation body are disclosed. In an embodiment, the radiation body includes a basic body configured to generate or absorb electromagnetic radiation, at least one main side having a rough structure of first elevations and at least one structured radiation surface structured with a fine structure of second elevations, wherein the fine structure brings about a gradual refractive index change for the radiation between materials adjoining the structured radiation surface, wherein the first elevations comprise heights and widths in each case of at least ?max/n, wherein each second elevation tapers toward a maximum of the respective second elevation and each second elevations has a height of at least 0.6·?max/n and a width of ?max/(2n) at most in each case, and wherein a distance between neighboring second elevations is ?max/(2n) at most.
    Type: Application
    Filed: February 17, 2016
    Publication date: February 15, 2018
    Inventors: Philipp KREUTER, Tansen VARGHESE
  • Patent number: 9887180
    Abstract: A method for producing a plurality of semiconductor components and a semiconductor component are disclosed. In an embodiment the method includes applying a semiconductor layer sequence on a substrate, structuring the semiconductor layer sequence by forming trenches thereby separating the semiconductor layer sequence into a plurality of semiconductor bodies and applying an insulating layer covering the trenches and vertical surfaces of the plurality of semiconductor bodies. The method further includes forming a plurality of tethers by structuring the insulating layer in regions covering the trenches, locally detaching the substrate from the plurality of semiconductor bodies, wherein the tethers remain attached to the substrate and selectively picking up each semiconductor body by separating the tethers from the substrate, wherein each semiconductor body comprises a portion of the semiconductor layer sequence.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: February 6, 2018
    Assignees: OSRAM Opto Semiconductors GmbH, X-Celeprint Limited
    Inventors: Matthew Meitl, Christopher Bower, Tansen Varghese
  • Patent number: 9812619
    Abstract: The present application relates to a method of producing an optoelectronic component. An optoelectronic is produced by this method. An optoelectronic semiconductor chip has a first surface. A sacrificial layer is deposited on the first surface. The optoelectronic semiconductor chip is at least partially embedded in a mold body and the sacrificial layer is removed.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: November 7, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Jürgen Moosburger, Thomas Schwarz, Hans-Jürgen Lugauer, Tansen Varghese, Stefan Illek
  • Patent number: 9786824
    Abstract: A method can be used for producing an optoelectronic component. An optoelectronic semiconductor chip has a front face and a rear face. A sacrificial layer is applied to the rear face. A molded body is formed the optoelectronic semiconductor chip being at least partially embedded in the molded body. The sacrificial layer is removed.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: October 10, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Stefan Illek, Hans-Jürgen Lugauer, Jürgen Moosburger, Thomas Schwarz, Tansen Varghese
  • Patent number: 9773945
    Abstract: A method for producing a plurality of semiconductor components and a semiconductor component is disclosed. In some embodiment, the method includes forming a semiconductor layer sequence, structuring the semiconductor layer sequence by forming trenches thereby structuring semiconductor bodies, applying an auxiliary substrate on the semiconductor layer sequence, so that the semiconductor layer sequence is arranged between the auxiliary substrate and the substrate and removing the substrate from the semiconductor layer sequence.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: September 26, 2017
    Assignees: OSRAM Opto Semiconductors GmbH, X-Celeprint Limited
    Inventors: Matthew Meitl, Christopher Bower, Tansen Varghese
  • Patent number: 9601652
    Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; and forming a contact composed of a sequence of layers over the first subcell at a temperature of 280° C. or less and having a contact resistance of less than 5×10?4 ohms-cm2.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: March 21, 2017
    Assignee: SolAero Technologies Corp.
    Inventors: Tansen Varghese, Arthur Cornfeld
  • Publication number: 20170062351
    Abstract: A method for producing a plurality of semiconductor components (1) is provided, comprising the following steps: a) providing a semiconductor layer sequence (2) having a first semiconductor layer (21), a second semiconductor layer (22) and an active region (25), said active region being arranged between the first semiconductor layer and the second semiconductor layer for generating and/or receiving radiation; b) forming a first connection layer (31) on the side of the second connection layer facing away from the first semiconductor layer; c) forming a plurality of cut-outs (29) through the semiconductor layer sequence; d) forming a conducting layer (4) in the cut-outs for establishing an electrically conductive connection between the first semiconductor layer and the first connection layer; and e) separating into the plurality of semiconductor components, wherein a semiconductor body (20) having at least one of the plurality of cut-outs arises from the semiconductor layer sequence for each semiconductor compon
    Type: Application
    Filed: February 17, 2015
    Publication date: March 2, 2017
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Norwin VON MALM, Alexander F. PFEUFFER, Tansen VARGHESE, Philipp KREUTER
  • Publication number: 20160254253
    Abstract: A method for producing a plurality of semiconductor components and a semiconductor component are disclosed. In an embodiment the method includes applying a semiconductor layer sequence on a substrate, structuring the semiconductor layer sequence by forming trenches thereby separating the semiconductor layer sequence into a plurality of semiconductor bodies and applying an insulating layer covering the trenches and vertical surfaces of the plurality of semiconductor bodies. The method further includes forming a plurality of tethers by structuring the insulating layer in regions covering the trenches, locally detaching the substrate from the plurality of semiconductor bodies, wherein the tethers remain attached to the substrate and selectively picking up each semiconductor body by separating the tethers from the substrate, wherein each semiconductor body comprises a portion of the semiconductor layer sequence.
    Type: Application
    Filed: January 28, 2016
    Publication date: September 1, 2016
    Inventors: Matthew Meitl, Christopher Bower, Tansen Varghese
  • Publication number: 20160225953
    Abstract: A method for producing a plurality of semiconductor components and a semiconductor component is disclosed. In some embodiment, the method includes forming a semiconductor layer sequence, structuring the semiconductor layer sequence by forming trenches thereby structuring semiconductor bodies, applying an auxiliary substrate on the semiconductor layer sequence, so that the semiconductor layer sequence is arranged between the auxiliary substrate and the substrate and removing the substrate from the semiconductor layer sequence.
    Type: Application
    Filed: January 28, 2016
    Publication date: August 4, 2016
    Inventors: Matthew Meitl, Christopher Bower, Tansen Varghese
  • Patent number: 9287438
    Abstract: A method of manufacturing a solar cell assembly by providing a first substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell; mounting a supporting member on top of the sequence of layers using a temporary adhesive bonding material to form a processing assembly; removing the first substrate; and depositing a contact layer including germanium and palladium on the top surface of the solar cell at a relatively low temperature so that the temporary adhesive allows the processing assembly to remain attached.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: March 15, 2016
    Assignee: SolAero Technologies Corp.
    Inventors: Tansen Varghese, Arthur Cornfeld, Daniel McGlynn
  • Publication number: 20160013380
    Abstract: The present application relates to a method of producing an optoelectronic component. An optoelectronic is produced by this method. An optoelectronic semiconductor chip has a first surface. A sacrificial layer is deposited on the first surface. The optoelectronic semiconductor chip is at least partially embedded in a mold body and the sacrificial layer is removed.
    Type: Application
    Filed: January 15, 2014
    Publication date: January 14, 2016
    Inventors: Jürgen Moosburger, Thomas Schwarz, Hans-Jürgen Lugauer, Tansen Varghese, Stefan Illek
  • Publication number: 20160005936
    Abstract: A method can be used for for producing an optoelectronic component. An optoelectronic semiconductor chip has a front face and a rear face. A sacrificial layer is applied to the rear face. A molded body is formed the optoelectronic semiconductor chip being at least partially embedded in the molded body. The sacrificial layer is removed.
    Type: Application
    Filed: January 15, 2014
    Publication date: January 7, 2016
    Inventors: Stefan Illek, Hans-Jürgen Lugauer, Jürgen Moosburger, Thomas Schwarz, Tansen Varghese
  • Publication number: 20150380602
    Abstract: A method of producing an optoelectronic component includes providing a carrier having a carrier surface, a first lateral section of the carrier surface being raised relative to a second lateral section of the carrier surface; arranging an optoelectronic semiconductor chip having a first surface and a second surface on the carrier surface, wherein the first surface faces toward the carrier surface; and forming a molded body having an upper side facing toward the carrier surface and a lower side opposite the upper side, the semiconductor chip being at least partially embedded in the molded body.
    Type: Application
    Filed: February 6, 2014
    Publication date: December 31, 2015
    Applicant: OSRAM Opto Semiconductore GmbH
    Inventors: Thomas Schwarz, Hans-Jürgen Lugauer, Jürgen Moosburger, Stefan Illek, Tansen Varghese, Matthias Sabathil
  • Publication number: 20150325733
    Abstract: A photovoltaic solar cell for producing energy from the sun including a germanium substrate including a first photoactive junction and forming a bottom solar subcell; a gallium arsenide middle cell disposed on said substrate; an indium gallium phosphide top cell disposed over the middle cell; and a surface grid including a plurality of spaced apart grid lines, wherein the grid lines have a thickness greater than 7 microns, and each grid line has a cross-section in the shape of a trapezoid with a cross-sectional area between 45 and 55 square microns.
    Type: Application
    Filed: July 21, 2015
    Publication date: November 12, 2015
    Inventors: Richard W. HOFFMAN, JR., Pravin PATEL, Tansen VARGHESE
  • Publication number: 20150162485
    Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; and forming a contact composed of a sequence of layers over the first subcell at a temperature of 280° C. or less and having a contact resistance of less than 5×10?4 ohms-cm2.
    Type: Application
    Filed: February 18, 2015
    Publication date: June 11, 2015
    Inventors: Tansen Varghese, Arthur Comfeld
  • Patent number: 8987042
    Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; and forming a contact composed of a sequence of layers over the first subcell at a temperature of 280° C. or less and having a contact resistance of less than 5×10?4 ohms-cm2.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: March 24, 2015
    Assignee: SolAero Technologies Corp.
    Inventors: Tansen Varghese, Arthur Cornfeld
  • Publication number: 20140342494
    Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; and forming a contact composed of a sequence of layers over the first subcell at a temperature of 280° C. or less and having a contact resistance of less than 5×10?4 ohms-cm2.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 20, 2014
    Applicant: Emcore Solar Power, Inc.
    Inventors: Tansen Varghese, Arthur Cornfeld
  • Patent number: 8778199
    Abstract: The present disclosure provides a process for manufacturing a solar cell by selectively freeing an epitaxial layer from a single crystal substrate upon which it was grown. In some embodiments the process includes, among other things, providing a first substrate; depositing a separation layer on said first substrate; depositing on said separation layer a sequence of layers of semiconductor material forming a solar cell; mounting and bonding a flexible support on top of the sequence of layers; etching said separation layer while applying an agitating action to the etchant solution so as to remove said flexible support with said epitaxial layer from said first substrate.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: July 15, 2014
    Assignee: Emoore Solar Power, Inc.
    Inventors: Arthur Cornfeld, Daniel McGlynn, Tansen Varghese
  • Patent number: 8753918
    Abstract: A method of forming a solar cell including: providing a semiconductor body including at least one photoactive junction; forming a semiconductor contact layer composed of GaAs deposited over the semiconductor body; and depositing a metal contact layer including a germanium layer and a palladium layer over the semiconductor contact layer so that the specific contact resistance is less than 5×10?4 ohms-cm2.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: June 17, 2014
    Assignee: Emcore Solar Power, Inc.
    Inventors: Tansen Varghese, Arthur Cornfeld
  • Patent number: 8586859
    Abstract: A method of forming a plurality of discrete, interconnected solar cells mounted on a carrier by providing a first semiconductor substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell structure; forming a metal back contact layer over the solar cell structure; mounting a carrier on top of the metal back contact; removing the first substrate; and lithographically patterning and etching the solar cell structure to form a plurality of discrete solar cells mounted on the carrier.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: November 19, 2013
    Assignee: Emcore Solar Power, Inc.
    Inventor: Tansen Varghese