Patents by Inventor Tao Li

Tao Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250151400
    Abstract: A semiconductor structure includes a transistor device at a first side of the semiconductor structure, a control circuit at the first side of the semiconductor structure, and a resistor-capacitor circuit including a resistor and a capacitor. The resistor is in a power delivery network at a second side of the semiconductor structure and the capacitor is at the first side of the semiconductor structure. A first electrode of the capacitor is coupled to a first power rail in the power delivery network at the second side of the semiconductor structure. A second electrode of the capacitor is coupled to a second power rail in the power delivery network at the second side of the semiconductor structure. An input of the control circuit is coupled to the resistor. A gate of the transistor device is coupled to an output of the control circuit.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 8, 2025
    Inventors: Lijuan Zou, Tao Li, Ruilong Xie, Nicolas Jean Loubet
  • Publication number: 20250142903
    Abstract: The embodiments of the present disclosure recognize the potential benefits of semiconductor IC device fabrication techniques to form a microdevice, such as a transistor, that includes structures, such as a source and/or drain, that are to be connected to a backside contact that is further associated with a backside back end of line (BEOL) network. The semiconductor IC device includes a bottom isolation extension (BIE) region. The BIE region is formed within a gate structure of the microdevice and may be located between the backside contact and the gate structure. The BIE region may provide for increased electrical isolation between the backside contact and the gate structure.
    Type: Application
    Filed: October 30, 2023
    Publication date: May 1, 2025
    Inventors: Tsung-Sheng Kang, Tao Li, Ruilong Xie, Jingyun Zhang
  • Publication number: 20250139128
    Abstract: System, method, and various embodiments for data tagging and prompt generation are described herein. An embodiment operates by receiving input data, identifying metadata, generating one or more statistics based on the input data, calculating a sample size for the input data based on the one or more statistics and extracting a sample of the input data of the sample size. A prompt is generated based on a prompt template, and the prompt is provided to a language model configured to tag the input in accordance with the prompt. The output including tagged input data is received, and a query is executed against the tagged input data.
    Type: Application
    Filed: October 25, 2023
    Publication date: May 1, 2025
    Inventors: JING-TAO LI, Jian Song, Ming Yan, Jingyuan Li, Bo Dang
  • Publication number: 20250133069
    Abstract: A device access method applied to a host and includes: acquiring a connection request provided by a terminal, where the connection request comprises an identifier of the terminal and a password corresponding to the identifier, and the password is generated based on a private key in a key pair and the identifier; acquiring a verification result of the password, where the password is configured to be verified by a public key in the key pair; establishing a connection with the terminal in response to a successful verification; and rejecting the connection request of the terminal in response to a failed verification.
    Type: Application
    Filed: July 5, 2023
    Publication date: April 24, 2025
    Inventors: Hongjun DU, Tao LI, Xingxing ZHAO
  • Publication number: 20250130854
    Abstract: Embodiments of the present disclosure relate to a method for task scheduling and an electronic device. The method comprises: determining whether there is a task to be scheduled in an online task set of a waiting queue; and if there is the task to be scheduled in the online task set, scheduling the task to be scheduled in the online task set based on a preset online scheduling mode, wherein the preset online scheduling mode is a sequential mode, a throughput mode, or a round-robin mode.
    Type: Application
    Filed: December 26, 2024
    Publication date: April 24, 2025
    Inventors: Yu DA, Tao LI, Haizhao LUO, Yongsu ZHANG, Kairui SHE, Yu ZHANG, Jian WANG
  • Publication number: 20250133827
    Abstract: A semiconductor structure comprises at least one first nanosheet transistor and at least one second nanosheet transistor disposed on a dielectric layer. The first nanosheet transistor comprises at least one first source/drain region disposed on a side of the first nanosheet transistor. The second nanosheet transistor comprises at least one second source/drain region disposed on a side of the second nanosheet transistor. The second source/drain region has a larger dimension along a given direction than a dimension of the first source/drain region along the given direction. One of a dielectric fill layer and an air gap is disposed in the dielectric layer and under the second source/drain region. A semiconductor layer is disposed under the second source/drain region, in the dielectric layer and around the one of the dielectric fill layer and the air gap.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 24, 2025
    Inventors: Tsung-Sheng Kang, Tao Li, Ruilong Xie, Oleg Gluschenkov
  • Publication number: 20250132293
    Abstract: A memory device and formation thereof. The memory device includes a stack of memory dies. Each memory die in the stack of memory dies includes two or more layers of memory devices.
    Type: Application
    Filed: October 20, 2023
    Publication date: April 24, 2025
    Inventors: Ruilong Xie, Tao Li, Joshua M. Rubin, Cheng Chi
  • Publication number: 20250126829
    Abstract: A semiconductor device comprises a gate cut portion disposed between a first gate region and a second gate region. The gate cut portion comprises a dielectric liner layer disposed around a vacant area. The dielectric liner layer encloses the vacant area, and the gate cut portion isolates the first gate region from the second gate region.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 17, 2025
    Inventors: Tsung-Sheng Kang, Tao Li, Ruilong Xie, Oleg Gluschenkov
  • Publication number: 20250118001
    Abstract: A method for obtaining a cover image includes: obtaining a plurality of first cropped images of an original image corresponding to a candidate resource; obtaining an aesthetic score of each of the plurality of first cropped images; and determining a target cover image of the candidate resource from the plurality of first cropped images based on the aesthetic score of each first cropped image.
    Type: Application
    Filed: December 19, 2024
    Publication date: April 10, 2025
    Applicant: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
    Inventors: Zhaoxu Wang, Qiang Xie, Yuhang Zheng, Tao Li, Shouke Qin, Zonggang Wu, Qian Wu, Weijian Jian, Ruohan Chang, Di Meng, Yuanhua Shao, Xiaoyun Han, Yang Yang
  • Publication number: 20250118660
    Abstract: A semiconductor structure includes an electronic fuse via having a positive tapered shape extending from a back-end-of-the-line interconnect to a backside power delivery network. The electronic fuse via comprises a conductive material.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 10, 2025
    Inventors: Manasa Medikonda, Tao Li, Ruilong Xie, Nicolas Jean Loubet
  • Publication number: 20250119621
    Abstract: The disclosure provides a method and an apparatus for generating comment information based on a large model, an electronic device and a storage medium, relates to a technical field of artificial intelligence, and in particular to the technical fields of deep learning, large model, and natural language processing, and the like. The specific technical solution includes: obtaining description information of a resource to be commented on by understanding, based on the large model, the resource to be commented on; obtaining, based on the description information, comment information of the resource to be commented on, in which the comment information includes at least a comment video of the resource to be commented on; and displaying the comment video in a comment section. The intelligent generation of comment videos and texts is realized, improving the accuracy of the comment information, simplifying the comment generation process, and improving the speed of generating comments.
    Type: Application
    Filed: December 19, 2024
    Publication date: April 10, 2025
    Applicant: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
    Inventors: Yi Li, Li Ma, Lunan Zhao, Jie Liu, Tianzhong Hu, Huilin Li, Yu Chen, Yongjuan Che, Aowei Li, Tao Li, Hanmeng Liu, Shouke Qin
  • Publication number: 20250118046
    Abstract: Provided is a method for training an image cropping model, a method for processing an image, an electronic device and a storage medium, relating to the field of deep learning and image processing technology. The training method includes: obtaining sample data, wherein the sample data at least includes: a sample image, a first cropped image obtained by cropping the sample image in a first manner, and a second cropped image obtained by cropping the sample image in a second manner; determining a target loss function; and using at least the sample data and the target loss function to perform model training on a preset image cropping model to obtain a target image cropping model.
    Type: Application
    Filed: December 18, 2024
    Publication date: April 10, 2025
    Inventors: Xiaoyun Han, Jingming Wang, Qiang Xie, Tao Li
  • Publication number: 20250117601
    Abstract: A computer-implemented method for information processing includes: obtaining text information, in which the text information includes first text information of a resource to be commented on and second text information of a candidate prompt; selecting a target prompt from the candidate prompts based on the text information; and generating comment information of the resource to be commented on, based on the resource to be commented on and the target prompt.
    Type: Application
    Filed: December 19, 2024
    Publication date: April 10, 2025
    Applicant: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
    Inventors: Huilin Li, Yi Li, Lunan Zhao, Jie Liu, Li Ma, Tao Li, Tianzhong Hu, Yu Chen, Yongjuan Che, Aowei Li, Hanmeng Liu, Shouke Qin
  • Patent number: 12270791
    Abstract: A method, a system and a device for determining interlaminar shear strength of a composite laminated plate are provided. The method includes following steps: constructing a force-displacement curve of a composite laminated plate specimen based on strain data, corresponding to different displacements of the indenter, of the composite laminated plate specimen; determining a dominant strain based on plane strain nephograms; reading any defect in the plane strain nephogram corresponding to one displacement as a current defect, and determining a test force acting on the whole composite laminated plate specimen corresponding to the reference displacement of the indenter as a critical strain value; determining a product of the critical strain value and shear modulus under the dominant strain as the shear strength between adjacent single layers to be tested.
    Type: Grant
    Filed: October 10, 2024
    Date of Patent: April 8, 2025
    Assignee: CATARC CO., LTD.
    Inventors: Xianming Meng, Sai Zhang, Tong Song, Pengfei Ren, Xiaozhong Wu, Xianglei Zhu, Xingfeng Cao, Xinfu Zheng, Tao Li, Zhixin Wu
  • Patent number: 12273283
    Abstract: An intermediate device in a computer device includes a first agent unit supporting single-root input/output (I/O) virtualization (SR-IOV) and a second agent unit supporting Virtio, and the first agent unit and the second agent unit each are an agent of a function unit in a network adapter such that, a virtual machine in the computer device may use an SR-IOV technology or a Virtio technology, and does not configure two sets of independent resource pools to separately support corresponding virtualization technologies, to implement normalization of the resource pools. In addition, the intermediate device implements hardware offloading of Virtio protocol packet forwarding using hardware.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: April 8, 2025
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Lei Huang, Tao Li, Rongyu Yang
  • Patent number: 12273958
    Abstract: Embodiments of this application provide a SIM module management method and an electronic device, and relate to the field of electronic devices. A solution that supports an eSIM module is provided for an existing electronic device that supports dual SIM modules, so that the dual SIM modules are compatible with the eSIM module. The electronic device in the embodiments of this application may support three SIM modules. The three SIM modules include at least one eSIM module. The remaining two SIM modules may be both plug-in SIM modules, or may be one plug-in SIM module and one softSlM module. A user can arbitrarily select two SIM modules from the three SIM modules to be in online standby mode, or can arbitrarily select one SIM module from the three SIM modules to be in online standby mode.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: April 8, 2025
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Tao Li, Zezhi Wang, Chunlin Li, Xiao Han, Xin Zhang
  • Publication number: 20250113537
    Abstract: A semiconductor structure having improved placeholder position margin is provided. In embodiments, the semiconductor structure includes a nanosheet transistor including a plurality of spaced apart and vertically stacked semiconductor channel material nanosheets, a gate structure wrapped around each of the semiconductor channel material nanosheets, a first source/drain region located on a first side of the gate structure and a second source/drain region located on a second side of the gate structure. The gate structure has a first gate thickness under a bottommost semiconductor channel material nanosheet of the plurality of semiconductor channel material nanosheets that is greater than a second gate thickness that is located between the bottommost semiconductor channel material nanosheet and a nearest overlying semiconductor channel material nanosheet of the plurality of semiconductor channel material nanosheets.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 3, 2025
    Inventors: Ruilong Xie, Kisik Choi, Tao Li, Joshua M. Rubin
  • Publication number: 20250112203
    Abstract: A semiconductor structure includes at least two chiplets, where each chiplet includes a top semiconductor device with frontside interconnect wiring contacting a substrate with through-silicon vias and the top semiconductor device contacts a bottom semiconductor device with backside interconnect wiring. At least a first bridge chip connects to a first portion of the backside interconnect wiring in each of the two chiplets and at least a second bridge chip connects the frontside interconnect wiring in each of the two chiplets to the substrate with the through-silicon vias in each of the two chiplets. The top semiconductor device and the bottom semiconductor device in each of the two chiplets are electrically connected.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 3, 2025
    Inventors: Manasa MEDIKONDA, Tao Li, Ruilong Xie, Joshua M. Rubin
  • Patent number: 12266605
    Abstract: Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A metal line is formed on a bottom liner, a sacrificial hardmask on a top surface of the metal line. Portions of the sacrificial hardmask are selectively removed that that do not correspond a desired location of a top via. The remaining sacrificial hardmask is replaced with the top via, the top via and the metal line each tapered such that a width at each respective bottom surface is greater than a width of each respective top surface.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: April 1, 2025
    Assignee: International Business Machines Corporation
    Inventors: Tao Li, Ruilong Xie, Tsung-Sheng Kang, Chih-Chao Yang
  • Patent number: 12262704
    Abstract: An easy-to-clean visual grain monitoring device includes a housing. A circuit board is provided within the housing and is connected with a monitoring unit; an insect collecting pipe, which is provided within the housing, includes multiple first entrances; the housing includes multiple second entrances which are corresponding to the first entrances respectively; an execution element, which is installed on a base, is connected with a lower end of the insect collecting pipe for driving the insect collecting pipe to move up and down; an insect leaking passage, which is provided at an upper end of the base, extends downwards along a side wall of the base; a tail end of the insect leaking passage has a first insect leaking hole for discharging pests, the housing has a second insect leaking hole in a position corresponding to the first insect leaking hole.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: April 1, 2025
    Assignee: CHENGDU AUTO SENSOR TECHNOLOGY CO.LTD
    Inventors: Xiaochun Qi, Tao Li, Xin Li, Ou Bai, Fuzhi Huang, Zhuzhi Ye, Li Sang