Patents by Inventor Taro Osabe

Taro Osabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10162021
    Abstract: A magnetic measurement device has a magnetic sensor including a glass cell having alkali metal gas encapsulated therein that is configured to detect a magnetic field using a magneto-optical characteristic of spin-polarized alkali metal. A laser light source is configured to generate pump light introduced into the magnetic sensor and a coil provided in the same magnetically shielded space as the magnetic sensor is configured to apply a static magnetic field and a RF magnetic field to the magnetic sensor. A signal processor is configured to perform lock-in detection of a light detection signal transmitted through the glass cell of the magnetic sensor, control an intensity of the static magnetic field and a frequency of the RF magnetic field generated by the coil according to a lock-in detection output, and obtain a measurement signal reflecting a magnetic field intensity of an object to be measured in the magnetically shielded space.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: December 25, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Ryuzo Kawabata, Akihiko Kandori, Taro Osabe, Seiichi Suzuki, Yuudai Kamada
  • Publication number: 20160169989
    Abstract: An object of the present invention is to provide a technique to improve a manufacturing yield of a gas cell included in a magnetic field measuring apparatus. A gas cell GC according to an embodiment is characterized in that, for example, a cavity CAV includes an opening OP1 and an opening OP2, a plane size of the opening OP1 becomes larger than a plane size of the opening OP2 in the openings OP1 and OP2 included in the cavity CAV. Especially, according to the embodiment, the opening OP2 is included in the opening OP1 in plan view. Consequently, a width of the opening OP1 coming into contact with an upper surface of the sealing substrate 1S becomes larger than a width of the opening OP2 coming into contact with a lower surface of the sealing substrate 2S.
    Type: Application
    Filed: August 8, 2013
    Publication date: June 16, 2016
    Applicant: Hitachi, Ltd.
    Inventors: Seiichi SUZUKI, Taro OSABE, Yudai KAMADA, Ryuzo KAWABATA, Akihiko KANDORI
  • Patent number: 9366735
    Abstract: Stable magnetic field measurement is enabled without collapse of polarization or fluctuation of intensity of a laser beam incident on a glass cell of an optical pumping magnetic sensor. Excitation light generated with a light source, having optimized light intensity and polarized wave, through frequency stabilization, intensity control and polarized-wave control, is introduced via a polarized wave holding optical fiber to a magnetic sensor provided in a magnetic shield, and magnetic field measurement is performed by optical pumping using magneto-optical properties of spin-polarized alkali metal. The magnetic sensor has a structure where a lens, a polarization optical device, the glass cell and a photodetector, are integrally accommodated in a non-magnetic case.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: June 14, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Ryuzo Kawabata, Akihiko Kandori, Taro Osabe, Seiichi Suzuki, Yudai Kamada
  • Publication number: 20160146909
    Abstract: A magnetic measurement device has a magnetic sensor including a glass cell having alkali metal gas encapsulated therein that is configured to detect a magnetic field using a magneto-optical characteristic of spin-polarized alkali metal. A laser light source is configured to generate pump light introduced into the magnetic sensor and a coil provided in the same magnetically shielded space as the magnetic sensor is configured to apply a static magnetic field and a RF magnetic field to the magnetic sensor. A signal processor is configured to perform lock-in detection of a light detection signal transmitted through the glass cell of the magnetic sensor, control an intensity of the static magnetic field and a frequency of the RF magnetic field generated by the coil according to a lock-in detection output, and obtain a measurement signal reflecting a magnetic field intensity of an object to be measured in the magnetically shielded space.
    Type: Application
    Filed: August 2, 2013
    Publication date: May 26, 2016
    Inventors: Ryuzo KAWABATA, Akihiko KANDORI, Taro OSABE, Seiichi SUZUKI, Yuudai KAMADA
  • Patent number: 9310447
    Abstract: In order to provide a magnetic field measuring apparatus facilitating the pressure control in a gas cell, or capable of inspecting the internal pressure of the gas cell without using any special process, the magnetic field measuring apparatus is configured such that a process layer of the magnetic field measuring apparatus has such a structure that includes a first hollow portion and a second hollow portion provided opposed to first hollow portion with a first isolation wall interposed therebetween. Alternatively, a method for manufacturing the magnetic field measuring apparatus includes breaking the first isolation wall after generating alkali metal (FIG. 17 and FIG. 20).
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: April 12, 2016
    Assignee: HITACHI, LTD.
    Inventors: Yudai Kamada, Taro Osabe, Seiichi Suzuki, Akihiko Kandori, Ryuzo Kawabata
  • Publication number: 20140346515
    Abstract: Detection accuracy of a semiconductor device for detecting various kinds of substances including biological matter such as DNA is to be increased. This semiconductor device includes: a channel region CH placed on a first surface of a silicon oxide film 110; source/drain regions placed on both sides of the channel region CH; a gate electrode G placed on the first surface at a distance from the channel region CH, the gate electrode G being located to face a side surface xz1 of the channel region CH; an insulating film Z located between the channel region CH and the gate electrode G; and a pore P extending parallel to the side surface xz1 of the channel region CH, the pore P being perpendicular to the first surface. A test object such as DNA 200 is introduced into the pore P, and field changes caused by the test object in an inversion layer 10 formed in the side surface xz1 of the channel region CH is detected as changes in the current flowing between the source/drain regions.
    Type: Application
    Filed: November 19, 2012
    Publication date: November 27, 2014
    Inventors: Itaru Yanagi, Masahiko Ando, Toshiyuki Mine, Taro Osabe, Tomoyuki Ishii
  • Publication number: 20140306700
    Abstract: In order to provide a magnetic field measuring apparatus facilitating the pressure control in a gas cell, or capable of inspecting the internal pressure of the gas cell without using any special process, the magnetic field measuring apparatus is configured such that a process layer of the magnetic field measuring apparatus has such a structure that includes a first hollow portion and a second hollow portion provided opposed to first hollow portion with a first isolation wall interposed therebetween. Alternatively, a method for manufacturing the magnetic field measuring apparatus includes breaking the first isolation wall after generating alkali metal (FIG. 17 and FIG. 20).
    Type: Application
    Filed: November 18, 2011
    Publication date: October 16, 2014
    Applicant: HITACHI, LTD.
    Inventors: Yudai Kamada, Taro Osabe, Seiichi Suzuki, Akihiko Kandori, Ryuzo Kawabata
  • Publication number: 20130341745
    Abstract: A light pumping magnetic measurement apparatus configured to suppress an influence on a magnetic field from a heater and facilitate reduction in size and integration of a gas cell when heating the gas cell in order to improve a sensitivity of detection of the magnetic field is provided. This measurement apparatus includes a first glass substrate, a substrate 102 having a thermal conductivity higher than glass, and a second glass substrate laminated in this order.
    Type: Application
    Filed: March 14, 2011
    Publication date: December 26, 2013
    Applicant: Hitachi, Ltd.
    Inventors: Seiichi Suzuki, Taro Osabe, Ryuzo Kawabata
  • Publication number: 20130265042
    Abstract: Stable magnetic field measurement is enabled without collapse of polarization or fluctuation of intensity of a laser beam incident on a glass cell of an optical pumping magnetic sensor. Excitation light generated with a light source, having optimized light intensity and polarized wave, through frequency stabilization, intensity control and polarized-wave control, is introduced via a polarized wave holding optical fiber to a magnetic sensor provided in a magnetic shield, and magnetic field measurement is performed by optical pumping using magneto-optical properties of spin-polarized alkali metal. The magnetic sensor has a structure where a lens, a polarization optical device, the glass cell and a photodetector, are integrally accommodated in a non-magnetic case.
    Type: Application
    Filed: March 14, 2013
    Publication date: October 10, 2013
    Applicant: HITACHI, LTD.
    Inventors: Ryuzo KAWABATA, Akihiko KANDORI, Taro OSABE, Seiichi SUZUKI, Yudai KAMADA
  • Patent number: 8401273
    Abstract: A measurement tool apparatus for evaluating degradation of pattern features in a semiconductor device manufacturing process. The measurement tool apparatus detects variations in the patterns from SEM images thereof and extracts pattern edge points along the circumference of each pattern. The measurement tool apparatus compares the pattern edge points to corresponding edge points of an ideal shape so as to determine deviation of the patterns. Metrics are derived from analysis of the deviations. The measurement tool apparatus uses the metrics in calculating an index representative of the geometry of edge spokes of the pattern, an indicator of the orientation of the edge spokes, and/or anticipated effects of the edge spokes on device performance.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: March 19, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinori Momonoi, Atsuko Yamaguchi, Taro Osabe
  • Publication number: 20120319187
    Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
    Type: Application
    Filed: August 29, 2012
    Publication date: December 20, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Taro Osabe, Tomoyuki Ishii, Kazuo Yano, Takashi Kobayashi
  • Patent number: 8278700
    Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: October 2, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Taro Osabe, Tomoyuki Ishii, Kazuo Yano, Takashi Kobayashi
  • Publication number: 20110176718
    Abstract: A measurement tool apparatus for evaluating degradation of pattern features in a semiconductor device manufacturing process. The measurement tool apparatus detects variations in the patterns from SEM images thereof and extracts pattern edge points along the circumference of each pattern. The measurement tool apparatus compares the pattern edge points to corresponding edge points of an ideal shape so as to determine deviation of the patterns. Metrics are derived from analysis of the deviations. The measurement tool apparatus uses the metrics in calculating an index representative of the geometry of edge spokes of the pattern, an indicator of the orientation of the edge spokes, and/or anticipated effects of the edge spokes on device performance.
    Type: Application
    Filed: January 21, 2010
    Publication date: July 21, 2011
    Applicant: HITACHI, LTD.
    Inventors: Yoshinori MOMONOI, Atsuko YAMAGUCHI, Taro OSABE
  • Publication number: 20110169070
    Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
    Type: Application
    Filed: March 25, 2011
    Publication date: July 14, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Taro Osabe, Tomoyuki Ishii, Kazuo Yano, Takashi Kobayashi
  • Patent number: 7939879
    Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: May 10, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Taro Osabe, Tomoyuki Ishii, Kazuo Yano, Takashi Kobayashi
  • Publication number: 20110058410
    Abstract: A random-access non-volatile semiconductor memory device, which does not use individual gate terminals of transistors of memory cells in order to select individual memory cells for read/write operations performed on the device. The gate terminals of the memory cells are all biased to the same voltage during a read or write operation. For example, the gate terminals of the memory cells in the array are electrically connected together. By appropriate control of source and drain voltages during a read or write operation, discrimination can be achieved between selected and non-selected memory cells of the array.
    Type: Application
    Filed: September 8, 2009
    Publication date: March 10, 2011
    Inventor: Taro OSABE
  • Patent number: 7622766
    Abstract: Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 ?m, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: November 24, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Tomoyuki Ishii, Taro Osabe, Hideaki Kurata, Takeshi Sakata
  • Publication number: 20080042193
    Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
    Type: Application
    Filed: September 6, 2007
    Publication date: February 21, 2008
    Inventors: Taro Osabe, Tomoyuki Ishii, Kazuo Yano, Takashi Kobayashi
  • Patent number: 7294880
    Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: November 13, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Taro Osabe, Tomoyuki Ishii, Kazuo Yano, Takashi Kobayashi
  • Publication number: 20070257305
    Abstract: By decreasing the threshold voltage shift due to the potential change of the cells adjacent in a word line direction, the reliability of a flash memory can be enhanced. Memory cells of a flash memory are formed in p-type wells of a semiconductor substrate and include gate insulator films, floating gates, high-K insulator films, and control gates (word lines). The floating gates and control gates (word lines) are isolated by high-K insulator films. The plurality of memory cells arrayed in row a direction are isolated by isolation trenches extending in a column direction. In the isolation trenches, a silicon oxide film is embedded. In the silicon oxide film, an air gap is provided. A lower end of the air gap extends near to the bottom of the isolation trench, and its upper end extends further above the upper surface of the high-K insulator film covering the floating gate.
    Type: Application
    Filed: April 26, 2007
    Publication date: November 8, 2007
    Inventors: Yoshitaka SASAGO, Tomoyuki Ishi, Toshiyuki Mine, Taro Osabe