Patents by Inventor Taro Osabe

Taro Osabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030094647
    Abstract: In a semiconductor flash memory required to have high reliability, injection and extraction of electrons must be performed through an oxide film obtained by directly oxidizing a silicon substrate. Accordingly, the voltage to be used is a large voltage ranging from positive to negative one. In contrast, by storing charges in a plurality of dispersed regions, high reliability is achieved. Based on the high reliability, transfer of electrons is permitted through not only the oxide film obtained by directly thermally oxidizing a high reliability silicon substrate but also another oxide film deposited by CVD, or the like. In consequence, a device is controlled by electric potentials of the same polarity upon writing of data and upon erasing of data.
    Type: Application
    Filed: February 26, 2002
    Publication date: May 22, 2003
    Inventors: Taro Osabe, Tomoyuki Ishii
  • Publication number: 20020113257
    Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
    Type: Application
    Filed: September 4, 2001
    Publication date: August 22, 2002
    Inventors: Taro Osabe, Tomoyuki Ishii, Kazuo Yano, Takashi Kobayashi