Patents by Inventor Tatsuji Nishijima

Tatsuji Nishijima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200336066
    Abstract: Provided is a structure which is capable of central control of an electric device and a sensor device and a structure which can reduce power consumption of an electric device and a sensor device. A central control system includes at least a central control device, an output unit, and an electric device or a sensor device. The central control device performs arithmetic processing on information transmitted from the electric device or the sensor device and makes the output unit output information obtained by the arithmetic processing. It is possible to know the state of the electric device or the sensor device even apart from the electric device or the sensor device. The electric device or the sensor device includes a transistor which includes an activation layer using a semiconductor with the band gap wider than that of single crystal silicon.
    Type: Application
    Filed: April 15, 2020
    Publication date: October 22, 2020
    Inventors: Shunpei YAMAZAKI, Tatsuji NISHIJIMA, Hidetomo KOBAYASHI, Tomoaki ATSUMI, Kiyoshi KATO
  • Patent number: 10630176
    Abstract: Provided is a structure which is capable of central control of an electric device and a sensor device and a structure which can reduce power consumption of an electric device and a sensor device. A central control system includes at least a central control device, an output unit, and an electric device or a sensor device. The central control device performs arithmetic processing on information transmitted from the electric device or the sensor device and makes the output unit output information obtained by the arithmetic processing. It is possible to know the state of the electric device or the sensor device even apart from the electric device or the sensor device. The electric device or the sensor device includes a transistor which includes an activation layer using a semiconductor with the band gap wider than that of single crystal silicon.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: April 21, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tatsuji Nishijima, Hidetomo Kobayashi, Tomoaki Atsumi, Kiyoshi Kato
  • Patent number: 10324521
    Abstract: A microcontroller which operates in a low power consumption mode is provided. A microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register in the peripheral circuit is provided in an interface with a bus line. A power gate for controlling supply control is provided. The microcontroller can operate not only in a normal operation mode where all circuits are active, but also in a low power consumption mode where some of the circuits are active. A volatile memory and nonvolatile memory are provided in a register, such as a register of the CPU. Data in the volatile memory is backed up in the nonvolatile memory before the power supply is stopped. In the case where the operation mode returns to the normal mode, when power supply is started again, data in the nonvolatile memory is written back into the volatile memory.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: June 18, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Nishijima, Hidetomo Kobayashi, Tomoaki Atsumi, Kiyoshi Kato, Shunpei Yamazaki
  • Patent number: 10002580
    Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: June 19, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Nishijima, Seiichi Yoneda, Takuro Ohmaru, Jun Koyama
  • Publication number: 20180123455
    Abstract: Provided is a structure which is capable of central control of an electric device and a sensor device and a structure which can reduce power consumption of an electric device and a sensor device. A central control system includes at least a central control device, an output unit, and an electric device or a sensor device. The central control device performs arithmetic processing on information transmitted from the electric device or the sensor device and makes the output unit output information obtained by the arithmetic processing. It is possible to know the state of the electric device or the sensor device even apart from the electric device or the sensor device. The electric device or the sensor device includes a transistor which includes an activation layer using a semiconductor with the band gap wider than that of single crystal silicon.
    Type: Application
    Filed: November 8, 2017
    Publication date: May 3, 2018
    Inventors: Shunpei YAMAZAKI, Tatsuji NISHIJIMA, Hidetomo KOBAYASHI, Tomoaki ATSUMI, Kiyoshi KATO
  • Patent number: 9900007
    Abstract: An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: February 20, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiichi Yoneda, Tatsuji Nishijima
  • Patent number: 9819261
    Abstract: Provided is a structure which is capable of central control of an electric device and a sensor device and a structure which can reduce power consumption of an electric device and a sensor device. A central control system includes at least a central control device, an output unit, and an electric device or a sensor device. The central control device performs arithmetic processing on information transmitted from the electric device or the sensor device and makes the output unit output information obtained by the arithmetic processing. It is possible to know the state of the electric device or the sensor device even apart from the electric device or the sensor device. The electric device or the sensor device includes a transistor which includes an activation layer using a semiconductor with the band gap wider than that of single crystal silicon.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: November 14, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tatsuji Nishijima, Hidetomo Kobayashi, Tomoaki Atsumi, Kiyoshi Kato
  • Patent number: 9748400
    Abstract: A semiconductor device in which a transistor using an oxide semiconductor containing In, Zn, or the like for a channel region can be driven like a p-channel transistor is provided. The semiconductor device includes a transistor and an inverter, wherein an output of the inverter is input to a gate of the transistor, a channel region of the transistor includes an oxide semiconductor film containing In, Zn, or Sn, and each channel region of transistors in the inverter contains silicon. When a high voltage is input to the inverter, a low voltage is output from the inverter and is input to the gate of the transistor, so that the transistor is turned off. When a low is input to the inverter, a high voltage is output from the inverter and is input to the gate of the transistor, so that the transistor is turned on.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: August 29, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tatsuji Nishijima
  • Publication number: 20170179955
    Abstract: An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.
    Type: Application
    Filed: March 9, 2017
    Publication date: June 22, 2017
    Inventors: Seiichi YONEDA, Tatsuji NISHIJIMA
  • Patent number: 9607975
    Abstract: In a wireless tag with which a wireless communication system whose electric power of a carrier wave from a R/W is high, an overvoltage protection circuit is provided to prevent from generating excessive electric power in the wireless tag when the wireless tag receives excessive electric power. However, as noise is generated by operation of the overvoltage protection circuit, an error of reception occurs in receiving a signal whose modulation factor is small. To solve the problem, the maximum value of generated voltage in the wireless tag is held in a memory circuit after the overvoltage protection circuit operates, then the overvoltage protection circuit is controlled in accordance with the maximum value of generated voltage. The voltages at which the overvoltage protection circuit starts and stops operating are different from each other, and hysteresis occurs between the timing when the overvoltage protection circuit starts and stops operating.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: March 28, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tatsuji Nishijima
  • Patent number: 9595964
    Abstract: An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: March 14, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiichi Yoneda, Tatsuji Nishijima
  • Publication number: 20170038826
    Abstract: A microcontroller which operates in a low power consumption mode is provided. A microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register in the peripheral circuit is provided in an interface with a bus line. A power gate for controlling supply control is provided. The microcontroller can operate not only in a normal operation mode where all circuits are active, but also in a low power consumption mode where some of the circuits are active. A volatile memory and nonvolatile memory are provided in a register, such as a register of the CPU. Data in the volatile memory is backed up in the nonvolatile memory before the power supply is stopped. In the case where the operation mode returns to the normal mode, when power supply is started again, data in the nonvolatile memory is written back into the volatile memory.
    Type: Application
    Filed: October 21, 2016
    Publication date: February 9, 2017
    Inventors: Tatsuji NISHIJIMA, Hidetomo KOBAYASHI, Tomoaki ATSUMI, Kiyoshi KATO, Shunpei YAMAZAKI
  • Publication number: 20170039970
    Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.
    Type: Application
    Filed: October 21, 2016
    Publication date: February 9, 2017
    Inventors: Tatsuji NISHIJIMA, Seiichi YONEDA, Takuro OHMARU, Jun KOYAMA
  • Patent number: 9490241
    Abstract: A semiconductor device which is downsized while a short-channel effect is suppressed and whose power consumption is reduced is provided. A downsized SRAM circuit is formed, which includes a first inverter including a first transistor and a second transistor overlapping with each other; a second inverter including a third transistor and a fourth transistor overlapping with each other; a first selection transistor; and a second selection transistor. An output terminal of the first inverter, an input terminal of the second inverter, and one of a source and a drain of the first selection transistor are connected to one another, and an output terminal of the second inverter, an input terminal of the first inverter, and one of a source and a drain of the second selection transistor are connected to one another.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: November 8, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masumi Nomura, Tatsuji Nishijima, Kosei Noda
  • Patent number: 9478704
    Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: October 25, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Nishijima, Seiichi Yoneda, Takuro Ohmaru, Jun Koyama
  • Patent number: 9477294
    Abstract: A microcontroller which operates in a low power consumption mode is provided. A microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register in the peripheral circuit is provided in an interface with a bus line. A power gate for controlling supply control is provided. The microcontroller can operate not only in a normal operation mode where all circuits are active, but also in a low power consumption mode where some of the circuits are active. A volatile memory and nonvolatile memory are provided in a register, such as a register of the CPU. Data in the volatile memory is backed up in the nonvolatile memory before the power supply is stopped. In the case where the operation mode returns to the normal mode, when power supply is started again, data in the nonvolatile memory is written back into the volatile memory.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: October 25, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Nishijima, Hidetomo Kobayashi, Tomoaki Atsumi, Kiyoshi Kato, Shunpei Yamazaki
  • Patent number: 9423860
    Abstract: To provide a microcontroller that can operate in a low power consumption mode. The microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register of the peripheral circuit is formed at an interface with a bus line. A power gate is provided for control of power supply, and the microcontroller can operate in the low power consumption mode where some circuits alone are active, in addition to in a normal operation mode where all circuits are active. A register with no power supply in the low power consumption mode, such as a register of the CPU, includes a volatile memory and a nonvolatile memory.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: August 23, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Nishijima, Hidetomo Kobayashi, Tomoaki Atsumi, Kiyoshi Kato
  • Patent number: 9344090
    Abstract: An object is to provide a programmable logic device which can hold configuration data even when a power supply potential is not supplied, has short start-up time of a logic block after the power is supplied, and can operate with low power. A transistor in a memory portion of a programmable switch includes a material which allows a sufficient reduction in off-state current of the transistor, such as an oxide semiconductor material which is a wide bandgap semiconductor. When the semiconductor material which allows a sufficient reduction in off-state current of the transistor is used, configuration data can be held even when a power supply potential is not supplied.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: May 17, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Nishijima, Seiichi Yoneda
  • Patent number: 9270173
    Abstract: A DC converter circuit having high reliability is provided. The DC converter circuit includes: an inductor configured to generate electromotive force in accordance with a change in flowing current; a transistor including a gate, a source, and a drain, which is configured to control generation of the electromotive force in the inductor by being on or off; a rectifier in a conducting state when the transistor is off; and a control circuit configured to control on and off of the transistor. The transistor includes an oxide semiconductor layer whose hydrogen concentration is less than or equal to 5×1019 atoms/cm3 as a channel formation layer.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: February 23, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Yoshiaki Ito, Hiroki Inoue, Tatsuji Nishijima
  • Patent number: 9214587
    Abstract: A photoelectric conversion module in which an output voltage defect is suppressed is obtained by forming in parallel over a substrate n number (n is a natural number) of integrated photoelectric conversion devices each including a plurality of cells that are connected in series, and electrically connecting in parallel n?1 number or less of integrated photoelectric conversion devices with normal electrical characteristics and excluding an integrated photoelectric conversion device with a characteristic defect such as a short-circuit between top and bottom electrodes or a leak current due to a structural defect or the like formed in a semiconductor layer or the like.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: December 15, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuo Nishi, Yasushi Maeda, Ryosuke Motoyoshi, Yuji Oda, Kei Takahashi, Yoshiaki Ito, Tatsuji Nishijima