Patents by Inventor Tatsuji Nishijima
Tatsuji Nishijima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120293206Abstract: An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.Type: ApplicationFiled: May 3, 2012Publication date: November 22, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Seiichi YONEDA, Tatsuji NISHIJIMA
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Publication number: 20120294067Abstract: In a semiconductor device performing pipeline processing with the use of a reading portion reading an instruction and an arithmetic portion performing an operation in accordance with the instruction, the instruction held in the reading portion is transmitted from the flip-flop to the memory when branch prediction turns out to be wrong. Note that the arithmetic portion controls transmission and reception of the instruction between the flip-flop and the memory which are included in the reading portion. This enables elimination of redundant operations in the reading portion in the case where an instruction read by the reading portion after the branch prediction turns out to be wrong is a subroutine, or the like. That is, the instruction held in the memory is transmitted back to the flip-flop without rereading of the same instruction by the reading portion, whereby the instruction can be output to the arithmetic portion.Type: ApplicationFiled: May 16, 2012Publication date: November 22, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hidetomo KOBAYASHI, Yutaka SHIONOIRI, Tatsuji NISHIJIMA
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Publication number: 20120294096Abstract: A memory device includes a level shifter which includes a first input terminal, a second input terminal, a first output terminal configured to output a first signal, and a second output terminal configured to output an inverted signal of the first signal, a first buffer, a second buffer, a first node, and a second node. The first node, where an output terminal of the first buffer and the first input terminal of the level shifter are connected, is configured to hold a first data. The second node, where an output terminal of the second buffer and the second input terminal of the level shifter are connected, is configured to hold a second data.Type: ApplicationFiled: May 17, 2012Publication date: November 22, 2012Inventor: Tatsuji Nishijima
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Publication number: 20120293231Abstract: An object of one embodiment of the present invention to provide a latch circuit includes a level shifter and a buffer in which transistors each including a channel region formed in an oxide semiconductor film are connected in series. Thus, data can be held in the latch circuit even when power is not supplied.Type: ApplicationFiled: May 17, 2012Publication date: November 22, 2012Inventor: Tatsuji Nishijima
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Patent number: 8311315Abstract: A color image of an inspection object is taken by an imaging means capable of taking a color image to obtain color information of an RGB color space. A gray-scale image of a color component of the RGB color space or another color space is generated, and the inspection object is detected by a pattern recognition technique. Alternatively, a binary image is generated from the generated gray-scale image, and the inspection object is detected by performing pattern recognition on the binary image. Color data of a pixel occupied by the detected inspection object is compared with color data of a non-defective inspection object which is previously prepared to judge whether or not the inspection object is defective. In addition, this judgment result is reflected in another manufacturing step through a network and product quality is improved.Type: GrantFiled: June 27, 2011Date of Patent: November 13, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Teppei Oguni, Tatsuji Nishijima, Akiharu Miyanaga
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Publication number: 20120274355Abstract: An object of the present invention is to provide a programmable logic device which has short start-up time after supply of power is stopped, is highly integrated, and operates with low power. In a programmable logic device including an input/output block, a plurality of logic blocks each including a logic element, and a wiring connecting the plurality of logic blocks, the logic element has a configuration memory for holding configuration data and a look-up table including a selection circuit. The configuration memory includes a plurality of memory elements each of which includes a transistor whose channel region is in an oxide semiconductor film and an arithmetic circuit provided between the transistor and the selection circuit. Configuration data is selectively changed and output by the selection circuit in accordance with an input signal.Type: ApplicationFiled: April 23, 2012Publication date: November 1, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Tatsuji NISHIJIMA
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Publication number: 20120268164Abstract: A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off.Type: ApplicationFiled: April 3, 2012Publication date: October 25, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hidetomo KOBAYASHI, Masami ENDO, Yutaka SHIONOIRI, Hiroki DEMBO, Tatsuji NISHIJIMA, Kazuaki OHSHIMA, Seiichi YONEDA, Jun KOYAMA
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Patent number: 8184923Abstract: In the case where a digital camera is used for evaluating a display quality of an image display panel, moire is generated due to a shift of a pixel pitch between a pixel of a panel and a pixel of a digital camera, and thus, a great influence is given as measurement deviation. The present invention carries out a panel display quality evaluation at low cost and short time with relieved influence of moire by treating a value, which is obtained by recognizing a coordinate of a panel pixel in a shot image based on an image for detecting a coordinate and positional information thereof with high accuracy and by calculating average luminance by panel pixel unit based on a center position of a coordinate, as representative luminance in each pixel of the panel, in a panel evaluation method of shooting an image display panel with a digital camera.Type: GrantFiled: April 1, 2005Date of Patent: May 22, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Tatsuji Nishijima
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Publication number: 20120062430Abstract: An object is to provide a semiconductor device capable of preventing an alternating leakage current from flowing into a voltage detection circuit. The semiconductor device includes an antenna circuit, a resonance frequency regulating circuit, a voltage detection circuit, and a first capacitor. The resonance frequency regulating circuit includes a second capacitor including one terminal electrically connected to a first terminal of the antenna circuit; and a transistor including a first terminal electrically connected to the other terminal of the second capacitor, a second terminal electrically connected to a second terminal of the antenna circuit, and a gate electrically connected to the first capacitor and the voltage detection circuit.Type: ApplicationFiled: September 12, 2011Publication date: March 15, 2012Inventor: Tatsuji Nishijima
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Publication number: 20120062240Abstract: An object is to widen detection range of current. A current detection circuit includes a first resistor, which is connected to a first connection terminal and a second connection terminal; a second resistor, which is connected to the first resistor; a third resistor, which is connected to the first resistor; a first transistor, a source of which is connected to the second resistor; a second transistor, a source of which is connected to the third resistor, and a drain and a gate of which is connected to a gate of the first transistor; a third transistor, a source of which is connected to the source of the second transistor, and a gate of which is connected to the drain of the first transistor; and a fourth resistor, which is connected to the drain of the third transistor, and to which a voltage is input.Type: ApplicationFiled: August 31, 2011Publication date: March 15, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Tatsuji NISHIJIMA
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Publication number: 20120042926Abstract: A photoelectric conversion module in which an output voltage defect is suppressed is obtained by forming in parallel over a substrate n number (n is a natural number) of integrated photoelectric conversion devices each including a plurality of cells that are connected in series, and electrically connecting in parallel n?1 number or less of integrated photoelectric conversion devices with normal electrical characteristics and excluding an integrated photoelectric conversion device with a characteristic defect such as a short-circuit between top and bottom electrodes or a leak current due to a structural defect or the like formed in a semiconductor layer or the like.Type: ApplicationFiled: August 18, 2011Publication date: February 23, 2012Inventors: Kazuo Nishi, Yasushi Maeda, Ryosuke Motoyoshi, Yuji Oda, Kei Takahashi, Yoshiaki Ito, Tatsuji Nishijima
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Publication number: 20120024963Abstract: An object of this invention is to provide a semiconductor device (an RFID) with reduced loss of voltage/current corresponding to a threshold value of a transistor, and having a voltage/current rectification property. Another object of this invention is to simplify a fabrication process and a circuit configuration. A rectifier circuit is provided in an element included in a semiconductor device (RFID) capable of communicating data wirelessly. As compared to the case where only a diode is provided, coils are provided between gate terminals and drain terminals of transistors constituting the diode in a rectifier circuit, so that the coils overlap an antenna which receives a radio wave, whereby a voltage output by the rectifier circuit is increased using electromagnetic coupling between the antenna which receives a radio wave and the coils, so that the rectification efficiency is improved.Type: ApplicationFiled: July 21, 2011Publication date: February 2, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yutaka SHIONOIRI, Tatsuji NISHIJIMA, Misako SATO, Shuhei MAEDA
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Patent number: 8094962Abstract: In the case where a digital camera is used for evaluating a display quality of an image display panel, moire is generated due to a shift of a pixel pitch between a pixel of a panel and a pixel of a digital camera, and thus, a great influence is given as measurement deviation. The present invention carries out a panel display quality evaluation at low cost and short time with relieved influence of moire by treating a value, which is obtained by recognizing a coordinate of a panel pixel in a shot image based on an image for detecting a coordinate and positional information thereof with high accuracy and by calculating average luminance by panel pixel unit based on a center position of a coordinate, as representative luminance in each pixel of the panel, in a panel evaluation method of shooting an image display panel with a digital camera.Type: GrantFiled: April 1, 2005Date of Patent: January 10, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Tatsuji Nishijima
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Publication number: 20110284837Abstract: In a transistor, a drain electrode to which a high electric field is applied is formed over a flat surface, and an end portion of a gate electrode on the drain electrode side in a channel width direction and an end portion of the gate electrode in a channel length direction are covered with an oxide semiconductor with a gate insulating layer between the gate electrode and the oxide semiconductor layer, so that withstand voltage of the transistor is improved. Further, a semiconductor device for high power application, in which the transistor is used, can be provided.Type: ApplicationFiled: May 11, 2011Publication date: November 24, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Tatsuji NISHIJIMA
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Publication number: 20110262027Abstract: A color image of an inspection object is taken by an imaging means capable of taking a color image to obtain color information of an RGB color space. A gray-scale image of a color component of the RGB color space or another color space is generated, and the inspection object is detected by a pattern recognition technique. Alternatively, a binary image is generated from the generated gray-scale image, and the inspection object is detected by performing pattern recognition on the binary image. Color data of a pixel occupied by the detected inspection object is compared with color data of a non-defective inspection object which is previously prepared to judge whether or not the inspection object is defective. In addition, this judgment result is reflected in another manufacturing step through a network and product quality is improved.Type: ApplicationFiled: June 27, 2011Publication date: October 27, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Teppei Oguni, Tatsuji Nishijima, Akiharu Miyanaga
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Publication number: 20110243475Abstract: In the case where a digital camera is used for evaluating a display quality of an image display panel, moire is generated due to a shift of a pixel pitch between a pixel of a panel and a pixel of a digital camera, and thus, a great influence is given as measurement deviation, when a digital camera having not so high resolution to the panel so as to lower cost of the digital camera.Type: ApplicationFiled: June 17, 2011Publication date: October 6, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Masahiko HAYAKAWA, Tatsuji NISHIJIMA
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Publication number: 20110235295Abstract: A passive RF tag has an advantage of being compact and lightweight. However, the driving power is limited. In order to increase the maximum communication distance and the number of objects simultaneously identified, power consumption should be efficient and reduced. The semiconductor device includes an antenna circuit, a modulation circuit electrically connected to the antenna circuit, a filter circuit electrically connected to the modulation circuit, and a logic circuit electrically connected to the filter circuit, in which the modulation circuit includes a first resistor and a transistor, the filter circuit includes a capacitor, one terminal of the first resistor is electrically connected to one of a source and a drain of the transistor, the other terminal of the first resistor is electrically connected to the antenna circuit, and a gate of the transistor is electrically connected to one terminal of the capacitor and the logic circuit.Type: ApplicationFiled: March 17, 2011Publication date: September 29, 2011Inventor: Tatsuji Nishijima
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Patent number: 7970232Abstract: In the case where a digital camera is used for evaluating a display quality of an image display panel, moire is generated due to a shift of a pixel pitch between a pixel of a panel and a pixel of a digital camera, and thus, a great influence is given as measurement deviation. The present invention carries out a panel display quality evaluation at low cost and short time with relieved influence of moire by treating a value, which is obtained by recognizing a coordinate of a panel pixel in a shot image based on an image for detecting a coordinate and positional information thereof with high accuracy and by calculating average luminance by panel pixel unit based on a center position of a coordinate, as representative luminance in each pixel of the panel, in a panel evaluation method of shooting an image display panel with a digital camera.Type: GrantFiled: April 1, 2005Date of Patent: June 28, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Tatsuji Nishijima
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Patent number: 7970200Abstract: A color image of an inspection object is taken by an imaging means capable of taking a color image to obtain color information of an RGB color space. A gray-scale image of a color component of the RGB color space or another color space is generated, and the inspection object is detected by a pattern recognition technique. Alternatively, a binary image is generated from the generated gray-scale image, and the inspection object is detected by performing pattern recognition on the binary image. Color data of a pixel occupied by the detected inspection object is compared with color data of a non-defective inspection object which is previously prepared to judge whether or not the inspection object is defective. In addition, this judgment result is reflected in another manufacturing step through a network and product quality is improved.Type: GrantFiled: June 25, 2010Date of Patent: June 28, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Teppei Oguni, Tatsuji Nishijima, Akiharu Miyanaga
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Publication number: 20110133706Abstract: A DC converter circuit having high reliability is provided. The DC converter circuit includes: an inductor configured to generate electromotive force in accordance with a change in flowing current; a transistor including a gate, a source, and a drain, which is configured to control generation of the electromotive force in the inductor by being on or off; a rectifier in a conducting state when the transistor is off; and a control circuit configured to control on and off of the transistor. The transistor includes an oxide semiconductor layer whose hydrogen concentration is less than or equal to 5×1019 atoms/cm3 as a channel formation layer.Type: ApplicationFiled: November 30, 2010Publication date: June 9, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Kei Takahashi, Yoshiaki Ito, Hiroki Inoue, Tatsuji Nishijima