Patents by Inventor Tatsuo Morita

Tatsuo Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100135053
    Abstract: A power conversion circuit includes a bidirectional switch 2. The bidirectional switch 2 has a first gate terminal G1, a second gate terminal G2, a first ohmic terminal S1 and a second ohmic terminal S2. The bidirectional switch 2 has four operation states. In the first state, the bidirectional switch 2 operates as a diode having a cathode as the first ohmic terminal S1 and an anode as the second ohmic terminal S2. In a second state, the bidirectional switch 2 operates as a diode having an anode as the first ohmic terminal S1 and a cathode as the second ohmic terminal S2. In a third state, the bidirectional switch 2 is bidirectionally conductive with via a diode between the first and second ohmic terminals S1 and S2. In a fourth state, the bidirectional switch 2 cuts off a bidirectional current between the first and second ohmic terminals.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 3, 2010
    Inventors: Atsushi Morimoto, Matsuo Shiraishi, Kouichi Ishikawa, Tatsuo Morita, Yasuhiro Uemoto, Tsuyoshi Tanaka
  • Patent number: 7728359
    Abstract: In a nitride semiconductor based bipolar transistor, a contact layer formed so as to contact an emitter layer is composed of n-type InAlGaN quaternary mixed crystals, the emitter layer and the contact layer are selectively removed so that the barrier height with the emitter formed thereon is small, and the ohmic electrode contact resistance can be lowered on the InAlGaN quaternary mixed crystals, for example, so that a WSi emitter electrode becomes an eave. A base electrode is formed by a self-aligned process using the emitter electrode as a mask. By such a configuration, the distance between the emitter and the edge of the base electrode is sufficiently shortened, and the base resistance can be lowered. As a result, a bipolar transistor having favorable high-frequency characteristics can be realized.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: June 1, 2010
    Assignee: Panasonic Corporation
    Inventors: Tatsuo Morita, Tetsuzo Ueda
  • Publication number: 20100127652
    Abstract: A motor driving circuit includes a three-phase inverter circuit 8, including three upper-arm switching elements 56a to 56c for driving upper arms of different phases of a three-phase motor 3, and three lower-arm switching elements 56d to 56f for driving lower arms of different phases. At least one of the upper-arm switching elements 56a to 56c and the lower-arm switching elements 56d to 56f is a semiconductor element that performs a diode operation. The diode operation is an operation in which a voltage less than or equal to a threshold voltage of a gate electrode G is applied to the gate electrode G with reference to a potential of a first ohmic electrode S, thereby conducting a current flow from the first ohmic electrode S to a second ohmic electrode D and blocking a current flow from the second ohmic electrode D to the first ohmic electrode S.
    Type: Application
    Filed: December 2, 2008
    Publication date: May 27, 2010
    Inventors: Tatsuo Morita, Yasuhiro Uemoto, Tsuyoshi Tanaka, Matsuo Shiraishi, Atsushi Morimoto, Kouichi Ishikawa
  • Publication number: 20100097105
    Abstract: A semiconductor device includes a semiconductor layer stack 13 formed on a substrate 11 and having a channel region, a first electrode 16A and a second electrode 16B formed spaced apart from each other on the semiconductor layer stack 13, a first gate electrode 18A formed between the first electrode 16A and the second electrode 16B, and a second gate electrode 18B formed between the first gate electrode 18A and the second electrode 16B. A first control layer 19A having a p-type conductivity is formed between the semiconductor layer stack 13 and the first gate electrode 18A.
    Type: Application
    Filed: November 20, 2007
    Publication date: April 22, 2010
    Inventors: Tatsuo Morita, Manabu Yanagihara, Hidetoshi Ishida, Yasuhiro Uemoto, Hiroaki Ueno, Tsuyoshi Tanaka, Daisuke Ueda
  • Publication number: 20090266098
    Abstract: An electronic equipment includes a cooling system using boiling and condensation of a refrigerant, especially stabilizes the cooling performance, and reduces the influence which vibration accompanying phase change of boiling and condensation gives to the electronic equipment. Electronic equipment includes a cooling system including a cooling part which cools heat generating from a heat generator such as a heat generating component by using boiling of a refrigerant and is thermally connected to the heat generator such as the heat generating element, a heat radiation part which radiates heat absorbed by the refrigerant in the cooling part by condensation, a refrigerant drive part for delivering the condensed refrigerant to the cooling part again, and piping which fluidly connects them, and the electronic equipment includes preliminary heating means for heating the refrigerant, which flows to the cooling part from the refrigerant drive part, between the refrigerant drive part and the cooling part.
    Type: Application
    Filed: April 27, 2009
    Publication date: October 29, 2009
    Inventors: Noriyo NISHIJIMA, Shigeo OHASHI, Nariaki SHIGYO, Tatsuo MORITA
  • Patent number: 7595680
    Abstract: A bidirectional switch includes a field-effect transistor having a first ohmic electrode, a second ohmic electrode and a gate electrode, and a control circuit for controlling between a conduction state and a cut-off state by applying a bias voltage to the gate electrode. The control circuit applies the bias voltage from the first ohmic electrode as a reference when a potential of the second ohmic electrode is higher than the potential of the first ohmic electrode, and applies the bias voltage from the second ohmic electrode as a reference when the potential of the second electrode is lower than the potential of the first ohmic electrode.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: September 29, 2009
    Assignee: Panasonic Corporation
    Inventors: Tatsuo Morita, Manabu Yanagihara, Hidetoshi Ishida, Yasuhiro Uemoto, Manabu Inoue
  • Publication number: 20090166677
    Abstract: A semiconductor device includes: a semiconductor substrate; a diode having a cathode formed on a first surface side of the semiconductor substrate and an anode formed on a second surface side of the semiconductor substrate; and a transistor formed over the semiconductor substrate. The transistor includes a semiconductor layer laminate formed over the semiconductor substrate, a source electrode and a drain electrode that are formed spaced apart from each other over the semiconductor layer laminate, and a gate electrode formed between the source electrode and the drain electrode. The source electrode is electrically connected to the anode, and the drain electrode is electrically connected to the cathode.
    Type: Application
    Filed: December 8, 2008
    Publication date: July 2, 2009
    Inventors: Daisuke SHIBATA, Tatsuo Morita, Manabu Yanagihara, Yasuhiro Uemoto
  • Patent number: 7465968
    Abstract: A semiconductor device includes: a first nitride semiconductor layer having at least one projection on an upper surface thereof; a second nitride semiconductor layer formed on a top surface of the projection of the first nitride semiconductor layer and having a higher carrier concentration than the first nitride semiconductor layer; a first electrode formed on the second nitride semiconductor layer so as to overhang like a canopy and functioning as one of a source and a drain; and a second electrode formed to the side of the projection on the first nitride semiconductor layer and functioning as a gate.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: December 16, 2008
    Assignee: Panasonic Corporation
    Inventors: Tetsuzo Ueda, Satoshi Nakazawa, Tatsuo Morita
  • Publication number: 20080211567
    Abstract: A bidirectional switch includes a field-effect transistor having a first ohmic electrode, a second ohmic electrode and a gate electrode, and a control circuit for controlling between a conduction state and a cut-off state by applying a bias voltage to the gate electrode. The control circuit applies the bias voltage from the first ohmic electrode as a reference when a potential of the second ohmic electrode is higher than the potential of the first ohmic electrode, and applies the bias voltage from the second ohmic electrode as a reference when the potential of the second electrode is lower than the potential of the first ohmic electrode.
    Type: Application
    Filed: January 25, 2008
    Publication date: September 4, 2008
    Inventors: Tatsuo MORITA, Manabu YANAGIHARA, Hidetoshi ISHIDA, Yasuhiro UEMOTO, Manabu INOUE
  • Publication number: 20080143421
    Abstract: A bidirectional switch comprises a first FET, a second FET, and a switch controller for controlling a conductive state in which current from a bidirectional power supply electrically connected to drain terminals bidirectionally flows, and a nonconductive state in which the current does not flow. In the conductive state, the switch controller applies, to gate terminals of the first FET and the second FET, a voltage higher than a threshold voltage with reference to a potential at a node to which source terminals of the first FET and the second FET are connected. In the nonconductive state, the switch controller causes the bidirectional power supply and each gate terminal to be electrically insulated from each other, and applies a voltage lower than or equal to the threshold voltage with reference to the potential at the node.
    Type: Application
    Filed: November 2, 2007
    Publication date: June 19, 2008
    Inventors: Manabu Yanagihara, Tatsuo Morita, Yasuhiro Uemoto
  • Publication number: 20080121938
    Abstract: In a nitride semiconductor based bipolar transistor, a contact layer formed so as to contact an emitter layer is composed of n-type InAlGaN quaternary mixed crystals, the emitter layer and the contact layer are selectively removed so that the barrier height with the emitter formed thereon is small, and the ohmic electrode contact resistance can be lowered on the InAlGaN quaternary mixed crystals, for example, so that a WSi emitter electrode becomes an eave. A base electrode is formed by a self-aligned process using the emitter electrode as a mask. By such a configuration, the distance between the emitter and the edge of the base electrode is sufficiently shortened, and the base resistance can be lowered. As a result, a bipolar transistor having favorable high-frequency characteristics can be realized.
    Type: Application
    Filed: June 20, 2007
    Publication date: May 29, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tatsuo Morita, Tetsuzo Ueda
  • Patent number: 7364327
    Abstract: Reduction of noise is achieved by devising an arrangement of heat generating parts such as a light valve element, an electric power source, a light source, etc. and an arrangement of cooling fans. In cooling the light source, the electric power source and liquid crystal panels, a cooling wind path for the liquid crystal panels and the electric power source is made separate from and independent of a cooling wind path for the light source that generates much heat, a cooling air volume is optimized for the respective cooling wind paths, and noise accompanying the rotation of the cooling fans is reduced. Also, by arranging the cooling fans substantially centrally of the respective cooling wind paths, that volume of noise, which leaks from air intake ports and air exhaust port that are opened to a housing of a unit, is reduced.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: April 29, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Katayama, Hideharu Saito, Keiichiro Tokushige, Tatsuo Morita
  • Patent number: 7293878
    Abstract: A projector having an image display element for modulating light on the basis of an image signal and a projection lens for projecting light emitted from the image display element on a screen, includes: a lamp which has a light emitting source for emitting light; a reflector which reflects light emitted from the light emitting source; a cover glass which covers an emission surface of light from the reflector; a cooling fan disposed outside the reflector; and an air direction changing unit which changes a direction of cooling air caused by the cooling fan. The air direction changing unit is disposed within a space surrounded by the reflector and the cover glass, and outside an emitted light path of light reflected by the reflector. Cooling air within the space is exhausted outside the projector through the cooling fan.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: November 13, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuo Morita, Mikio Shiraishi, Tetsuki Nishimura, Hideki Okuyama
  • Publication number: 20070258054
    Abstract: Reduction of noise is achieved by devising an arrangement of heat generating parts such as a light valve element, an electric power source, a light source, etc. and an arrangement of cooling fans. In cooling the light source, the electric power source and liquid crystal panels, a cooling wind path for the liquid crystal panels and the electric power source is made separate from and independent of a cooling wind path for the light source that generates much heat, a cooling air volume is optimized for the respective cooling wind paths, and noise accompanying the rotation of the cooling fans is reduced. Also, by arranging the cooling fans substantially centrally of the respective cooling wind paths, that volume of noise, which leaks from air intake ports and air exhaust port that are opened to a housing of a unit, is reduced.
    Type: Application
    Filed: July 9, 2007
    Publication date: November 8, 2007
    Applicant: HITACHI, LTD.
    Inventors: Takeshi Katayama, Hideharu Saito, Keiichiro Tokushige, Tatsuo Morita
  • Publication number: 20070205407
    Abstract: A nitride semiconductor device includes a semiconductor stacked structure which is formed of a nitride semiconductor having a first principal surface and a second principal surface opposed to the first principal surface and which includes an active layer. The first principal surface of the semiconductor stacked structure is formed with a plurality of indentations whose plane orientations are the {0001} plane, and the plane orientation of the second principal surface is the {1-101} plane. The active layer is formed along the {1-101} plane.
    Type: Application
    Filed: March 1, 2007
    Publication date: September 6, 2007
    Inventors: Hisayoshi Matsuo, Tatsuo Morita, Tetsuzo Ueda, Daisuke Ueda
  • Patent number: 7252416
    Abstract: Reduction of noise is achieved by devising an arrangement of heat generating parts such as a light valve element, an electric power source, a light source, etc. and an arrangement of cooling fans. In cooling the light source, the electric power source and liquid crystal panels, a cooling wind path for the liquid crystal panels and the electric power source is made separate from and independent of a cooling wind path for the light source that generates much heat, a cooling air volume is optimized for the respective cooling wind paths, and noise accompanying the rotation of the cooling fans is reduced. Also, by arranging the cooling fans substantially centrally of the respective cooling wind paths, that volume of noise, which leaks from air intake ports and air exhaust port that are opened to a housing of a unit, is reduced.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: August 7, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Katayama, Hideharu Saito, Keiichiro Tokushige, Tatsuo Morita
  • Publication number: 20070131968
    Abstract: A material of a gate electrode is a conductive oxide having a higher work function than that of conventionally used Pd and so on, thereby achieving a normally-off transistor without reducing the sheet carrier concentration of a heterojunction. It is thus possible to achieve a normally-off operation while reducing an increase in the specific on-state resistance.
    Type: Application
    Filed: November 22, 2006
    Publication date: June 14, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tatsuo Morita, Tetsuzo Ueda
  • Publication number: 20070117355
    Abstract: A semiconductor device includes: a first nitride semiconductor layer having at least one projection on an upper surface thereof; a second nitride semiconductor layer formed on a top surface of the projection of the first nitride semiconductor layer and having a higher carrier concentration than the first nitride semiconductor layer; a first electrode formed on the second nitride semiconductor layer so as to overhang like a canopy and functioning as one of a source and a drain; and a second electrode formed to the side of the projection on the first nitride semiconductor layer and functioning as a gate.
    Type: Application
    Filed: November 16, 2006
    Publication date: May 24, 2007
    Inventors: Tetsuzo Ueda, Satoshi Nakazawa, Tatsuo Morita
  • Patent number: 7210789
    Abstract: A liquid crystal display device in which light from a light source enters a liquid crystal panel and exits therefrom for projection of an image and includes a heat conducting member and a cooling unit. The heat conducting member is contacted with at least one of a light incident surface and a light outgoing surface of the liquid crystal panel, is light-transmissive, and has a larger area than a light transmitting area of the liquid crystal panel. The cooling jacket, which comprises a flow channel for a cooling medium in its inside, is provided around the heat conducting member so that the flow channel exists only outside of the light transmitting area in a surface direction of the liquid crystal panel.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: May 1, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Masakazu Hoshino, Shigeo Ohashi, Tatsuo Morita, Katsuyuki Watanabe
  • Publication number: 20060044420
    Abstract: An image pickup apparatus includes: an image pickup portion for picking up a subject image to generate image data and reading out the generated one frame image data that is divided into plural fields; a storage portion for temporarily storing the image data obtained by performing predetermined processing on the image data that has been read out; and an image processing portion for generating record image data and auxiliary image data for a use other than recording, based on the image data that has been stored in the storage portion. The record image data is generated using image data of all of the fields of the one frame of the image data, and the auxiliary image data is generated using image data of a subset of the fields of the one frame of the image data. The variation of the amount of compressed data is reduced, the processing time is reduced, and the capacity requirement of the buffer memory is reduced.
    Type: Application
    Filed: August 25, 2005
    Publication date: March 2, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takuya Iguchi, Yoshimasa Okabe, Yasutoshi Yamamoto, Tatsuo Morita