Abstract: A dual mode switching regulator includes a PWM/PFM control architecture with PFM frequency foldback based on extending switching cycle off time TOFF. A controller includes a PWM/PFM clock generator that, in response to assertion of a TOFF control signal, extends the nominal PWM switching cycle off-time TOFFnom for an extended off-time TOFFext (variable), so that switching cycle off-time is [TOFFnom+TOFFext]. A TOFF modulator generates the TOFF control signal based on generating a TOFF control voltage from an ITOFF control current equal to [IPWM-IPFM], generated by sourcing an IPWM reference current, and, in response to a PFM load condition, sinking an IPFM control current. The TOFF control signal is asserted when the TOFF control voltage is not substantially equal to a TOFF reference voltage at the end of TOFFnom, to cause the PWM/PFM clock generator to extend switching cycle off-time to [TOFFnom+TOFFext], with the duration of TOFFext determining PFM switching frequency.

Abstract: Multiphase switched mode power supply clock apparatus, systems, articles of manufacture, and related methods are disclosed. An example apparatus includes a first clock recovery circuit to in response to obtaining a first clock pulse, transmit the first clock pulse to a power converter to cause the power converter to switch based on the first clock pulse, in response to obtaining a second clock pulse after the first clock pulse re-transmit the second clock pulse to a second clock recovery circuit, and increment a count value, and in response to the count value meeting a phase selection value, reset the count value.

Abstract: In some examples, a switch-mode power supply circuit comprises a pulse generation circuit comprising an oscillator, the oscillator configured to generate first pulses using a fixed frequency regulation for a first load condition that exceeds a predefined threshold and configured to generate second pulses using a variable frequency regulation for a second load condition that does not exceed the predefined threshold. The circuit also includes a power converter coupled to the pulse generation circuit and configured to convert a first voltage to a regulated voltage using either one of the first or second pulses generated by the pulse generation circuit. The circuit further comprises an output filter coupled to the power converter and configured to produce a second voltage from the regulated voltage.

Abstract: A dual mode switching regulator includes a PWM/PFM control architecture with PFM frequency foldback based on extending switching cycle off time TOFF. A controller includes a PWM/PFM clock generator that, in response to assertion of a TOFF control signal, extends the nominal PWM switching cycle off-time TOFFnom for an extended off-time TOFFext (variable), so that switching cycle off-time is [TOFFnom+TOFFext]. A TOFF modulator generates the TOFF control signal based on generating a TOFF control voltage from an ITOFF control current equal to [IPWM-IPFM], generated by sourcing an IPWM reference current, and, in response to a PFM load condition, sinking an IPFM control current. The TOFF control signal is asserted when the TOFF control voltage is not substantially equal to a TOFF reference voltage at the end of TOFFnom, to cause the PWM/PFM clock generator to extend switching cycle off-time to [TOFFnom+TOFFext], with the duration of TOFFext determining PFM switching frequency.

Abstract: A system includes a current mirror coupled to a first transistor, the first transistor includes a first gate, a first current terminal, and a second current terminal, a controller coupled to the current mirror and a converter, the controller is to output a delayed signal for a second transistor, the second transistor being a part of the converter, and a source voltage coupled to the current mirror.

Abstract: A device includes a first amplifier and a second amplifier. The first amplifier includes an inverting input configured to be coupled to a feedback node of an output of a power converter, a first non-inverting input configured to couple to a first voltage node, a second non-inverting input, and an output. The second amplifier includes an inverting input coupled to the output of the first amplifier, a non-inverting input coupled to a second voltage node, and an output. The device also includes a first transistor coupled to the output of the first amplifier and having a control terminal coupled to the output of the second amplifier, a capacitor coupled to a ground node and to the second non-inverting input of the first amplifier, and a current node coupled to the capacitor.

Abstract: An integrated circuit includes an enable circuit and a main circuit. The enable circuit is configured to receive a supply voltage and an enable signal at a first voltage level, generate a start voltage by clamping the supply voltage to a threshold voltage level that is less than the supply voltage and generate an enable intermediate signal at a second voltage level that is less than the first voltage level and limited by the start voltage. In response to the enable intermediate signal being generated at the second voltage level, the enable circuit is configured to generate a start signal (such as a current). In response to the start signal being generated, the enable circuit is configured to generate an output signal at a third voltage level that is less than the first voltage level. The main circuit is configured to utilize the output signal as a supply voltage rail.

Abstract: An integrated circuit includes an enable circuit and a main circuit. The enable circuit is configured to receive a supply voltage and an enable signal at a first voltage level, generate a start voltage by clamping the supply voltage to a threshold voltage level that is less than the supply voltage and generate an enable intermediate signal at a second voltage level that is less than the first voltage level and limited by the start voltage. In response to the enable intermediate signal being generated at the second voltage level, the enable circuit is configured to generate a start signal (such as a current). In response to the start signal being generated, the enable circuit is configured to generate an output signal at a third voltage level that is less than the first voltage level. The main circuit is configured to utilize the output signal as a supply voltage rail.

Abstract: A circuit and method for operating a switching mode power supply. A clock is driven by a current source to generate pulses at a fixed frequency using pulse width modulation for normal load demands. For light load demands, the current to the clock is reduced, and therefore the clock generates pulses at a lower, variable frequency and fixed duration using pulse frequency modulation. Thus, depending on the load condition, either fixed frequency pulses or fixed duration pulses are automatically provided to a power stage for conversion to an output voltage.

Abstract: A circuit and method for operating a switching mode power supply. A clock is driven by a current source to generate pulses at a fixed frequency using pulse width modulation for normal load demands. For light load demands, the current to the clock is reduced, and therefore the clock generates pulses at a lower, variable frequency and fixed duration using pulse frequency modulation. Thus, depending on the load condition, either fixed frequency pulses or fixed duration pulses are automatically provided to a power stage for conversion to an output voltage.

Abstract: An error amplifier includes a difference amplifier providing an error signal representing a difference in voltage between a feedback signal and a reference signal. The error amplifier further includes a compensation circuit limiting the rate of change of the error signal. The compensation circuit includes a switch that when activated effectively removes a circuit portion from the compensation circuit. A switch signal indicates for the switch to be activated when the feedback signal exceeds the reference signal by a predefined amount. The compensation circuit may further include a second switch that when activated effectively removes a second circuit portion from the compensation circuit. A second switch signal indicates for the second switch to be activated when the feedback signal exceeds the reference signal by a second predefined amount.

Abstract: An error amplifier includes a first amplification circuit with a reference signal input and a feedback signal input representing the amplitude of a load voltage of a switched mode power supply. The error amplifier includes a difference amplifier providing a difference signal representing a difference between the reference signal and the feedback signal, provided for determining the duty cycle of a switching signal in the switched mode power supply. The first amplification circuit further includes a control circuit providing a control signal generated as a function of the difference between the reference signal and the feedback signal. The error amplifier also includes a second amplification circuit, included in a compensation circuit. The second amplification circuit receives the control signal, and the operating current of the second amplification circuit is adjusted by an amount indicated by the control signal.

Abstract: An error amplifier includes a difference amplifier providing an error signal representing a difference in voltage between a feedback signal and a reference signal. The error amplifier further includes a compensation circuit limiting the rate of change of the error signal. The compensation circuit includes a switch that when activated effectively removes a circuit portion from the compensation circuit. A switch signal indicates for the switch to be activated when the feedback signal exceeds the reference signal by a predefined amount. The compensation circuit may further include a second switch that when activated effectively removes a second circuit portion from the compensation circuit. A second switch signal indicates for the second switch to be activated when the feedback signal exceeds the reference signal by a second predefined amount.

Abstract: An apparatus includes pulse width modulation (PWM) circuitry configured to generate a PWM signal based on a feedback voltage associated with current flowing through a load, such as one or more light emitting diodes (LEDs). The apparatus also includes a power switch configured to control the current flowing through the load on the PWM signal. The apparatus further includes averaging circuitry configured to provide an average of the feedback voltage to the PWM circuitry. The averaging circuitry is may be configured to provide the feedback voltage to the PWM circuitry during a first phase of operation and to provide the average of the feedback voltage to the PWM circuitry during a second phase of operation. The average of the feedback voltage may be referenced to a reference voltage received by an error amplifier in the PWM circuitry during both the first and second phases of operation.

Abstract: An error amplifier includes a first amplification circuit with a reference signal input and a feedback signal input representing the amplitude of a load voltage of a switched mode power supply. The error amplifier includes a difference amplifier providing a difference signal representing a difference between the reference signal and the feedback signal, provided for determining the duty cycle of a switching signal in the switched mode power supply. The first amplification circuit further includes a control circuit providing a control signal generated as a function of the difference between the reference signal and the feedback signal. The error amplifier also includes a second amplification circuit, included in a compensation circuit. The second amplification circuit receives the control signal, and the operating current of the second amplification circuit is adjusted by an amount indicated by the control signal.

Abstract: A regulator regulates one or more light emitting diodes (LEDs) so as to control an average current through the LEDs. The regulator could include a transistor switch that can couple the LEDs to ground. The regulator could also include circuitry that controls the transistor switch. The circuitry could use a substantially constant reference voltage to regulate the average current through the one or more LEDs. The transistor switch could couple the one or more LEDs to ground through a resistor, and the circuitry could include an error amplifier that compares the reference voltage to a voltage across the resistor. The circuitry could also include a gate driver that can drive a gate of the transistor switch. The error amplifier could be disabled for a period of time when the transistor switch is non-conductive, and the circuitry could include logic for enabling and disabling the error amplifier.

Abstract: A system and method are disclosed for providing a process, temperature and over-drive invariant over-current protection circuit. The over-current protection circuit comprises a power transistor, a sense transistor, at least one current sense transistor and at least one current reference transistor. The over-current protection circuit provides a current limit trip value that remains substantially constant over temperature variations, and over-drive voltage variations, and process variations.

Abstract: A boost hysteretic DC-DC converter is provided. The converter includes a power switch, a hysteretic comparator, an inductor, an output capacitor, and a resistive device. The resistive device is coupled to the bottom of the output capacitor, so that the output voltage is equal to the sum of the capacitor voltage and the voltage across the resistive device. The resistance of the resistance device is sufficiently large that the output voltage ripple is in phase with the inductor current.

Abstract: A method for sensing current independently of variations in operating conditions is provided that includes generating a switch signal at a switching element. A reference signal is generated at a reference signal generator that is operable to track the switching element. A sense signal is generated based on the switch signal. An output current of the switching element is sensed based on a difference between the reference signal and the sense signal.

Abstract: A compensation network for an error amplifier is provided. During normal operation, proportional-integral control is performed, and a capacitor of the compensation network is coupled to the error current. During a fault condition, the capacitor is de-coupled from the error current and discharged, and proportional control is performed. After the fault condition ends, the capacitor is re-connected to the error current.