Abstract: The present invention provides a Schmitt trigger-based FinFET static random access memory (SRAM) cell, which is an 8-FinFET structure. A FinFET has the functions of two independent gates. The new SRAM cell uses only 8 FinFET per cell, compared with the 10-FinFET structure in previous works. As a result, the cell structure of the present invention can save chip area and raise chip density. Furthermore, this new SRAM cell can effectively solve the conventional problem that the 6T SRAM cell is likely to have read errors at a low operating voltage.

Abstract: A static random access memory with data controlled power supply, which comprises a memory cell circuit and at least one Write-assist circuit, for providing power to the memory cell circuit according to data to be written to the memory cell circuit.

Abstract: A SRAM that keeps the memory cell array under a low voltage in the Standby mode and Write mode, and raises the memory cell array supply voltage to a high voltage in the Read mode. A SRAM comprising: at least one memory cell circuit, comprising a latch circuit with at least two inverters, and comprising two power receiving terminals for receiving power; and a power supplying circuit, for providing the power to the memory cell circuit, such that the voltages at the power receiving terminals of the latch circuit is below a predetermined voltage level when data is written to the latch circuit. In one embodiment, the memory cell circuit includes a plurality of data accessing terminals and the data accessing terminals are respectively controlled by at least two pass-transistor switch devices.

Abstract: The invention relates to a battery connecting tabs for electrically connecting a plurality of batteries. The battery connecting tabs include a first layer and a second layer adhered to the first layer. The second layer is physically and electrically connected to the first layer, and the second layer has a plurality of holes formed thereon, wherein the conductivity of the second layer is higher than the first layer, the thickness of the second layer is thicker than the first layer, and the first layer is physically and electrically connected to electrodes of the batteries.

Abstract: SRAM writing system and related apparatus are provided. The writing system of the invention has a dummy replica writing circuit, a negative pulse controller and at least a normal writing circuit; each normal writing circuit includes a write driver and a negative pulse supplier. While writing, the dummy replica writing circuit drives a dummy replica bit-line, such that the negative pulse controller generates a negative pulse control signal according to level of the dummy replica bit-line. In each writing circuit, when the write driver conducts to connect an associated bit-line to a bias end for driving a level transition, the negative pulse supplier switches the bias end from an operation voltage to a different negative pulse voltage according to the received negative pulse control signal.

Abstract: A lighting device includes a cover, a cap, a central post having opposite ends coupled to the cover and the cap respectively, and a plurality of first and second frames. The cover and the cap both form a plurality of circumferentially distributed slots opposite to each other. The first and second frames have ends respectively fit into the slots of the cover and the cap and each frame carries at least one light-emitting diode. As such, a light-emitting diode lighting device that is hollow, light-weighted, and exhibiting excellent heat dissipation is formed.

Abstract: A multi-directional light incidence back light plate includes a plurality of light bars of high light transmittance arranged to juxtapose each other to form a plate like or a grating like structure. Each light bar has opposite ends to which light sources of light-emitting diode (LED) are mounted so that light emitting from the light sources transmits through the light bar to form a uniform luminous cylinder, which serves as a primary light source for backlighting. A plurality of secondary light sources is arranged at sides of the primary light source to constitute a complete arrangement of a back light plate. The secondary light sources are composed of red light and green light that are combined with the light bar at a predetermined ratio so that various color lights are used to generate excellent color saturation (Ra).

Abstract: A light emitting diode (LED) projection lamp includes a lamp body and a plurality of LEDs. The lamp body includes an inverted conical shaped external cover, an electric contact base formed at the tip of the external cover, and a plurality of protrusions arranged on an internal wall of the external cover with a circular distribution, and each protrusion has at least one fixing surface. The LEDs are installed separately on each fixing surface, and an inclination is formed between lights emitted by the LEDs and a projection plane for reducing reflective lights, and the LEDs are electrically coupled to the electric contact base, such that heat produced by using the LEDs is conducted directly to the external cover for its dissipation to improve the heat dissipating efficiency and lifespan of the lamp, and the angular arrangement of the LEDs also improves the saturation and reflection of the light.

Abstract: A high load driving device is disclosed. The driving device comprises an inverter receiving a digital voltage. The inverter reverses the digital voltage, and then sends out it. The output terminal of the inverter is coupled to a capacitor, a first P-type field-effect transistor (FET), a second P-type FET, a first N-type FET, and a third N-type FET. A push-up circuit is composed of these transistors and a second N-type FET and coupled to a P-type push-up FET. A load is coupled to a high voltage through the P-type push-up FET. When the digital voltage rises from a low level to a high level, the push-up circuit utilizes the original voltage drop of the capacitor to control the P-type push-up FET, whereby the gate voltage of the P-type push-up FET is at a low stabilization voltage that is lower than the ground potential. Then, the load is driven rapidly.

Abstract: A method for generating an image object, performed by a mobile electronic device, comprises the following steps. The mobile electronic device comprises multiple shutter objects, and each shutter object corresponds to an orientation type. A signal generated by one of the shutter objects is detected. A orientation type is determined according to the shutter object generating the signal. The image object with the determined orientation type is stored.

Abstract: A disturb-free static random access memory cell includes: a latch circuit having a first access terminal and a second access terminal; a first switching circuit having a first bit transferring terminal coupled to the first access terminal, a first control terminal coupled to a first write word line, and a second bit transferring terminal; a second switching circuit having a third bit transferring terminal coupled to the second access terminal, a second control terminal coupled to a second write word line, and a fourth bit transferring terminal coupled to the second bit transferring terminal; a third switching circuit having a fifth bit transferring terminal coupled to the fourth bit transferring terminal, a third control terminal coupled to a word line, and a sixth bit transferring terminal coupled to a bit line; and a sensing amplifier coupled to the bit line, for determining a bit value appearing at the bit line.

Abstract: Methods and apparatus are provided for varying one or more of a supply voltage and reference voltage in an integrated circuit, using independent control of a diode voltage in an asymmetrical double-gate device. An integrated circuit is provided that is controlled by one or more of a supply voltage and a reference voltage. The integrated circuit comprises an independently controlled asymmetrical double-gate device to adjust one or more of the supply voltage and the reference voltage. The independent control may comprise, for example, a back gate bias. The independently controlled asymmetrical double-gate device may be employed in a number of applications, including voltage islands, static RAM, and to improve the power and performance of a processing unit.

Abstract: A method for manufacturing light-emitting diode devices. Multiple metal frames are provided. The metal frames are adjacent to each other and are arranged on a same plane. Each metal frame includes a first connection pin and a second connection pin. A light-emitting diode chip is disposed on and electrically connected to each metal frame. The metal frames are respectively bent, enabling the adjacent metal frames to separate from each other. A moldboard formed with a plurality of mold cavities is provided. The bent metal frames are respectively disposed in the mold cavities, locating each light-emitting diode chip in each mold cavity. The mold cavities are respectively filled with package gel. The package gel filled in each mold cavity covers each light-emitting diode chip. The package gel is solidified. The mold cavities are separated from the package gel. The metal frames are separated from each other, forming the light-emitting diode devices.

Abstract: Asymmetrical SRAM cells are improved by providing one or more of improved read stability and improved write performance and margin. A first inverter and a second inverter are cross-coupled and configured for selective coupling to true and complementary bit lines under control of read and write word lines. The first inverter is formed by a first, n-type, FET (NFET) and a second, p-type, FET (PFET). Process and/or technology approaches can be employed to adjust the relative strength of the FETS to obtain, for example, read margin, write margin, and/or write performance improvements.

Abstract: A dynamic logic gate has a device for charging a dynamic node during a pre-charge phase of a clock. A logic tree evaluates the dynamic node with a device during an evaluate phase of the clock. The dynamic node has a keeper circuit comprising an inverter with its input coupled to the dynamic node and its output coupled to the back gate of a dual gate PFET device. The source of the dual gate PFET is coupled to the power supply and its drain is coupled to the dynamic node forming a half latch. The front gate of the dual gate PFET is coupled to a logic circuit with a mode input and a logic input coupled back to a node sensing the state of the dynamic node. The mode input may be a slow mode to preserve dynamic node state or the clock delayed that turns ON the strong keeper after evaluation.

Abstract: A heat dissipation device is provided for dissipating heat from a heat source inside a notebook computer, and includes a hood, a bottom board, a thermal insulation layer, and at least one fan. The hood and the bottom board together define a heat dissipation channel. The bottom board integrally forms a plurality of fins and pegs. The bottom board is set above the heat source. The fan is set above the bottom board to efficiently expel heat from the inside to the outside. With the plurality of fins and pegs, the heat dissipation surface area of the bottom board and the heat source is increased and the overall heat dissipation performance is enhanced.

Abstract: Techniques are provided for employing independent gate control in asymmetrical memory cells. A memory circuit, such as an SRAM circuit, can include a number of bit line structures, a number of word line structures that intersect the bit line structures to form a number of cell locations, and a number of asymmetrical memory cells located at the cell locations. Each of the asymmetrical cells can be selectively coupled to a corresponding one of the bit line structures under control of a corresponding one of the word line structures. Each of the cells can include a number of field effect transistors (FETS), and at least one of the FETS can be configured with separately biased front and back gates. One gate can be biased separately from the other gate in a predetermined manner to enhance read stability of the asymmetrical cell.

Abstract: A cascaded pass-gate test circuit including interposed split-output drive devices provides accurate measurement of critical timing parameters of pass gates. The rise time and fall time of signals passed through the pass gate can be separately measured in a ring oscillator or one-shot delay line configuration. Inverters or other buffer circuits are provided as drive devices to couple the pass gates in cascade. The final complementary tree in each drive device is split so that the only one of the output pull-down transistor or pull-up transistor is connected to the next pass gate input, while the other transistor is connected to the output of the pass gate. The result is that the state transition associated with the device connected to the pass gate input is dominant in the delay, while the other state transition is propagated directly to the output of the pass gate, bypassing the pass gate.

Abstract: A detection method for detecting a QRS wave is disclosed. An electrocardiogram (ECG) signal is provided. The ECG signal is enhanced to generate a processed signal. A first crest of the processed signal is determined. Each crest following the first crest is defined as a second crest. The level of each second crest is higher than a first threshold value. The result of defining the second crest is utilized to determine whether the QRS wave has occurred and approached a first crest.

Abstract: A light-emitting diode lighting tube includes a casing, an aluminum base board, which is fit into the casing and carries a plurality of light-emitting diodes, at least two reflective members respectively arranged on opposite sides of the light-emitting diodes, and first and second end caps respectively mounted to opposite ends of the casing. The casing has a radial cross-section forming an opening extending in an axial direction of the casing. The aluminum base board is fit to retention sections formed beside the opening. The two reflective members are arranged on opposite sides of the LEDs for reflecting lights emitting from the LEDs.