Abstract: A VLSIC page printer controller includes an instruction processor which responds to a host computer and a printer video processor for accessing data from memory under the control of the instruction processor and serializing data for transfer to a printer through a video port. An I/O interface interconnects the printer controller with an I/O bus to which is connected a host computer, memory devices, and other peripheral devices. An internal memory interface connects the printer controller to memory, and the printer video processor is provided with direct memory access (DMA). Data and instruction caches and an instruction ROM are provided on-chip. A RISC instruction processing unit includes as an integral part thereof the special function circuits of orthogonal rotator, bit/byte mirror, and pixel modification.

Abstract: The present invention provides a test and set bypass mechanism which allows access to a semaphore while eliminating memory bandwidth degradation due to the traditional "spin-locking" problem. Generally, a storage and comparison structure in a processor, such as a content addressable memory (CAM), is used to store the address of the semaphore whenever it is requested. Thus, the process/processor, or other processors in a multiprocessor system, then need only check to see if the semaphore address is present in its respective storage and comparison structure. Consequently, there is no need to make multiple memory transactions for failed access of the semaphore, and hence, effective memory bandwidth is increased.