Abstract: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. An embodiment of one such method includes forming a plurality of through holes in a substrate with the through holes arranged in arrays, and attaching a plurality of singulated microelectronic dies to the substrate with an active side of the individual dies facing toward the substrate and with a plurality of terminals on the active side of the individual dies aligned with corresponding holes in the substrate. The singulated dies are attached to the substrate after forming the holes in the substrate.

Abstract: An apparatus and method for improving the yield and reducing the cost of forming a semiconductor device assembly. An interposer substrate is formed with interconnections in the form of conductive bumps on both a first surface and a second surface to provide a respective first level interconnect and a second level interconnect for a semiconductor die to be mounted to the interposer substrate. The conductive bumps and conductive elements may be formed simultaneously by a plating process. The conductive bumps on the first surface are arranged to correspond with bond pads of a semiconductor die for the first level interconnect. The conductive bumps on the second surface are configured to correspond with a terminal pad pattern of a carrier substrate or other higher-level packaging.

Abstract: A circuit package is formed using a leadframe. The leadframe is formed or etched to align a plurality of bond pad structures above a reference plane while supporting leadframe fingers are positioned below the reference plane. Jumper wires are wirebonded between terminals on the die and the bond pads to form a package subassembly. The subassembly is encapsulated and then background to remove the leadframe fingers and surrounding frame. The bond pads which remain embedded in the encapsulation material are exposed on the lower surface of the package for connection to further conductors.

Abstract: A system for degating a packaged semiconductor device that includes a tape substrate includes a first element and a second element. The first element of the system is positionable adjacent to a first major surface of the packaged semiconductor device and includes a receptacle for receiving a portion of a gate of the packaged semiconductor device. A second element of the degating system is positionable adjacent to a second major surface of the packaged semiconductor device and includes a degating element alignable with the gate. The degating element is extendable through the gate to force a portion of the gate and a sprue therein into the receptacle of the first element.

Abstract: Apparatus and methods relating to semiconductor assemblies. A semiconductor assembly includes an interposer which may be constructed from a flexible material, such as a polyimide tape. A pattern of conductive traces disposed on a first surface of the interposer is in electrical communication with a semiconductor die attached to the first surface. Interconnect recesses accessible on the opposite second surface expose one or more conductive traces. A conductive element, such as a solder ball, disposed substantially within the interconnect recess allows the assembly to be mounted on a substrate or a similar assembly. By substantially containing the conductive element within the interconnect recess, the height of the completed assembly is reduced. Assemblies may be stacked to form multidie assemblies. Interconnect structures, such as connection pads, or enlarged traces upon the first surface are employed to connect stacked assemblies.

Abstract: Microelectronic devices, associated assemblies, and associated methods are disclosed herein. For example, certain aspects of the invention are directed toward a microelectronic device that includes a microfeature workpiece having a side and an aperture in the side. The device can further include a workpiece contact having a surface. At least a portion of the surface of the workpiece contact can be accessible through the aperture and through a passageway extending between the aperture and the surface. Other aspects of the invention are directed toward a microelectronic support device that includes a support member having a side carrying a support contact that can be connectable to a workpiece contact of a microfeature workpiece. The device can further include recessed support contact means carried by the support member. The recessed support contact means can be connectable to a second workpiece contact of the microfeature workpiece.

Abstract: A mold gate of a tape substrate includes an aperture formed in the flexible dielectric film of the tape substrate and a support element which is carried by a surface of the flexible dielectric film. The aperture of the mold gate may be formed by die cutting or etching processes. The support element of the mold gate is substantially coplanar with conductive traces carried by the flexible dielectric film, and may be formed from the same material as the conductive traces. The support element of the mold gate may be fabricated by patterning a conductive film and formed at substantially the same time as the conductive traces of the tape substrate are formed. Packaging methods and degating methods that include use of the tape substrate are also disclosed.

Abstract: A flexible film interposer for stacking a flip chip semiconductor die onto a second (bottom) semiconductor die, semiconductor devices and stacked die assemblies that incorporate the flexible film interposer, and methods of fabricating the devices and assemblies are provided. The incorporation of the flexible film interposer achieves densely packaged semiconductor devices, without the need for a redistribution layer (RDL).

Abstract: A circuit package is formed using a leadframe. The leadframe is formed or etched to align a plurality of bond pad structures above a reference plane while supporting leadframe fingers are positioned below the reference plane. Jumper wires are wirebonded between terminals on the die and the bond pads to form a package subassembly. The subassembly is encapsulated and then background to remove the leadframe fingers and surrounding frame. The bond pads which remain embedded in the encapsulation material are exposed on the lower surface of the package for connection to further conductors.

Abstract: A method and apparatus for packaging a semiconductor die with an interposer substrate. The semiconductor device assembly includes a conductively bumped semiconductor die and an interposer substrate having multiple recesses formed therein. The semiconductor die is mounted to the interposer substrate with the conductive bumps disposed in the multiple recesses so that the active surface of the semiconductor die is directly mounted to a facing surface of the interposer substrate. One or more openings may be provided in an opposing surface of the interposer substrate which extends to the multiple recesses and the bumps disposed therein and dielectric filler material introduced through the one or more openings into to the recesses.

Abstract: An interposer includes a substrate, first and second sets of contact pads carried by the substrate, and receptacles formed in a surface of the substrate and exposing contact pads of the second set. The interposer may also include conductive traces carried by the substrate to electrically connect corresponding contact pads of the first and second sets. The receptacles are configured to at least partially receive conductive structures, such as solder balls, that are secured to the contact pads of the second set. Thus, the interposer is useful in providing semiconductor device assemblies and packages of reduced height or profile. Such assemblies and packages are also described, as are multi-chip modules including such assemblies or packages. In addition, methods for designing and fabricating the interposer are disclosed, as are methods for forming assemblies, packages, and multi-chip modules that include the interposer.

Abstract: A semiconductor device for dissipating heat generated by a die during operation and having a low height profile, a semiconductor die package incorporating the device, and methods of fabricating the device and package are provided. In one embodiment, the semiconductor device comprises a thick thermally conductive plane (e.g., copper plane) mounted on a thin support substrate and interfaced with a die. Thermally conductive via interconnects extending through the substrate conduct heat generated by the die from the conductive plane to conductive balls mounted on traces on the opposing side of the substrate. In another embodiment, the semiconductor devices comprises a thick thermally conductive plane (e.g., copper foil) sandwiched between insulative layers, with signal planes (e.g., traces, bonding pads) disposed on the insulative layers, a die mounted on a first signal plane, and solder balls mounted on bonding pads of a second signal plane.

Abstract: A flexible film interposer for stacking a flip chip semiconductor die onto a second (bottom) semiconductor die, semiconductor devices and stacked die assemblies that incorporate the flexible film interposer, and methods of fabricating the devices and assemblies are provided. The incorporation of the flexible film interposer achieves densely packaged semiconductor devices, without the need for a redistribution layer (RDL).

Abstract: A method and apparatus for increasing the integrated circuit density in a flip chip semiconductor device assembly and decreasing the time for dielectrically filling such assembly using less dielectric material. The semiconductor device assembly includes a conductively bumped semiconductor die and an interposer substrate having multiple recesses formed therein. The semiconductor die is mounted to the interposer substrate with the bumps disposed in the multiple recesses so that the die face is directly adjacent a surface of the interposer substrate. One or more openings may be provided in an opposing lower surface of the interposer substrate or a periphery thereof which extends to the multiple recesses and the conductive bumps disposed therein. Dielectric filler material may then be provided through the one or more openings to the recesses.

Abstract: Semiconductor die units for forming BOC BGA packages, methods of encapsulating a semiconductor die unit, a mold for use in the method, and resulting encapsulated packages are provided. In particular, the invention provides a semiconductor die unit comprising an integrated circuit die with a plurality of bond pads in an I-shaped layout and an overlying support substrate having an I-shaped wire bond slot.

Abstract: Apparatus and methods relating to semiconductor assemblies. A semiconductor assembly includes an interposer which may be constructed from a flexible material, such as a polyimide tape. A pattern of conductive traces disposed on a first surface of the interposer is in electrical communication with a semiconductor die attached to the first surface. Interconnect recesses accessible on the opposite second surface expose one or more conductive traces. A conductive element, such as a solder ball, disposed substantially within the interconnect recess allows the assembly to be mounted on a substrate or a similar assembly. By substantially containing the conductive element within the interconnect recess, the height of the completed assembly is reduced. Assemblies may be stacked to form multidie assemblies. Interconnect structures, such as connection pads, or enlarged traces upon the first surface are employed to connect stacked assemblies.

Abstract: Various embodiments of an interposer for mounting a semiconductor die, as well as methods for forming the interposer, are disclosed. The interposer includes flexible solder pad elements that are formed from a core material of the interposer, such that the interposer may absorb thermally induced stresses and conform to warped or uneven surfaces. Embodiments of electronic device packages including a semiconductor die mounted to and electrically connected to the interposer, as well as methods for forming the electronic device packages, are also disclosed. In one electronic device package, the semiconductor die is electrically connected to the interposer with wire bonds attached to a routing layer of the interposer. In another electronic device package, the semiconductor die is electrically connected to the interposer by bonding the semiconductor die to the flexible solder pad elements of the interposer in a flip-chip configuration.

Abstract: A method for assembly and packaging of one or more flip chip-configured semiconductor dice with an interposer substrate to form a flip chip-type semiconductor device assembly. The flip chip-type semiconductor device assembly includes a conductively bumped semiconductor die and an interposer substrate having a plurality of recesses formed therein. The semiconductor die is mounted to the interposer substrate with the conductive bumps disposed in the plurality of recesses so that the die face is adjacent the facing surface of the interposer substrate. One or more openings may be provided in an opposing surface of the interposer substrate which extend to the plurality of recesses and the conductive bumps disposed therein. Dielectric filler material may then be introduced through the one or more openings to the recesses and, optionally, between the semiconductor die and interposer substrate.

Abstract: Supports (40) of microelectronic devices (10) are provided with underfill apertures (60) which facilitate filling underfill gaps (70) with underfill material (74). The underfill aperture may have a longer first dimension (62) and a shorter second dimension (64). In some embodiments, a method of filling the underfill gap (70) employs a removable stencil (80). If so desired, a stencil (80) can be used to fill multiple underfill gaps through multiple underfill apertures in a single pass.

Abstract: A mold gate of a tape substrate includes an aperture formed in the flexible dielectric film of the tape substrate and a support element which is carried by a surface of the flexible dielectric film, is substantially coplanar with conductive traces carried by the flexible dielectric film, and may be formed from the same material as the conductive traces. The aperture of the mold gate may be formed by die cutting or etching processes. The support element of the mold gate may be fabricated by patterning a conductive film and formed at substantially the same time as the conductive traces of the tape substrate are formed. Packaging methods and degating methods that include use of the tape substrate are also within the scope of the present invention.