Abstract: A method and apparatus for assembling semiconductor die-carrying interposer substrates in a stacked configuration. Each interposer substrate bears at least one die mounted by its active surface to a surface of the interposer substrate and wire bonded to terminals on the opposing substrate surface through an opening in the interposer substrate. Two interposer substrates are placed together with die-carrying sides outward and electrically connected with conductive elements extending transversely therebetween to form an interposer assembly, the interposer assembly bearing conductive elements extending transversely from one of the interposer substrates for connection to a carrier substrate. The space between the interposer substrates may be filled with a dielectric underfill material, as may the space between the interposer assembly and the carrier substrate to which the former is mounted.

Abstract: A method and apparatus for increasing the integrated circuit density in a flip chip semiconductor device assembly and decreasing the time for dielectrically filling such assembly using less dielectric material. The semiconductor device assembly includes a conductively bumped semiconductor die and an interposer substrate having multiple recesses formed therein. The semiconductor die is mounted to the interposer substrate with the bumps disposed in the multiple recesses so that the die face is directly adjacent a surface of the interposer substrate. One or more openings may be provided in an opposing lower surface of the interposer substrate or a periphery thereof which extends to the multiple recesses and the conductive bumps disposed therein. Dielectric filler material may then be provided through the one or more openings to the recesses.

Abstract: A solder ball pad is provided for mounting and connecting of electronic devices and, more particularly, apparatus and methods are disclosed providing an improved solder ball pad structure on a substrate, such as a printed circuit board (“PCB”) or a semiconductor die, while enabling better use of the spaces between adjacent solder ball pads, and at the same time providing increased surface area for bonding to a solder ball. More particularly, the inventive solder ball pad structure comprises a terminal pad exposed through an aperture in an insulative mask having a bond pad layer comprising at least another metal layer formed over, at most, a portion of the exposed portion of the terminal pad. Methods of manufacture and substrates incorporating same are also disclosed.

Abstract: Supports (40) of microelectronic devices (10) are provided with underfill apertures (60) which facilitate filling underfill gaps (70) with underfill material (74). The underfill aperture may have a longer first dimension (62) and a shorter second dimension (64). In some embodiments, a method of filling the underfill gap (70) employs a removable stencil (80). If so desired, a stencil (80) can be used to fill multiple underfill gaps through multiple underfill apertures in a single pass.

Abstract: A flexible film interposer for stacking a flip chip semiconductor die onto a second (bottom) semiconductor die, semiconductor devices and stacked die assemblies that incorporate the flexible film interposer, and methods of fabricating the devices and assemblies are provided. The incorporation of the flexible film interposer achieves densely packaged semiconductor devices, without the need for a redistribution layer (RDL).

Abstract: A method for assembly and packaging if of one or more flip chip-configured semiconductor dice with an interposer substrate to form a flip chip semiconductor device assembly. The flip chip semiconductor device assembly includes a conductively bumped semiconductor die and an interposer substrate having a plurality of recesses formed therein. The semiconductor die is mounted to the interposer substrate with the conductive bumps disposed in the plurality of recesses so that the die face is adjacent the facing surface of the interposer substrate. One or more openings may be provided in an opposing surface of the interposer substrate which extend to the plurality of recesses and the conductive bumps disposed therein. Dielectric filler material may then be introduced through the one or more openings to the recesses and, optionally, between the semiconductor die and interposer substrate.

Abstract: A method for assembly and packaging of one or more flip chip-configured semiconductor dice with an interposer substrate to form a flip chip semiconductor device assembly. The flip chip semiconductor device assembly includes a conductively bumped semiconductor die and an interposer substrate having a plurality of recesses formed therein. The semiconductor die is mounted to the interposer substrate with the conductive bumps disposed in the plurality of recesses so that the die face is adjacent the facing surface of the interposer substrate. One or more openings may be provided in an opposing surface of the interposer substrate which extend to the plurality of recesses and the conductive bumps disposed therein. Dielectric filler material may then be introduced through the one or more openings to the recesses and, optionally, between the semiconductor die and interposer substrate.

Abstract: An apparatus and method for improving the yield and reducing the cost of forming a semiconductor device assembly. An interposer substrate is formed with interconnections in the form of conductive bumps on both a first surface and a second surface to provide a respective first level interconnect and a second level interconnect for a semiconductor die to be mounted to the interposer substrate. The conductive bumps and conductive elements may be formed simultaneously by a plating process. The conductive bumps on the first surface are arranged to correspond with bond pads of a semiconductor die for the first level interconnect. The conductive bumps on the second surface are configured to correspond with a terminal pad pattern of a carrier substrate or other higher-level packaging.

Abstract: A solder ball pad for mounting and connecting of electronic devices and, more particularly, apparatus and methods providing an improved solder ball pad structure on a substrate, such as a printed circuit board (“PCB”) or a semiconductor die, while enabling better use of the spaces between adjacent solder ball pads and at the same time providing increased surface area for bonding to a solder ball. More particularly, the inventive solder ball pad structure comprises a terminal pad exposed through an aperture in an insulative mask having a bond pad layer comprising at least another metal layer formed over, at most, a portion of the exposed portion of the terminal pad. Methods of manufacture and substrates incorporating same are also disclosed.

Abstract: An electronic device package having semiconductor die-carrying interposer substrates in a stacked configuration. Each interposer substrate bears at least one die mounted by its active surface to a surface of the interposer substrate and wire bonded to terminals on the opposing substrate surface through an opening in the interposer substrate. Two interposer substrates are placed together with die-carrying sides outward and electrically connected with conductive elements extending transversely therebetween to form an interposer assembly, the interposer assembly bearing conductive elements extending transversely from one of the interposer substrates for connection to a carrier substrate. The space between the interposer substrates may be filled with a dielectric underfill material, as may the space between the interposer assembly and the carrier substrate to which the former is mounted.

Abstract: A method and apparatus for increasing the integrated circuit density in a flip chip semiconductor device assembly and decreasing the time for dielectrically filling such assembly using less dielectric material. The semiconductor device assembly includes a conductively bumped semiconductor die and an interposer substrate having multiple recesses formed therein. The semiconductor die is mounted to the interposer substrate with the bumps disposed in the multiple recesses so that the die face is directly adjacent a surface of the interposer substrate. One or more openings may be provided in an opposing lower surface of the interposer substrate or a periphery thereof which extends to the multiple recesses and the conductive bumps disposed therein. Dielectric filler material may then be provided through the one or more openings to the recesses.

Abstract: A solder ball pad for mounting and connecting of electronic devices and, more particularly, apparatus and methods providing an improved solder ball pad structure on a substrate, such as a printed circuit board (“PCB”) or a semiconductor die, while enabling better use of the spaces between adjacent solder ball pads and at the same time providing increased surface area for bonding to a solder ball. Substrates, electronic device assemblies and systems incorporating the invention are also disclosed.

Abstract: Supports (40) of microelectronic devices (10) are provided with underfill apertures (60) which facilitate filling underfill gaps (70) with underfill material (74). The underfill aperture may have a longer first dimension (62) and a shorter second dimension (64). In some embodiments, a method of filling the underfill gap (70) employs a removable stencil (80). If so desired, a stencil (80) can be used to fill multiple underfill gaps through multiple underfill apertures in a single pass.

Abstract: Semiconductor die units for forming BOC BGA packages, methods of encapsulating a semiconductor die unit, a mold for use in the method, and resulting encapsulated packages are provided. In particular, the invention provides a semiconductor die unit comprising an integrated circuit die with a plurality of bond pads in an I-shaped layout and an overlying support substrate having an I-shaped wire bond slot.

Abstract: A solder ball pad for mounting and connecting of electronic devices and, more particularly, apparatus and methods providing an improved solder ball pad structure on a substrate, such as a printed circuit board (“PCB”) or a semiconductor die, while enabling better use of the spaces between adjacent solder ball pads and at the same time providing increased surface area for bonding to a solder ball. Substrates, electronic device assemblies and systems incorporating the invention are also disclosed.

Abstract: An apparatus and method for improving the yield and reducing the cost of forming a semiconductor device assembly. An interposer substrate is formed with interconnections in the form of conductive bumps on both a first surface and a second surface to provide a respective first level interconnect and a second level interconnect for a semiconductor die to be mounted to the interposer substrate. The conductive bumps and conductive elements may be formed simultaneously by a plating process. The conductive bumps on the first surface are arranged to correspond with bond pads of a semiconductor die for the first level interconnect. The conductive bumps on the second surface are configured to correspond with a terminal pad pattern of a carrier substrate or other higher-level packaging.

Abstract: Semiconductor die units for forming BOC BGA packages, methods of encapsulating a semiconductor die unit, a mold for use in the method, and resulting encapsulated packages are provided. In particular, the invention provides a semiconductor die unit comprising an integrated circuit die with a plurality of bond pads in an I-shaped layout and an overlying support substrate having an I-shaped wire bond slot.

Abstract: A semiconductor device for dissipating heat generated by a die during operation and having a low height profile, a semiconductor die package incorporating the device, and methods of fabricating the device and package are provided. In one embodiment, the semiconductor device comprises a thick thermally conductive plane (e.g., copper plane) mounted on a thin support substrate and interfaced with a die. Thermally conductive via interconnects extending through the substrate conduct heat generated by the die from the conductive plane to conductive balls mounted on traces on the opposing side of the substrate. In another embodiment, the semiconductor devices comprises a thick thermally conductive plane (e.g., copper foil) sandwiched between insulative layers, with signal planes (e.g., traces, bonding pads) disposed on the insulative layers, a die mounted on a first signal plane, and solder balls mounted on bonding pads of a second signal plane.

Abstract: Semiconductor die units for forming BOC BGA packages, methods of encapsulating a semiconductor die unit, a mold for use in the method, and resulting encapsulated packages are provided. In particular, the invention provides a semiconductor die unit comprising an integrated circuit die with a plurality of bond pads in an I-shaped layout and an overlying support substrate having an I-shaped wire bond slot.

Abstract: Semiconductor die units for forming BOC BGA packages, methods of encapsulating a semiconductor die unit, a mold for use in the method, and resulting encapsulated packages are provided. In particular, the invention provides a semiconductor die unit comprising an integrated circuit die with a plurality of bond pads in an I-shaped layout and an overlying support substrate having an I-shaped wire bond slot.