Patents by Inventor Telesphor Kamgaing

Telesphor Kamgaing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11830831
    Abstract: Integration of a side-radiating waveguide launcher system into a semiconductor package beneficially permits the coupling of a waveguide directly to the semiconductor package. Included are a first conductive member and a second conductive member separated by a dielectric material. Also included is a conductive structure, such as a plurality of vias, that conductively couples the first conductive member and the second conductive member. Together, the first conductive member, the second conductive member, and the conductive structure form an electrically conductive side-radiating waveguide launcher enclosing shaped space within the dielectric material. The shaped space includes a narrow first end and a wide second end. An RF excitation element is disposed proximate the first end and a waveguide may be operably coupled proximate the second end of the shaped space.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: November 28, 2023
    Assignee: Intel Corporation
    Inventors: Georgios Dogiamis, Sasha Oster, Johanna Swan, Shawna Liff, Adel Elsherbini, Telesphor Kamgaing, Aleksandar Aleksov
  • Patent number: 11830787
    Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: November 28, 2023
    Assignee: Intel Corporation
    Inventors: Feras Eid, Telesphor Kamgaing, Georgios Dogiamis, Aleksandar Aleksov, Johanna M. Swan
  • Publication number: 20230361802
    Abstract: In various aspects, a radio frequency circuit is provided. The radio frequency circuit may include a substrate that may include a radio frequency front-end to antenna (RF FE-to-Ant) connector. The RF FE-to-Ant connector may include a conductor track structure and a substrate connection structure coupled to the conductor track structure. The substrate may include radio frequency front-end circuitry monolithically integrated in the substrate. The substrate connection structure may include at least one of a solderable structure, a weldable structure, or an adherable structure. The substrate connection structure may be configured to form at least one radio frequency signal interface with an antenna circuit connection structure of a substrate-external antenna circuit. The substrate may include an edge region. The substrate connection structure may be disposed in the edge region.
    Type: Application
    Filed: November 3, 2020
    Publication date: November 9, 2023
    Inventors: Jayprakash THAKUR, Ofir DEGANI, Ronen KRONFELD, Ehud RESHEF, Seong-Youp J. SUH, Tal SHOSHANA, Eytan MANN, Maruti TAMRAKAR, Ashoke RAVI, Jose Rodrigo CAMACHO PEREZ, Timo Sakari HUUSARI, Eli BOROKHOVICH, Amir RUBIN, Ofer BENJAMIN, Tae Young YANG, Harry SKINNER, Kwan ho LEE, Jaejin LEE, Dong-Ho Han, Shahar GROSS, Eran SEGEV, Telesphor KAMGAING
  • Publication number: 20230344131
    Abstract: Embodiments of the invention include a microelectronic device that includes a first substrate having radio frequency (RF) components and a second substrate that is coupled to the first substrate. The second substrate includes a first conductive layer of an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher. A mold material is disposed on the first and second substrates. The mold material includes a first region that is positioned between the first conductive layer and a second conductive layer of the antenna unit with the mold material being a dielectric material to capacitively couple the first and second conductive layers of the antenna unit.
    Type: Application
    Filed: June 29, 2023
    Publication date: October 26, 2023
    Inventors: Feras EID, Sasha N. OSTER, Telesphor KAMGAING, Georgios C. DOGIAMIS, Aleksandar ALEKSOV
  • Patent number: 11784108
    Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: October 10, 2023
    Assignee: Intel Corporation
    Inventors: Feras Eid, Telesphor Kamgaing, Georgios Dogiamis, Aleksandar Aleksov, Johanna M. Swan
  • Publication number: 20230320021
    Abstract: Embodiments may relate an electronic device that includes a first server blade and a second server blade coupled with a chassis. The first and second server blades may include respective microelectronic packages. The electronic device may further include a waveguide coupled to the first and second server blades such that their respective microelectronic packages are communicatively coupled by the waveguide. Other embodiments may be described or claimed.
    Type: Application
    Filed: June 8, 2023
    Publication date: October 5, 2023
    Applicant: Intel Corporation
    Inventors: Telesphor Kamgaing, Johanna M. Swan, Georgios Dogiamis, Henning Braunisch, Adel A. Elsherbini, Aleksandar Aleksov, Richard Dischler
  • Patent number: 11764452
    Abstract: Disclosed herein are various designs for dielectric waveguides, as well as methods of manufacturing such waveguides. One type of dielectric waveguides described herein includes waveguides with one or more cavities in the dielectric waveguide material. Another type of dielectric waveguides described herein includes waveguides with a conductive ridge in the dielectric waveguide material. Dielectric waveguides described herein may be dispersion reduced dielectric waveguides, compared to conventional dielectric waveguides, and may be designed to adjust the difference in the group delay between the lower frequencies and the higher frequencies of a chosen bandwidth.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: September 19, 2023
    Assignee: Intel Corporation
    Inventors: Georgios Dogiamis, Adel A. Elsherbini, Telesphor Kamgaing, Henning Braunisch, Johanna M. Swan
  • Patent number: 11737154
    Abstract: A patch on interposer (PoINT) package is described with a wireless communications interface. Some examples include an interposer, a main patch attached to the interposer, a main integrated circuit die attached to the patch, a second patch attached to the interposer, and a millimeter wave radio die attached to the second patch and coupled to the main integrated circuit die through the interposer to communicate data between the main die and an external component.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: August 22, 2023
    Assignee: Intel Corporation
    Inventor: Telesphor Kamgaing
  • Patent number: 11728290
    Abstract: Embodiments may relate to a microelectronic package that includes a substrate signal path and a waveguide. The package may further include dies that are communicatively coupled with one another by the substrate signal path and the waveguide. The substrate signal path may carry a signal with a frequency that is different than the frequency of a signal that is to be carried by the waveguide. Other embodiments may be described or claimed.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: August 15, 2023
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Georgios Dogiamis, Johanna M. Swan, Aleksandar Aleksov, Telesphor Kamgaing, Henning Braunisch
  • Publication number: 20230246338
    Abstract: Embodiments of the invention include a microelectronic device that includes a first substrate having radio frequency (RF) components and a second substrate that is coupled to the first substrate. The second substrate includes a first conductive layer of an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher. A mold material is disposed on the first and second substrates. The mold material includes a first region that is positioned between the first conductive layer and a second conductive layer of the antenna unit with the mold material being a dielectric material to capacitively couple the first and second conductive layers of the antenna unit.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 3, 2023
    Inventors: Feras EID, Sasha N. OSTER, Telesphor KAMGAING, Georgios C. DOGIAMIS, Aleksandar ALEKSOV
  • Patent number: 11716826
    Abstract: Embodiments may relate an electronic device that includes a first platform and a second platform coupled with a chassis. The platforms may include respective microelectronic packages. The electronic device may further include a waveguide coupled to the first platform and the second platform such that their respective microelectronic packages are communicatively coupled by the waveguide. Other embodiments may be described or claimed.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: August 1, 2023
    Assignee: Intel Corporation
    Inventors: Telesphor Kamgaing, Johanna M. Swan, Georgios Dogiamis, Henning Braunisch, Adel A. Elsherbini, Aleksandar Aleksov, Richard Dischler
  • Patent number: 11715693
    Abstract: Embodiments may relate to a semiconductor package that includes a package substrate coupled with a die. The package may further include a waveguide coupled with the first package substrate. The waveguide may include two or more layers of a dielectric material with a waveguide channel positioned between two layers of the two or more layers of the dielectric material. The waveguide channel may convey an electromagnetic signal with a frequency greater than 30 gigahertz (GHz). Other embodiments may be described or claimed.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: August 1, 2023
    Assignee: Intel Corporation
    Inventors: Georgios Dogiamis, Aleksandar Aleksov, Adel A. Elsherbini, Henning Braunisch, Johanna M. Swan, Telesphor Kamgaing
  • Patent number: 11694962
    Abstract: Embodiments may relate to a microelectronic package that includes an overmold material, a redistribution layer (RDL) in the overmold material, and a die in the overmold material electrically coupled with the RDL on an active side of the die. The RDL is configured to provide electrical interconnection within the overmold material and includes at least one mold interconnect. The microelectronic package may also include a through-mold via (TMV) disposed in the overmold material and electrically coupled to the RDL by the mold interconnect. In some embodiments, the microelectronics package further includes a surface mount device (SMD) in the overmold material. The microelectronics package may also include a substrate having a face on which the overmold is disposed.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: July 4, 2023
    Assignee: Intel Corporation
    Inventors: Georgios Dogiamis, Aleksandar Aleksov, Feras Eid, Telesphor Kamgaing, Johanna M. Swan
  • Publication number: 20230208009
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a core, where the core comprises glass. In an embodiment, a buildup layer is over the core. In an embodiment, a patch antenna with a first patch is under the core, and a second patch is over a surface of the core opposite from the first patch. In an embodiment, the electronic package further comprises a via through the core and coupled to the patch antenna.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Neelam PRABHU GAUNKAR, Georgios C. DOGIAMIS, Telesphor KAMGAING, Aleksandar ALEKSOV, Brandon RAWLINGS, Veronica STRONG
  • Publication number: 20230207332
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a substrate with a first surface and a second surface, where the substrate comprises glass. In an embodiment, the electronic package further comprises a via opening through the substrate, where sidewalls of the via opening have a root mean squared (RMS) surface roughness that is approximately 100nm or greater. In an embodiment, the electronic package further comprises a liner over the sidewalls of the via opening, where an RMS surface roughness of the liner is approximately 50nm or smaller. An electronic package may further comprise a via through the via opening.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 29, 2023
    Inventors: Veronica STRONG, Robert JORDAN, Telesphor KAMGAING
  • Publication number: 20230207439
    Abstract: Embodiments disclosed herein include die modules, electronic packages, and electronic systems. In an embodiment, a die module comprises a substrate, where the substrate comprises glass. In an embodiment, a blind cavity is formed into the substrate. In an embodiment, a first die is in the blind cavity, a second die is over the substrate, and a third die is over the substrate and adjacent to the second die.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Adel A. ELSHERBINI, Telesphor KAMGAING
  • Publication number: 20230208010
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a core, where the core comprises glass. In an embodiment, an electromagnetic wave launcher is embedded in the core. In an embodiment, the electromagnetic wave launcher comprises a fin, where the fin is a conductive material, and where the fin comprises a stepped profile.
    Type: Application
    Filed: December 24, 2021
    Publication date: June 29, 2023
    Inventors: Georgios C. DOGIAMIS, Aleksandar ALEKSOV, Veronica STRONG, Telesphor KAMGAING, Neelam PRABHU GAUNKAR, Brandon RAWLINGS
  • Publication number: 20230207493
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a substrate, where the substrate comprises glass. In an embodiment, a magnetic ring is embedded in the substrate. In an embodiment, a loop is around the magnetic ring. In an embodiment, the loop is conductive and comprises a first via through the substrate, a second via through the substrate, and a trace over a surface of the substrate, where the trace electrically couples the first via to the second via.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Telesphor KAMGAING, Aleksandar ALEKSOV, Veronica STRONG, Neelam PRABHU GAUNKAR, Brandon RAWLINGS, Gerogios C. DOGIAMIS
  • Publication number: 20230207404
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a substrate, where the substrate comprises glass. In an embodiment, a via opening is formed through the substrate, where the via opening has an hourglass shaped profile. In an embodiment, a magnetic layer fills the via opening, and a via is through the magnetic layer. In an embodiment, sidewalls of the via are substantially vertical.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Telesphor KAMGAING, Georgios C. DOGIAMIS, Veronica STRONG, Aleksandar ALEKSOV, Brandon RAWLINGS, Neelam PRABHU GAUNKAR
  • Publication number: 20230207436
    Abstract: Embodiments disclosed herein include die modules, electronic packages, and systems. In an embodiment, a die module comprises a first substrate and a first die over the first substrate. In an embodiment, the die module further comprises a second die over the first substrate adjacent to the first die. In an embodiment, the die module further comprises a via module through the first substrate. In an embodiment, the via module comprises a second substrate, where the second substrate comprises glass, and a via through the second substrate.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Adel A. ELSHERBINI, Telesphor KAMGAING