Patents by Inventor Teruyuki Fujii

Teruyuki Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070287207
    Abstract: An object is to provide a semiconductor device with excellent reproducibility which is manufactured at low cost. A manufacturing method of a semiconductor device includes steps of forming a first electrode over a substrate; forming an insulating layer over the substrate and the first electrode; pressing a mold against the insulating layer to form an opening in the insulating layer; separating the mold from the insulating layer in which the opening is formed; hardening the insulating layer in which the opening is formed to form a partition wall; forming a light-emitting layer over the first electrode and the partition wall; and forming a second electrode over the light-emitting layer. The insulating layer contains a thermosetting resin material or a light curable resin material. The partition wall has a cross-sectional taper angle of 20 to 50°, and edges of a top and bottom thereof are rounded.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 13, 2007
    Inventor: Teruyuki Fujii
  • Patent number: 7259110
    Abstract: It is an object of the present invention to improve the surface planarity of a film by uniforming the thickness of an insulating layer. Further, it is another object of the invention to provide a technology for manufacturing an electronic device typified by a high-definition and high-quality display device with high yield at low cost with the use of the insulating layer. In a method for manufacturing a semiconductor device according to the invention, a semiconductor layer is formed; an insulating layer is formed over the semiconductor layer; a wiring layer connected to the semiconductor layer is formed in an opening provided in the insulating layer; and an electrode layer connected to the wiring layer is formed. The insulating layer is formed by spin coating with a composition containing an insulating material, which has a viscosity of from 10 mPa·s to 50 mPa·s.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: August 21, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideto Ohnuma, Kiyofumi Ogino, Teruyuki Fujii
  • Publication number: 20070178224
    Abstract: One pixel is divided into a first region including a first light emitting element and a second region including a second light emitting element, wherein the first region emits light in one direction and the second region emits light in the direction opposite to that of the first region. Independently driving the first light emitting element and the second light emitting element allows images to be displayed independently on the surface.
    Type: Application
    Filed: April 2, 2007
    Publication date: August 2, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Teruyuki Fujii, Shunpei Yamazaki
  • Patent number: 7220603
    Abstract: It is an object of the present invention to provide a method of manufacturing a display device, which can display images favorably by insulating a short-circuit portion between an anode and a cathode. Further, it is another object of the invention to provide a method of manufacturing a display device, which can prevent intrusion of moisture so as to inhibit deterioration of a light emitting element when the short-circuit portion between the anode and the cathode is insulated. Specifically, the invention provide a method of manufacturing a display device, wherein a reverse bias voltage is applied to the light emitting element including an electro-luminescent material between the anode and the cathode so as to insulate the short-circuit portion between the anode and the cathode at a temperature of from ?40° C. to 8° C., more preferably, from ?25° C. to 8° C.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: May 22, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu Hirakata, Kaoru Tsuchiya, Tomoyuki Iwabuchi, Teruyuki Fujii, Shunpei Yamazaki
  • Patent number: 7199520
    Abstract: One pixel is divided into a first region including a first light emitting element and a second region including a second light emitting element, wherein the first region emits light in one direction and the second region emits light in the direction opposite to that of the first region. Independently driving the first light emitting element and the second light emitting element allows images to be displayed independently on the surface.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: April 3, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Teruyuki Fujii, Shunpei Yamazaki
  • Publication number: 20070010036
    Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device that can suppress generation of a crack and peeling in a resin BM and deterioration of coverage of an upper layer of the resin BM, even if a black resin is used as a material of the resin BM in order to improve a contrast of brightness and a contrast of color.
    Type: Application
    Filed: July 6, 2006
    Publication date: January 11, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Taichi Endo, Teruyuki Fujii, Kiyofumi Ogino
  • Publication number: 20060115942
    Abstract: It is an object of the present invention to provide a semiconductor device including a wiring having a preferable shape. In a manufacturing method comprising the steps of forming a first conductive layer connected to an element and a second conductive layer thereover; forming a resist mask over the second conductive layer; processing the second conductive layer by dry etching with the use of the mask; and processing the first conductive layer by wet etching with the mask left, wherein the etching rate of the second conductive layer is higher than that of the first conductive layer in the dry etching, and wherein the etching rate of the second conductive layer is the same as or more than that of the first conductive layer in the wet etching.
    Type: Application
    Filed: November 15, 2005
    Publication date: June 1, 2006
    Inventors: Satoru Okamoto, Teruyuki Fujii, Hideto Ohnuma, Akihiro Ishizuka
  • Publication number: 20050245078
    Abstract: It is an object of the present invention to improve the surface planarity of a film by uniforming the thickness of an insulating layer. Further, it is another object of the invention to provide a technology for manufacturing an electronic device typified by a high-definition and high-quality display device with high yield at low cost with the use of the insulating layer. In a method for manufacturing a semiconductor device according to the invention, a semiconductor layer is formed; an insulating layer is formed over the semiconductor layer; a wiring layer connected to the semiconductor layer is formed in an opening provided in the insulating layer; and an electrode layer connected to the wiring layer is formed. The insulating layer is formed by spin coating with a composition containing an insulating material, which has a viscosity of from 10 mP·s to 50 mP·s.
    Type: Application
    Filed: April 26, 2005
    Publication date: November 3, 2005
    Inventors: Hideto Ohnuma, Kiyofumi Ogino, Teruyuki Fujii
  • Publication number: 20050095740
    Abstract: It is an object of the present invention to provide a method of manufacturing a display device, which can display images favorably by insulating a short-circuit portion between an anode and a cathode. Further, it is another object of the invention to provide a method of manufacturing a display device, which can prevent intrusion of moisture so as to inhibit deterioration of a light emitting element when the short-circuit portion between the anode and the cathode is insulated. Specifically, the invention provide a method of manufacturing a display device, wherein a reverse bias voltage is applied to the light emitting element including an electro-luminescent material between the anode and the cathode so as to insulate the short-circuit portion between the anode and the cathode at a temperature of from ?40° C. to 8° C., more preferably, from ?25° C. to 8° C.
    Type: Application
    Filed: September 15, 2004
    Publication date: May 5, 2005
    Inventors: Yoshiharu Hirakata, Kaoru Tsuchiya, Tomoyuki Iwabuchi, Teruyuki Fujii, Shunpei Yamazaki
  • Patent number: 6075390
    Abstract: A static key interface circuit has an input terminal coupled to N key switches, where N is an integer greater than one. The N key switches are biased at different potentials, which are supplied to the input terminal when the key switches are closed. A multilevel detector in the key interface circuit detects the potential of the input terminal and generates corresponding result data. A dynamic key interface circuit has an input terminal coupled to P rows of N key switches each and scans the P rows in turn, using a similar multilevel detector. The multilevel detector increases the number of key switches connectable to a single input terminal by a factor of N.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: June 13, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Yasuhiro Shin, Teruyuki Fujii
  • Patent number: 5270696
    Abstract: Disclosed herein is an LCD driver circuit comprising a plurality of cascade-connected LCD drivers. The LCD driver circuit can be activated to make a latch pulse signal input thereto active on the trailing edge thereof and operated even if a corresponding clock pulse signal is input in confronting relationship during a period in which the latch pulse signal is being input. Each of the LCD drivers has a latch pulse control circuit for selecting either one of a first latch pulse signal and a second latch pulse signal generated corresponding to the first latch pulse signal in accordance with an enable signal input at the time the LCD drivers are cascaded, thereby controlling an enable latch circuit and a shift register.
    Type: Grant
    Filed: March 25, 1992
    Date of Patent: December 14, 1993
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Yasuhiro Shin, Teruyuki Fujii
  • Patent number: 5164970
    Abstract: A cascaded driver circuit has two or more stages connected to a common serial data signal line and a common clock pulse signal line. Each stage has a counter circuit for dividing the frequency of the clock pulse signal and an enable latch circuit for latching an enable signal, received from the preceding stage, in response to the divided clock pulses. A data latching circuit in each stage latches serial data in response to the clock pulse signal, starting when the enable signal is latched and stopping when a first number of bits of serial data have been latched. An enable output circuit in each stage sends an enable signal to the next stage when the data latching circuit has latched a second number of bits, the second number being at least two less than the first number.
    Type: Grant
    Filed: December 14, 1990
    Date of Patent: November 17, 1992
    Assignee: OKI Electric Industry Co., Ltd.
    Inventors: Yasuhiro Shin, Teruyuki Fujii