Patents by Inventor Tetsuhiro Iwai
Tetsuhiro Iwai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140332497Abstract: The plasma processing apparatus is provided with a plasma source 13 which generates plasma inside a chamber 11, a stage 16 which is provided inside the chamber 11 and places a carrier 5 thereon, a cover 31 which is arranged above the stage 16 to cover a holding sheet 6 and a frame 7 and has a window 33 which is formed to penetrate the cover 31 in the thickness direction, and a drive mechanism 38 which changes the position of the cover 31 relative to the stage 16 between a first position and a second position. The second position does not allow the cover 31 to make contact with the holding sheet 6, the frame 7 and a substrate 2. The cover 31 includes at least a ceiling surface 36b which extends in parallel to the upper face of the frame 7 and an inclined surface 36c which is inclined to gradually come close to the upper face of the holding sheet 6 exposed at the inner diameter side of the frame 7.Type: ApplicationFiled: April 23, 2014Publication date: November 13, 2014Applicant: Panasonic CorporationInventors: Nobuhiro NISHIZAKI, Atsushi HARIKAI, Tetsuhiro IWAI, Mitsuru HIROSHIMA
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Publication number: 20130295775Abstract: Disclosed is a plasma processing device that provides an object to be treated with plasma treatment. A wafer as an object to be treated, which is attached on the upper surface of adhesive sheet held by a holder frame, is mounted on a stage. In a vacuum chamber that covers the stage therein, plasma is generated, by which the wafer mounted on the stage undergoes plasma treatment. The plasma processing device contains a cover member made of dielectric material. During the plasma treatment on the wafer, the holder frame is covered with a cover member placed at a predetermined position above the stage, at the same time, the wafer is exposed from an opening formed in the center of the cover member.Type: ApplicationFiled: July 10, 2013Publication date: November 7, 2013Inventor: Tetsuhiro IWAI
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Patent number: 8513097Abstract: Disclosed is a plasma processing device that provides an object to be treated with plasma treatment. A wafer as an object to be treated, which is attached on the upper surface of adhesive sheet held by a holder frame, is mounted on a stage. In a vacuum chamber that covers the stage therein, plasma is generated, by which the wafer mounted on the stage undergoes plasma treatment. The plasma processing device contains a cover member made of dielectric material. During the plasma treatment on the wafer, the holder frame is covered with a cover member placed at a predetermined position above the stage, at the same time, the wafer is exposed from an opening formed in the center of the cover member.Type: GrantFiled: October 9, 2008Date of Patent: August 20, 2013Assignee: Panasonic CorporationInventor: Tetsuhiro Iwai
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Publication number: 20130180953Abstract: The present invention is to achieve a reduction both in size of a plasma processing apparatus and an installation area thereof. A dry etching apparatus includes a stock unit that includes a cassette storing a tray that can be conveyed and that stores substrates. In a conveying unit storing a conveying apparatus of the tray, a rotary stage is provided. Rotational angular position adjustment of the tray is performed by rotating the rotary stage placed on the tray before being subjected to dry etching and detecting a notch by a notch detecting sensor.Type: ApplicationFiled: March 26, 2012Publication date: July 18, 2013Inventor: Tetsuhiro Iwai
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Patent number: 7994026Abstract: A plasma dicing apparatus in which a semiconductor wafer with a protective sheet stuck thereonto covering the entire circuit-forming surface and with an etching-resistant mask member stuck on the back surface opposite to the circuit-forming surface is mounted on a mounting stage; plasma etching is performed using the mask member as a mask; and the semiconductor wafer is diced into plural semiconductor chips. The plasma dicing apparatus includes a ring-shaped frame member retaining the outer circumference of the mask member extending off the outer circumference of the semiconductor wafer. The mounting stage is composed of a wafer supporting part supporting a semiconductor wafer and a frame member supporting part supporting the frame member. This facilitates carrying a semiconductor wafer into and out of the vacuum chamber.Type: GrantFiled: November 12, 2008Date of Patent: August 9, 2011Assignee: Panasonic CorporationInventors: Atsushi Harikai, Kiyoshi Arita, Tetsuhiro Iwai
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Publication number: 20100216313Abstract: Disclosed is a plasma processing device that provides an object to be treated with plasma treatment. A wafer as an object to be treated, which is attached on the upper surface of adhesive sheet held by a holder frame, is mounted on a stage. In a vacuum chamber that covers the stage therein, plasma is generated, by which the wafer mounted on the stage undergoes plasma treatment. The plasma processing device contains a cover member made of dielectric material. During the plasma treatment on the wafer, the holder frame is covered with a cover member placed at a predetermined position above the stage, at the same time, the wafer is exposed from an opening formed in the center of the cover member.Type: ApplicationFiled: October 9, 2008Publication date: August 26, 2010Applicant: Panasonic CorproationInventor: Tetsuhiro Iwai
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Patent number: 7708860Abstract: For a plasma processing apparatus that performs an etching process for the face of a wafer opposite the circuit formation face, ceramic insulating films having a ring shape are positioned on the mounting face of an electrode member in consonance with the location of a large wafer or a small wafer. When a large wafer is employed, a ring member is attached. And when a small wafer is employed, a blocking member is mounted to hide a gap between the insulating films deposited on the mounting face 3b and to cover suction holes. Further, a cover member is attached to cover the blocking member from the top. With this arrangement, the plasma process can be performed, using the same electrode member, for wafers having different sizes.Type: GrantFiled: July 22, 2004Date of Patent: May 4, 2010Assignee: Panasonic CorporationInventors: Kiyoshi Arita, Tetsuhiro Iwai, Akira Nakagawa
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Publication number: 20100048001Abstract: A plasma dicing apparatus in which a semiconductor wafer with a protective sheet stuck thereonto covering the entire circuit-forming surface and with an etching-resistant mask member stuck on the back surface opposite to the circuit-forming surface is mounted on a mounting stage; plasma etching is performed using the mask member as a mask; and the semiconductor wafer is diced into plural semiconductor chips. The plasma dicing apparatus includes a ring-shaped frame member retaining the outer circumference of the mask member extending off the outer circumference of the semiconductor wafer. The mounting stage is composed of a wafer supporting part supporting a semiconductor wafer and a frame member supporting part supporting the frame member. This facilitates carrying a semiconductor wafer into and out of the vacuum chamber.Type: ApplicationFiled: November 12, 2008Publication date: February 25, 2010Inventors: Atsushi Harikai, Kiyoshi Arita, Tetsuhiro Iwai
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Publication number: 20090011120Abstract: In a plasma treating apparatus for carrying out a plasma treatment by setting a plate-shaped work to be an object, an electrode member 46 to abut on a lower surface of the work is constituted by soldering a plate-shaped suction member 45 having a plurality of through holes 45a formed thereon and a cooling plate 44, and a sprayed film 65 obtained by spraying alumina is formed on an upper surface of the suction member 45, and furthermore, an edge of a hole portion 45d in which the through holes 45a are formed is covered with the sprayed film 65. Consequently, it is possible to reduce a consumption of the electrode member due to sputtering to prolong a lifetime, thereby decreasing a component consuming cost and preventing an inner part of the apparatus from being contaminated by a scattered substance.Type: ApplicationFiled: September 7, 2006Publication date: January 8, 2009Applicant: Matsushita Electric Industrial Co., LtdInventor: Tetsuhiro Iwai
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Publication number: 20090008035Abstract: In a plasma processing apparatus for conducting plasma process on a semiconductor wafer 5, a lower electrode 3 provided with an electrode member 46 is disposed in a bottom part 40c of a chamber container 40 which is a main body of a vacuum chamber 2, and an upper electrode 4 provided with a projected face which is projected downward from its lower face inward of its outer edge portion 51a lower than a lower face of the outer edge portion is disposed above the lower electrode 3 so as to move up and down. The upper electrode 4 is moved downward toward the lower electrode 3 to bring the outer edge portion 51a into contact with an annular hermetically sealing face 40d which is formed at an intermediate level HL in a side wall part 40a of the chamber container 40, whereby a hermetically sealed process space 2a is formed between the lower electrode 3 and the upper electrode 4.Type: ApplicationFiled: September 7, 2006Publication date: January 8, 2009Applicant: Matsushita Electric Industrial Co., Ldt.Inventor: Tetsuhiro Iwai
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Publication number: 20070095477Abstract: For a plasma processing apparatus that performs an etching process for the face of a wafer opposite the circuit formation face, ceramic insulating films having a ring shape are positioned on the mounting face of an electrode member in consonance with the location of a large wafer or a small wafer. When a large wafer is employed, a ring member is attached. And when a small wafer is employed, a blocking member is mounted to hide a gap between the insulating films deposited on the mounting face 3b and to cover suction holes. Further, a cover member is attached to cover the blocking member from the top. With this arrangement, the plasma process can be performed, using the same electrode member, for wafers having different sizes.Type: ApplicationFiled: July 22, 2004Publication date: May 3, 2007Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoshi Arita, Tetsuhiro Iwai, Akira Nakagawa
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Patent number: 7138034Abstract: In a plasma treating apparatus, a ceramic porous substance having a three-dimensional network structure in which a frame portion formed of ceramic containing alumina is provided continuously like a three-dimensional network is used for the material of an electrode member for the plasma treating apparatus to be attached to the front surface of a gas supplying port of an electrode for plasma generation, and a gas for plasma generation is caused to pass through a hole portion formed irregularly in the three-dimensional network structure. Consequently, the distribution of the gas to be supplied is made uniform to prevent an abnormal discharge so that uniform etching having no variation can be carried out.Type: GrantFiled: June 21, 2002Date of Patent: November 21, 2006Assignees: Matsushita Electric Industrial Co., Ltd., Krosaki Harima CorporationInventors: Kiyoshi Arita, Tetsuhiro Iwai, Hiroshi Haji, Shoji Sakemi, Taiji Matano, Nobuhiro Satou
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Patent number: 7074720Abstract: In a plasma treating apparatus, a ceramic porous substance having a three-dimensional network structure in which a frame portion 18a formed of ceramic containing alumina is provided continuously like a three-dimensional network is used for the material of an electrode member 17 for the plasma treating apparatus to be attached to the front surface of a gas supplying port of an electrode for plasma generation, and a gas for plasma generation is caused to pass through a hole portion 18b formed irregularly in the three-dimensional network structure. Consequently, the distribution of the gas to be supplied is made uniform to prevent an abnormal discharge so that uniform etching having no variation can be carried out.Type: GrantFiled: June 21, 2002Date of Patent: July 11, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoshi Arita, Tetsuhiro Iwai, Hiroshi Haji, Shoji Sakemi
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Patent number: 7056831Abstract: In a plasma processing apparatus for plasma-processing a silicon wafer 6 to which a protective film 6a is stuck in a state that the silicon wafer 6 is held by a first electrode 3 by electrostatic absorption and is being cooled, the top surface 3g of the first electrode 3 consists of a top surface central area A that is inside a boundary line P2 that is distant inward by a prescribed length from the outer periphery P1 of the silicon wafer 6 and in which the conductor is exposed, and a ring-shaped top surface peripheral area B that surrounds the top surface central area A and in which the conductor is covered with an insulating coating 3f. This structure makes it possible to hold the silicon wafer 6 by sufficient electrostatic holding force by bringing the silicon wafer 6 into direct contact with the conductor and to increase the cooling efficiency by virtue of heat conduction from the silicon wafer 6 to the first electrode 3.Type: GrantFiled: July 17, 2003Date of Patent: June 6, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tetsuhiro Iwai, Kiyoshi Arita
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Publication number: 20050279459Abstract: In a plasma treating apparatus for carrying out a plasma treatment over a silicon wafer 6 having a protective tape 6a stuck to a circuit formation face, the silicon wafer 6 is mounted on a mounting surface 3d which is provided on an upper surface of a lower electrode 3 formed of a conductive metal with the protective tape 6a turned toward the mounting surface 3d. When a DC voltage is to be applied to the lower electrode 3 by a DC power portion 18 for electrostatic adsorption to adsorb and hold the silicon wafer 6 onto the lower electrode 3 in the plasma treatment, the protective tape 6a is utilized as a dielectric for the electrostatic adsorption. Consequently, the dielectric can be thinned as much as possible and the silicon wafer 6 can be held by a sufficient electrostatic holding force.Type: ApplicationFiled: June 8, 2005Publication date: December 22, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoshi Arita, Tetsuhiro Iwai, Junichi Terayama
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Publication number: 20050247404Abstract: In a plasma processing apparatus for plasma-processing a silicon wafer 6 to which a protective film 6a is stuck in a state that the silicon wafer 6 is held by a first electrode 3 by electrostatic absorption and is being cooled, the top surface 3g of the first electrode 3 consists of a top surface central area A that is inside a boundary line P2 that is distant inward by a prescribed length from the outer periphery P1 of the silicon wafer 6 and in which the conductor is exposed, and a ring-shaped top surface peripheral area B that surrounds the top surface central area A and in which the conductor is covered with an insulating coating 3f. This structure makes it possible to hold the silicon wafer 6 by sufficient electrostatic holding force by bringing the silicon wafer 6 into direct contact with the conductor and to increase the cooling efficiency by virtue of heat conduction from the silicon wafer 6 to the first electrode 3.Type: ApplicationFiled: June 8, 2005Publication date: November 10, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Tetsuhiro Iwai, Kiyoshi Arita
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Patent number: 6921720Abstract: In a plasma treating apparatus for carrying out a plasma treatment over a silicon wafer 6 having a protective tape 6a stuck to a circuit formation face, the silicon wafer 6 is mounted on a mounting surface 3d which is provided on an upper surface of a lower electrode 3 formed of a conductive metal with the protective tape 6a turned toward the mounting surface 3d. When a DC voltage is to be applied to the lower electrode 3 by a DC power portion 18 for electrostatic adsorption to adsorb and hold the silicon wafer 6 onto the lower electrode 3 in the plasma treatment, the protective tape 6a is utilized as a dielectric for the electrostatic adsorption. Consequently, the dielectric can be thinned as much as possible and the silicon wafer 6 can be held by a sufficient electrostatic holding force.Type: GrantFiled: August 26, 2002Date of Patent: July 26, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoshi Arita, Tetsuhiro Iwai, Junichi Terayama
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Patent number: 6867146Abstract: A method of plasma-processing a silicon-based substrate provides a mirror-like etched surface of the substrate. A silicon wafer having a protective tape affixed to a circuit-formed side of the wafer is mounted on a mounting unit disposed within a process chamber of a plasma processing apparatus while the protective tape contacts on the mounting unit. The surface of the silicon wafer is kept at a temperature of 40° C. or above when the surface of the substrate is etched by plasma generated by plasma discharge in plasma-generating gas including fluorine-containing gas fed into the process chamber. This suppressing adhesion and accumulation of a reaction product of the fluorine-containing gas with respect to the surface to be etched, and consequently, provides the surface with uniform etching.Type: GrantFiled: March 1, 2002Date of Patent: March 15, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoshi Arita, Tetsuhiro Iwai
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Patent number: 6784112Abstract: A surface treatment method for thinning a silicon based substrate obtains a milky-dull color on an overall surface uniformly of the silicon based substrate. To be more specific, a surface opposite to a circuit-formed surface is mechanically polished, then the surface is etched using inert gas such as argon gas for producing plasma. This etching forms micro dimples uniformly on the surface. Next, the surface is further etched using fluorine based gas for producing plasma. This etching obtains a milky-dull color uniformly on the surface. As a result, printed marks on the surface can be read with ease, and pick-up errors in die-bonding can be reduced.Type: GrantFiled: April 3, 2002Date of Patent: August 31, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoshi Arita, Tetsuhiro Iwai, Hiroshi Haji, Shoji Sakemi
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Patent number: 6723651Abstract: A method of plasma processing a silicon-containing object to be processed at a high etching rate without causing a surface of the object to have a hazy appearance, so that this surface can have an excellent visual quality. In the plasma processing method of etching the surface of the semiconductor wafer, gas containing sulfur hexafluoride and helium is used as a plasma-generating gas. A fluorine radical as an active substance which reacts with silicon of the surface of the semiconductor wafer, gaseous silicon tetrafluoride yielded by the reaction and a compound (SFn) of fluorine and sulfur that is generated as a reaction product are removed by the helium gas functioning as carrier gas. The helium gas prevents the reaction product from adhering to the surface of the wafer again.Type: GrantFiled: January 7, 2002Date of Patent: April 20, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoshi Arita, Tetsuhiro Iwai, Shoji Sakemi