Patents by Inventor Tetsuo Kawano

Tetsuo Kawano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050081171
    Abstract: OCV coefficients in a path being an analysis target according to the number of gate stages are calculated in a coefficient arithmetically operating unit by canceling off a variation in delay in each gate in accordance with the number of gate stages in the target path, and timing analysis of the target path is performed in a timing analysis unit by using the OCV coefficient with the number of gate stages being considered, whereby a variation degree in the entire path is reduced in accordance with the number of gate stages in the target path, thus making it possible to carry out accurate timing analysis in consideration of the variation in a chip of a semiconductor integrated circuit.
    Type: Application
    Filed: March 24, 2004
    Publication date: April 14, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuo Kawano, Satoru Yoshikawa, Toshikatsu Hosono, Shigenori Ichinose, Takashi Yoneda
  • Publication number: 20040252301
    Abstract: Provided are target detection substrate for target detecting apparatuses capable of detecting various targets such as pathogens, biological substances and toxic substances without using a costly measuring apparatus; which can detect these targets with a low measurement error, high efficiency, simplicity, speed and sensitivity; and which can make a quantitative detection thereof. The target detection substrate includes at least a target interaction part which can interact with a target on an optical interference substrate, which optical interference substrate includes a substrate and a different refractive index film having a different refractive index from that of the substrate disposed on the substrate, and interferes irradiated light to radiate it as interference light where the total number of peak tops and peak bottoms in a graph of transmittance against wavelength of the interference light is from 1 to 20 in an arbitrary wavelength range of 100 nm.
    Type: Application
    Filed: June 3, 2004
    Publication date: December 16, 2004
    Applicant: FUJI PHOTO FILM CO., LTD.
    Inventors: Tetsuo Kawano, Tomohiro Kodama, Shintaro Washizu, Takatoshi Kinoshita
  • Publication number: 20040198598
    Abstract: A porous ceramic material has mesopores with a diameter of 2 nm to 50 nm on its surface and is fibrous for the purpose of providing a porous ceramic material which has a very large specific surface area, is fibrous, is flexible and is very useful as catalysts, catalyst carriers, photocatalysts, sensors and oxide conductors. The porous ceramic material can be prepared by immersing the fibrous matrix in an aqueous solution containing a metal source, a surfactant and urea and heating the resulting mixture to thereby deposit a metallic compound on the outer surface of a fibrous matrix; and eliminating the fibrous matrix.
    Type: Application
    Filed: March 17, 2004
    Publication date: October 7, 2004
    Applicant: FUJI PHOTO FILM CO., LTD.
    Inventors: Tetsuo Kawano, Hiroaki Imai
  • Publication number: 20030177454
    Abstract: A method for designing semiconductor integrated circuits that efficiently optimizes clock skews in a plurality of clock modes in the case of designing semiconductor integrated circuits having a plurality of clock modes. A plurality of clock paths in each of a plurality of clock modes are detected from layout data for a semiconductor integrated circuit. Delay time in all elements on each of the plurality of clock paths detected is collected. A delay adjustment position is set on each of the plurality of clock paths detected. An optimum delay value at the delay adjustment position on each of the plurality of clock paths is calculated by considering delay time at the set delay adjustment position as a nonnegative variable, by formulating a linear expression for each of the plurality of clock paths by use of this variable and the collected delay time in all of the elements, and by working out the linear expression.
    Type: Application
    Filed: February 21, 2003
    Publication date: September 18, 2003
    Applicant: Fujitsu Limited
    Inventor: Tetsuo Kawano
  • Patent number: 6599095
    Abstract: A pump off control method comprises detecting the speed of the induction motor and an instantaneous value of secondary current of the induction motor. Down stroke time in every cycle of the pump jack is detected. An average value of instantaneous values of the secondary current of the induction motor in the down stroke time in said every cycle is calculated. An average value reference of the secondary current of the induction motor to be compared with calculated average value of the instantaneous values of the secondary current of the induction motor is set. The calculated average value of the instantaneous values of the secondary current is compared with the average value reference after the down stroke end in each cycle. An occurence of pump off is detected if the calculated average value of the instantaneous values is greater than the average value reference.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: July 29, 2003
    Assignee: Kabushiki Kaisha Yaskawa Denki
    Inventors: Noriyuki Takada, Takayuki Yamakawa, Hidetoshi Ryu, Tetsuo Kawano, Koji Kawamoto, Toshio Miyano, Richard L. Pratt, Brian Mackinnon
  • Publication number: 20020196392
    Abstract: The present invention provides a color filter provided on a transparent support, wherein a dot-shaped pattern, having a large number of non-colored regions which do not constitute colored pixels, is provided in at least a part of an area within a single pixel in the direction of layer thickness or layer lamination, among pixels which are patterned with plural colors.
    Type: Application
    Filed: May 16, 2002
    Publication date: December 26, 2002
    Applicant: FUJI PHOTO FILM CO., LTD.
    Inventors: Tetsuo Kawano, Morimasa Sato, Yoshio Sakakibara
  • Patent number: 5938052
    Abstract: An object of this invention is to provide a high performance and low cost crane rope steadying control method and apparatus for which mechanical or optical swing angle detecting means are not necessary.The invention provides a rope steadying control method for a crane or the like having a trolley driving apparatus for causing a load suspended by a rope of a crane or the like to travel, wherein swinging of a load suspended by a rope is stopped by calculating a swing load signal I.sub.2W * proportional to the rope swing angle and the load by computationally estimating a motor torque estimate signal .tau..sub.M * not including load torque fluctuations caused by swinging of the rope on the basis of gain coefficients and equivalent time constants of the control system and the drive system, and comparing this estimate signal .tau..sub.M * with an actual load torque .tau..sub.M and negatively feeding back to a trolley speed command N.sub.S of the trolley driving apparatus (1) a speed signal N.sub.
    Type: Grant
    Filed: May 15, 1997
    Date of Patent: August 17, 1999
    Assignee: Kabushiki Kaisha Yaskawa Denki
    Inventors: Toshio Miyano, Takayuki Yamakawa, Tetsuo Kawano, Richard L. Pratt, Frederick C. Lach
  • Patent number: 4692783
    Abstract: A gate array is disclosed having a plurality of basic cells each comprising a transistor whose gm is as low as one fifth to one twentieth that of the transistors in a conventional gate array. The low gm is provided by reducing the W/L ratio of the gate region of the transistor. The basic cell having the transistor of the low gm is formed to replace the conventional basic cell at a specified position in a specified basic cell array. The transistor of low gm reduces the number of basic cells necessary for forming a delay circuit, and elminates the need for an external resistance component which was formerly required when a pull-up or pull-down circuit or a monostable multivibrator was formed in the gate array.
    Type: Grant
    Filed: October 23, 1986
    Date of Patent: September 8, 1987
    Assignee: Fujitsu Limited
    Inventors: Hideo Monma, Masato Ishiguro, Tetsuo Kawano