Patents by Inventor Tetsuo Takahashi

Tetsuo Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12199092
    Abstract: A semiconductor apparatus includes a semiconductor substrate and a second electrode. Semiconductor substrate includes a device region and a peripheral region. An n? drift region and second electrode extend from device region to peripheral region. An n buffer layer and a p collector layer are provided also in peripheral region. Peripheral region is provided with an n type region. N type region is in contact with second electrode and n buffer layer. The turn-off loss of the semiconductor apparatus is reduced.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: January 14, 2025
    Assignee: Mitsubishi Electric Corporation
    Inventor: Tetsuo Takahashi
  • Publication number: 20240334752
    Abstract: An apparatus including sub-pixels arranged on a substrate, the sub-pixels including a first, a second, and a third sub-pixels, each of the sub-pixels including a lower electrode, an insulating layer covering an end portion of the lower electrode, an organic layer, and an upper electrode in mentioned order starting from a side closer to the substrate, at least part of the organic layer being continuously arranged in at least two of regions between a position on a first lower electrode included in the first sub-pixel and a position on a second lower electrode included in the second sub-pixel, between the position on the second lower electrode and a position on a third lower electrode included in the third sub-pixel, and between the position on the third lower electrode and the position on the first lower electrode.
    Type: Application
    Filed: June 11, 2024
    Publication date: October 3, 2024
    Inventors: Tetsuo Takahashi, Kentaro Suzuki, Takayuki Ito, Hiroaki Sano, Yojiro Matsuda
  • Publication number: 20240297229
    Abstract: In a silicon carbide semiconductor device, in a plan view, a plurality of source contact holes is intermittently provided in a second direction along a trench gate, and a source electrode is provided on an insulating film and is electrically connected to a source layer via the plurality of source contact holes. Intermittent recesses reflecting the shapes of the plurality of source contact holes are provided on a surface of the source electrode on a side opposite to the semiconductor substrate.
    Type: Application
    Filed: December 1, 2023
    Publication date: September 5, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Motoru YOSHIDA, Katsutoshi SUGAWARA, Yoshitaka KIMURA, Yutaka FUKUI, Tetsuo TAKAHASHI
  • Patent number: 12075657
    Abstract: An apparatus including sub-pixels arranged on a substrate, the sub-pixels including a first, a second, and a third sub-pixels, each of the sub-pixels including a lower electrode, an insulating layer covering an end portion of the lower electrode, an organic layer, and an upper electrode in mentioned order starting from a side closer to the substrate, at least part of the organic layer being continuously arranged in at least two of regions between a position on a first lower electrode included in the first sub-pixel and a position on a second lower electrode included in the second sub-pixel, between the position on the second lower electrode and a position on a third lower electrode included in the third sub-pixel, and between the position on the third lower electrode and the position on the first lower electrode.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: August 27, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tetsuo Takahashi, Kentaro Suzuki, Takayuki Ito, Hiroaki Sano, Yojiro Matsuda
  • Publication number: 20240234570
    Abstract: A semiconductor device includes a trench formed in a semiconductor layer of an active region, a gate insulating film and a gate electrode formed in the trench, a gate pad formed on a field insulating film, and a gate lead-out wiring line connecting the gate pad and the gate electrode. A shoulder portion, a sidewall portion, and a bottom portion of the trench are covered with the field insulating film in a gate pull-up portion which is an end portion of the trench corresponding to a place where the gate lead-out wiring line and the gate electrode in the trench are connected. The thickness of the field insulating film covering the shoulder portion, the sidewall portion, and the bottom portion of the trench in the gate pull-up portion is equivalent to or larger than the thickness of the field insulating film under the gate pad.
    Type: Application
    Filed: November 15, 2023
    Publication date: July 11, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventor: Tetsuo TAKAHASHI
  • Publication number: 20240215303
    Abstract: A light emitting device includes a substrate, a lens, and a light emitting portion arranged between a main surface of the substrate and the lens. The lens functions as a collimator. The light emitting portion includes a first reflective layer, an organic layer, and a second reflective layer from a side of the substrate in this order. The first reflective layer includes one of a convex portion and a concave portion.
    Type: Application
    Filed: December 6, 2023
    Publication date: June 27, 2024
    Inventors: SHOMA HINATA, TETSUO TAKAHASHI, YOJIRO MATSUDA
  • Publication number: 20240155907
    Abstract: Display device includes light-emitting element array of light-emitting elements and color filter layer including first bandpass filters configured to transmit light in first band, second bandpass filters configured to transmit light in second band, and third bandpass filters configured to transmit light in third band The color filter layer has an arrangement including at least first column in which the first bandpass filters are arranged, second column in which the second bandpass filters and the third bandpass filters are alternately arranged, and third column in which the second bandpass filters and the third bandpass filters are alternately arranged in the order different from the second column, and at least one first bandpass filter is in contact with at least one second bandpass filter and at least one third bandpass filter.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 9, 2024
    Inventors: SHOMA HINATA, KOJI ISHIZUYA, TETSUO TAKAHASHI, YOJIRO MATSUDA, AKIRA OKITA
  • Publication number: 20240065078
    Abstract: The present disclosure provides a light-emitting apparatus including an insulating layer, a light-emitting element disposed on a main surface of the insulating layer, the light-emitting element containing a light-emitting material and having a resonator structure, and a lens disposed above the light-emitting element, a photoluminescence (PL) spectrum of the light-emitting material having a first peak with a wavelength ?PL in a visible light range, wherein the resonator structure satisfies Exp. (1), |?EL??PL|<|?on??PL|??(1) where ?on is a resonance peak wavelength of an interference spectrum that reinforces light emitted in a direction perpendicular to the main surface and ?EL is a peak wavelength of electroluminescence radiated via the light extracting structure.
    Type: Application
    Filed: October 13, 2023
    Publication date: February 22, 2024
    Inventors: NORIFUMI KAJIMOTO, KOJI ISHIZUYA, TAKAYUKI ITO, HIROAKI SANO, TETSUO TAKAHASHI, YOJIRO MATSUDA
  • Publication number: 20240057455
    Abstract: A light emitting apparatus according to the present disclosure includes an organic light emitting element (100) including a reflection surface (S2), a first electrode (2), an organic layer (3) including a light emitting layer (31), a second electrode (4), and a light extraction structure (10). The light emitting layer (31) contains a first light emitting material. A wavelength included in a peak wavelength range of a PL spectrum of the first light emitting material is assumed as a first wavelength ?1. An optical distance (Lb) between the light emitting layer (31) and the reflection surface (S2) is a value with which rays of light with the first wavelength (?1), traveling in a first direction (D1) and a second direction (D2) that intersect with a normal direction of a principal surface (S1) of the substrate (1), both are intensified.
    Type: Application
    Filed: October 10, 2023
    Publication date: February 15, 2024
    Inventors: KOJI ISHIZUYA, NORIFUMI KAJIMOTO, YOJIRO MATSUDA, HIROAKI SANO, TAKAYUKI ITO, TETSUO TAKAHASHI
  • Patent number: 11901444
    Abstract: Examples of a semiconductor device includes a transistor region formed in a semiconductor substrate having a first conductivity type drift layer, and a diode region formed to be adjacent to the transistor region in the semiconductor substrate, wherein the diode region has a second conductivity type anode layer formed on the drift layer and a first conductivity type cathode layer formed on the lower side of the drift layer, and the cathode layer has an adjacent region contacting the transistor region, the adjacent region having a depth, from a lower surface of the semiconductor substrate, which becomes shallower toward the transistor region and having first conductivity type impurity concentration which decreases toward the transistor region.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: February 13, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ryu Kamibaba, Tetsuo Takahashi, Akihiko Furukawa
  • Patent number: 11869962
    Abstract: Examples of a semiconductor device includes a transistor region formed in a semiconductor substrate having a first conductivity type drift layer, and a diode region formed to be adjacent to the transistor region in the semiconductor substrate, wherein the diode region has a second conductivity type anode layer formed on the drift layer and a first conductivity type cathode layer formed on the lower side of the drift layer, and the cathode layer has an adjacent region contacting the transistor region, the adjacent region having a depth, from a lower surface of the semiconductor substrate, which becomes shallower toward the transistor region and having first conductivity type impurity concentration which decreases toward the transistor region.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: January 9, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ryu Kamibaba, Tetsuo Takahashi, Akihiko Furukawa
  • Patent number: 11839131
    Abstract: A semiconductor device comprises an electrode on a substrate, an insulating layer covering an edge of the electrode and disposed on the substrate, and an organic layer comprising a charge transport layer on the electrode and insulating layer and a functional layer, wherein the insulating layer has a first portion forming an angle of 0° to 50° with respect to a surface parallel to a lower surface of the electrode, a second portion located closer to the substrate than the first portion and sloping at more than 50°, and a third portion located closer to the organic layer than the first portion and sloping at more than 50°, wherein a length of the third portion in a direction perpendicular to the parallel surface is larger than a thickness of the charge transport layer at a position in contact with the electrode.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: December 5, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tetsuo Takahashi, Hiroaki Sano, Daisuke Okabayashi
  • Patent number: 11830872
    Abstract: A semiconductor device according to the present disclosure is an RC-IGBT in which an IGBT region 10 and a diode region 20 are provided adjacent to each other. The diode region 20 includes a p-type anode layer 25 provided on a first principal surface side of an n?-type drift layer 1, a p-type contact layer 24 provided on the first principal surface side of the p-type anode layer 25 and at a surface layer of a semiconductor substrate on the first principal surface side and connected with an emitter electrode 6, and an n+-type cathode layer 26 provided at a surface layer of the semiconductor substrate on a second principal surface side. The p-type contact layer 24 contains aluminum as p-type impurities, and the thickness of the p-type contact layer 24 is smaller than the thickness of an n+-type source layer 13 provided in the IGBT region 10.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: November 28, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuki Kudo, Hidenori Fujii, Tetsuo Takahashi
  • Patent number: 11765927
    Abstract: There is provided a semiconductor device having a semiconductor element and a protective film that is disposed above the semiconductor element and contains silicon atoms and nitrogen atoms, wherein the protective film has an average number of nitrogen atoms bonded to one silicon atom of less than or equal to 1.35.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: September 19, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuo Takahashi, Koichi Ishige, Ryuji Ishii
  • Publication number: 20230292546
    Abstract: A light-emitting element includes a first electrode, a second electrode, and a light-emitting layer between the first electrode and the second electrode. The light-emitting element includes a transmittance-increasing layer with increasing transmittance in an optical path of light emitted from the light-emitting layer.
    Type: Application
    Filed: March 3, 2023
    Publication date: September 14, 2023
    Inventors: TETSUO TAKAHASHI, TAKAYUKI ITO, YOJIRO MATSUDA, YOSHIHISA KAWAMURA, YUTO NOZAKI, SATOSHI YOKOYAMA
  • Patent number: 11758744
    Abstract: An organic device comprising first and second conductive line, an insulator arranged above the first and second conductive lines, a first electrode arranged above the insulator, an organic layer arranged above the first electrode, a second electrode arranged above the organic layer, a first via including a first conductor connecting the first conductive line and the first electrode, and a second via including a second conductor connecting the second conductive line and the second electrode, is provided. An upper portion of the first via is filled with the first conductor. An upper portion of the second via includes a region which is not filled with the second conductor and covered by the second conductor. An inner wall of the second conductor along the second via includes a region without the organic layer in contact with the second electrode.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: September 12, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuo Takahashi, Norifumi Kajimoto
  • Patent number: 11724862
    Abstract: A cap configured to be detachably attached to a mouth portion of a container body having a containment space for contents and close the mouth portion, includes: a transparent or semitransparent topped tubular outer lid portion; and a topped tubular inner lid portion located in close contact with an inner side of the outer lid portion so as to be relatively non-rotatable. A retaining protrusion having an inclined surface that is inclined inward in a downward direction and extends to a lower end of the outer lid portion is provided on an inner peripheral surface of the outer lid portion. The retaining protrusion engages with a retaining depression provided on an outer peripheral surface of the inner lid portion, to suppress separation between the outer lid portion and the inner lid portion.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: August 15, 2023
    Assignee: YOSHINO KOGYOSHO CO., LTD.
    Inventors: Kazumi Azuma, Tetsuo Takahashi
  • Patent number: 11715789
    Abstract: A transistor and a diode are formed on a common semiconductor substrate; the semiconductor substrate has a transistor region and an outer peripheral region surrounding it; the transistor region is divided into a plurality of channel regions and a plurality of non-channel regions by a plurality of gate electrodes each having a stripe shape; each of the plurality of non-channel regions has a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fifth semiconductor layer, a first electrode, and a second electrode; the third semiconductor layer and the fifth semiconductor layer are electrically connected to the second electrode via a contact hole; and the fifth semiconductor layer is selectively provided not to be in contact with an impurity layer of a first conductivity type that is provided in the outer peripheral region and defines a boundary with a cell region.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: August 1, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tetsuo Takahashi, Hidenori Fujii, Shigeto Honda
  • Publication number: 20230217791
    Abstract: A light emitting apparatus including a substrate including a principal surface, a first light emitting element disposed on the principal surface, a second light emitting element disposed on the principal surface, a first lens and a second lens wherein a distance between a middle point of an emission area of the second light emitting element and an apex of the second lens is larger than a distance between a middle point of an emission area of the first light emitting element and an apex of the first lens, wherein the emission area of the second light emitting element is larger than the emission area of the first light emitting element, and wherein the lower electrode of the second light emitting element is larger than the lower electrode of the first light emitting element.
    Type: Application
    Filed: March 10, 2023
    Publication date: July 6, 2023
    Inventors: NORIFUMI KAJIMOTO, HIROAKI SANO, YOJIRO MATSUDA, TETSUO TAKAHASHI
  • Patent number: 11687117
    Abstract: A semiconductor apparatus include a first electrode, an insulating layer covering an end of the first electrode, a functional layer arranged on the first electrode and the insulating layer, and a second electrode arranged above the functional layer, wherein, in a cross-section passing through the insulating layer, and the first electrode, the insulating layer includes a first portion having a side surface inclining at an angle of 45° or more and 90° or less, a second portion having a side surface inclining at an angle smaller than 45°, and a third portion below the first portion, and having a side surface inclining at an angle smaller than 45°, and wherein a length of the second portion in a direction vertical to the first electrode is larger than that of the third portion.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: June 27, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Daisuke Okabayashi, Tetsuo Takahashi, Takashi Usui