Patents by Inventor Tetsuro Itakura

Tetsuro Itakura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190068216
    Abstract: An analog-to-digital converter has a switched capacitor comprising a capacitor to perform charging and discharging by switching a switch, the switched capacitor varying a charge amount of the capacitor in accordance with a frequency of an oscillation signal in accordance with a differential signal between an input signal and a feedback signal, capacitance of the capacitor, and a predetermined bias voltage, a feedback signal generator to generate the feedback signal based on an output signal of the switched capacitor, and a digital converter to generate a digital signal by digital conversion of the input signal based on the oscillation signal.
    Type: Application
    Filed: March 14, 2018
    Publication date: February 28, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akihide SAI, Satoshi KONDO, Kentaro YOSHIOKA, Tetsuro ITAKURA
  • Patent number: 10218364
    Abstract: A time to digital converter has a counter to measure the number of cycles of a first signal, a first phase difference detector to generate a phase difference signal having a pulse width corresponding to a phase difference, a first capacitor to be charged with an electric charge, a second capacitor including capacitance N times the capacitance of the first capacitor, the N being a real number larger than 1, a comparator to compare a charge voltage of the first capacitor and a charge voltage of the second capacitor, a first charge controller to continue to charge the second capacitor until the comparator detects that the charge voltage of the second capacitor has reached the charge voltage of the first capacitor or more, and a first phase difference arithmetic unit to operate the phase difference between the first signal and the second signal.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: February 26, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akihide Sai, Masanori Furuta, Tetsuro Itakura, Satoshi Kondo, Hidenori Okuni, Tuan Thanh Ta
  • Patent number: 10211730
    Abstract: A DC-DC converter includes an input terminal, multiple output terminals, an inductor, a first switch, a first condenser, a second switch and a switch controller. One end of the inductor is connected to the input terminal. The first switch is subjected to on-off control to change a current flowing through the inductor. The first condenser has one end connected between the inductor and a first output terminal, which is one of the multiple output terminals, and has the other end connected to a ground. The second switch is connected between the inductor and the first condenser. The switch controller controls the second switch to turn on when the first switch is turned off while a first output voltage from the first output terminal is smaller than a predetermined first threshold value.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: February 19, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Toyama, Taichi Ogawa, Takeshi Ueno, Tetsuro Itakura, Osamu Watanabe, Takayuki Miyazaki
  • Patent number: 10177796
    Abstract: A receiver has a receiving unit to receive a radio signal, a signal detector to detect a reception signal in each of a plurality of set periods shifted in time to be overlapped in a partial period, and a demodulating unit to perform demodulation processing based on the reception signal. The signal detector has a smoothing unit to smooth the output signal of the receiving unit in each of the plurality of set periods, a comparing unit to output a signal obtained by comparing a level of the smoothed signal, with a threshold value, and an initializing unit to initialize the signal smoothed by the smoothing processing unit, every time the comparing unit compares the smoothed signal with the threshold value, and the demodulating unit performs the demodulation processing based on the smoothed signal determined to be the threshold value or more by the comparing unit.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: January 8, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Junya Matsuno, Hidenori Okuni, Masanori Furuta, Tetsuro Itakura
  • Patent number: 10171067
    Abstract: A waveform shaping filter according to an embodiment includes at least one filter stage and a control circuit. The filter stage includes a differentiation signal generation circuit, a proportional signal generation circuit, and an adder circuit. The differentiation signal generation circuit generates a differentiation signal obtained by amplifying a differentiation component of an input signal. The proportional signal generation circuit generates a proportional signal obtained by amplifying the input signal. The adder circuit outputs an output signal obtained by adding the proportional signal and the differentiation signal. The control circuit compares the output signal and a first detection level, detects at least one of an overshoot and an undershoot of the output signal, and controls a time constant of the filter stage, based on a detection result.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: January 1, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tetsuro Itakura, Masanori Furuta, Shunsuke Kimura, Hideyuki Funaki, Go Kawata, Hirokatsu Shirahama
  • Patent number: 10148276
    Abstract: A DA converter has a first DA conversion unit that converts a first bit string signal corresponding to a MSB side string of a digital input signal into a first analog value, a second DA conversion unit that converts a second bit string signal corresponding to an LSB side string of the digital input signal into a second analog value, a third DA conversion unit that has identical circuitry configuration and identical circuitry area as the second DA conversion unit and converts a first digital signal into a third analog value, an analog calculator that calculates a value obtained by subtracting the third analog value from a value obtained by adding the second analog value to the first analog value, a quantizer that outputs a second digital signal obtained by quantizing an output value of the analog calculator, and a control logic unit that generates the first digital signal.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: December 4, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Kondo, Akihide Sai, Tetsuro Itakura
  • Patent number: 10128881
    Abstract: A time to digital converter has a counter, a first phase difference detector, a first capacitor, a second capacitor having capacitance N times a capacitance of the first capacitor, a comparator to compare a charge voltage of the first capacitor with a charge voltage of the second capacitor, a first charge controller, a first phase difference arithmetic unit, a second phase difference detector, a second charge controller, a second phase difference arithmetic unit to operate the phase difference between the first signal and the second signal, and a third phase difference arithmetic unit to detect a fractional phase difference between the first signal and the second signal. The first phase difference arithmetic unit operates the phase difference between the first signal and the second signal, based on a reference phase, when the counter suspends a measurement operation.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: November 13, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Kondo, Akihide Sai, Tuan Thanh Ta, Hidenori Okuni, Masanori Furuta, Tetsuro Itakura
  • Patent number: 10056837
    Abstract: According to one embodiment, a DC-DC converter, includes: an inductor configured to be supplied with an input voltage; a plurality of rectifiers connected in parallel to the inductor; a plurality of p-MOS transistors connected in series to the respective rectifiers; a switch configured to connect an output side of the inductor to a reference potential; and a control circuit configured to control the p-MOS transistors and the switch. The control circuit performs control to supply a voltage to turn on a first p-MOS transistor selected from among the p-MOS transistors to a gate terminal of the first p-MOS transistor, and to supply a voltage depending on an output voltage of the first p-MOS transistor to a gate terminal of a second p-MOS transistor other than the first p-MOS transistor among the p-MOS transistors.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: August 21, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Toyama, Taichi Ogawa, Takeshi Ueno, Tetsuro Itakura, Osamu Watanabe, Takayuki Miyazaki
  • Patent number: 10041830
    Abstract: A radiation detection apparatus according to an embodiment includes a radiation detector that detects radiation; a first measurer that measures energy of the radiation from the radiation detected by the radiation detector; and a second measurer that measures the number of times that the radiation detector detects the radiation.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: August 7, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke Kimura, Go Kawata, Hideyuki Funaki, Masanori Furuta, Hirokatsu Shirahama, Tetsuro Itakura
  • Publication number: 20180164100
    Abstract: According to one embodiment, a vibration device is disclosed. The device includes a mass unit including a mass unit, a catch and release mechanism to catch and release the mass unit and including an electrode unit, and a control unit to control catching and releasing of the mass unit by a voltage to be applied between the mass unit and the electrode unit. The control unit controls the voltage such that a voltage greater than a steady voltage is to be applied between the mass and electrode units before the steady voltage is applied between the mass and electrode units. The voltage greater than the steady voltage is to be applied in at least part of a period during which the mass unit is vibrating after the mass unit is released from the catch and release mechanism.
    Type: Application
    Filed: September 14, 2017
    Publication date: June 14, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yohei HATAKEYAMA, Tetsuro ITAKURA
  • Patent number: 9997998
    Abstract: An electronic circuit according to one embodiment of the present invention includes a first logic circuit, a second logic circuit, first and second capacitors, and a connection circuit. The first logic circuit has a first output terminal from which a first output signal based on a first input signal is output. The second logic circuit outputs a second output signal obtained by inversion of the first output signal is output in a steady state. The first and second capacitors each have one terminal at a first voltage. The connection circuit connects one of the first output terminal and the second output terminal to the first capacitor, and the other to the second capacitor. The connection circuit interchanges connection destinations of the first capacitor and the second capacitor in accordance with a received first connection control signal.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: June 12, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taichi Ogawa, Takeshi Ueno, Tetsuro Itakura, Osamu Watanabe, Takayuki Miyazaki, Yosuke Toyama
  • Publication number: 20180143020
    Abstract: A detection device detects a dynamic quantity exerted on a detection mechanical system including first and second mechanical oscillators. The detection device includes first to third transducers, a multiplication unit, a low-pass filter, and an inverting amplification unit. The first transducer detects position of the first mechanical oscillator in a first direction to output a first signal. The second transducer detects position of the second mechanical oscillator in a second direction to output a second signal. The multiplication unit multiplies the signal that the second transducer detects from the second mechanical oscillator by the first signal before the signal is amplified. The third transducer detects position of the second mechanical oscillator in the second direction to output a third signal. The inverting amplification unit gives a control signal generated by inverting and simplifying the third signal to a second actuator that moves the second mechanical oscillator in the second direction.
    Type: Application
    Filed: August 30, 2017
    Publication date: May 24, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yohei Hatakeyama, Tetsuro Itakura
  • Patent number: 9952334
    Abstract: A pulse detection circuit according to an embodiment includes a conversion circuit, a delay circuit, first and second comparators, a latch, and a generation circuit. The conversion circuit converts an input signal into a thermometer code signal. The delay circuit outputs a delay signal being the thermometer code signal delayed by a predetermined delay time. The first comparator (The second comparator) compares the thermometer code signal with the delay signal and outputs an increase signal (a decrease signal) indicating whether the input signal is larger (smaller) than the input signal before the delay time. Based on the increase signal and the decrease signal, the latch outputs an increase-decrease signal indicating whether the input signal is increasing or decreasing. Based on the thermometer code signal and the increase-decrease signal, the generation circuit generates a pulse detection signal and a pileup detection signal.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: April 24, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hirokatsu Shirahama, Tetsuro Itakura, Masanori Furuta, Shunsuke Kimura, Go Kawata, Hideyuki Funaki
  • Patent number: 9945962
    Abstract: According to an embodiment, a signal processor includes an integrator, a differentiator, a zero cross detector, a pile-up detector, an event interval detector, a counter, and a creator. The integrator is configured to calculate charge of current from a photoelectric converter for an incident radiation. The differentiator is configured to calculate a differential value of the current. The zero cross detector is configured to detect a zero cross of the differential value. The pile-up detector is configured to detect pile-up of the current based on the zero cross. The event interval detector is configured to detect, based on the zero cross and pile-up, an event interval of the radiation entering. The counter is configured to count, based on the charge and pile-up, the respective numbers of events according to the charge and the event interval. The creator is configured to create histograms for the numbers of events.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: April 17, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Funaki, Shunsuke Kimura, Go Kawata, Tetsuro Itakura, Masanori Furuta
  • Patent number: 9917516
    Abstract: A DC-DC converter including an input, an output, a conversion circuit, and a switch control circuit. The input inputs input voltage. The output outputs output voltage. The conversion circuit a plurality of semiconductor switches, and converts the input voltage to the output voltage by switching operation of one or more semiconductor switches of the plurality of semiconductor switches. The switch control circuit selects one or more semiconductor switches performing the switching operation from the plurality of semiconductor switches based on the input voltage and a predetermined lookup table, and controls the switching operation of the one or more semiconductor switches.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: March 13, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taichi Ogawa, Takeshi Ueno, Tetsuro Itakura, Osamu Watanabe, Takayuki Miyazaki
  • Publication number: 20180069577
    Abstract: A receiver has a receiving unit to receive a radio signal, a signal detector to detect a reception signal in each of a plurality of set periods shifted in time to be overlapped in a partial period, and a demodulating unit to perform demodulation processing based on the reception signal. The signal detector has a smoothing unit to smooth the output signal of the receiving unit in each of the plurality of set periods, a comparing unit to output a signal obtained by comparing a level of the smoothed signal, with a threshold value, and an initializing unit to initialize the signal smoothed by the smoothing processing unit, every time the comparing unit compares the smoothed signal with the threshold value, and the demodulating unit performs the demodulation processing based on the smoothed signal determined to be the threshold value or more by the comparing unit.
    Type: Application
    Filed: February 27, 2017
    Publication date: March 8, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Junya MATSUNO, Hidenori OKUNI, Masanori FURUTA, Tetsuro ITAKURA
  • Patent number: 9912235
    Abstract: A boost converter includes an input, an output, a startup circuit, a first switch, a comparator circuit, a switching circuit, a control circuit, a converter circuit, and a switch control circuit. The startup circuit boosts an input voltage up to a first output voltage. The comparator circuit outputs a first signal corresponding to the difference between the output voltage and a first reference voltage. The switching circuit outputs a second voltage based on the first signal. The control circuit outputs a second signal corresponding to the difference between the output voltage and a second reference voltage. The converter circuit boosts the input voltage based on the second signal, and outputs the output voltage. The switch control circuit generates a third signal based on the second signal, and outputs the third signal to the first switch.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: March 6, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taichi Ogawa, Takeshi Ueno, Tetsuro Itakura, Osamu Watanabe, Takayuki Miyazaki
  • Publication number: 20180054115
    Abstract: An electronic circuit according to one embodiment of the present invention includes a first logic circuit, a second logic circuit, first and second capacitors, and a connection circuit. The first logic circuit has a first output terminal from which a first output signal based on a first input signal is output. The second logic circuit outputs a second output signal obtained by inversion of the first output signal is output in a steady state. The first and second capacitors each have one terminal at a first voltage. The connection circuit connects one of the first output terminal and the second output terminal to the first capacitor, and the other to the second capacitor. The connection circuit interchanges connection destinations of the first capacitor and the second capacitor in accordance with a received first connection control signal.
    Type: Application
    Filed: February 28, 2017
    Publication date: February 22, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taichi OGAWA, Takeshi Ueno, Tetsuro Itakura, Osamu Watanabe, Takayuki Miyazaki, Yosuke Toyama
  • Patent number: 9864068
    Abstract: According to an embodiment, a circuit includes a shunt and a controller. The shunt shunts input current into a plurality of current paths. The controller controls a gain of current inputted to the shunt by combining the current that is shunted into the current paths by the shunt in combination corresponding to a first signal from the outside or changing a shunt ratio with which the shunt shunts the current into the current paths corresponding to the first signal.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: January 9, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke Kimura, Hirokatsu Shirahama, Go Kawata, Masanori Furuta, Hideyuki Funaki, Tetsuro Itakura
  • Patent number: 9866232
    Abstract: According to an embodiment, an analog-to-digital converter includes a detection circuit, a first conversion circuit, a second comparator, a delay control circuit, a control circuit. A detection circuit detects a differential time signal corresponding to a delay time by using a comparison signal and a delay comparison signal. A first conversion circuit generates a differential voltage by performing time-to-voltage conversion on the differential time signal. A second comparator generates a digital delay determination signal by comparing the differential voltage and an adjustment target voltage. A delay control circuit generates a delay control signal controlling the delay time in accordance with a delay determination signal. A control circuit generates a control signal by using the delay comparison signal in an analog-to-digital conversion period.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: January 9, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masanori Furuta, Tetsuro Itakura