Patents by Inventor Tetsuro Itakura
Tetsuro Itakura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9294044Abstract: A bias circuit according to an embodiment is a bias circuit that supplies a bias voltage to an amplifying element. The bias circuit of the embodiment includes a first current source that has a characteristic of varying an output current with the surrounding temperature variations, and a second current source that has a different output characteristic from the first current source and that can control the output current. The bias circuit of the embodiment also includes a comparator for comparing the output current of the first current source with the output current of the second current source, and a bias supply part that controls the output current of the second current source on the basis of the comparison result of the comparator and supplies a bias voltage to the amplifying element in accordance with the comparison result.Type: GrantFiled: March 14, 2014Date of Patent: March 22, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Shusuke Kawai, Masahiro Hosoya, Tong Wang, Toshiya Mitomo, Shigehito Saigusa, Tetsuro Itakura
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Patent number: 9256241Abstract: There is provided a reference voltage generating apparatus including: a reference voltage source, a voltage retaining circuit, a switch and a controller. The reference voltage source generates a reference voltage. The voltage retaining circuit includes a first element circuit and a second element circuit, and the voltage retaining circuit outputs a voltage of a connection node between a first terminal of the first element circuit and a second terminal of the second element circuit. The switch is connected between the connection node and the reference voltage source. The controller controls the reference voltage source and the switch. The first element circuit includes at least a resistance component and the first element circuit is supplied with a first voltage at a third terminal and the second element circuit includes a resistance component and a capacity component and the second element circuit is supplied with a second voltage at a fourth terminal.Type: GrantFiled: September 17, 2014Date of Patent: February 9, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Taichi Ogawa, Takeshi Ueno, Shoji Ootaka, Tetsuro Itakura, Takayuki Miyazaki
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Patent number: 9240797Abstract: According to an embodiment, a power supply noise cancelling circuit includes a generator, a first multiplier, a subtractor and a digital-to-analog converter. The generator generates a sine wave signal. The first multiplier multiplies a digital input signal by a digital signal based on the sine wave signal to generate a first digital product signal. The subtractor subtracts a digital signal based on the first digital product signal from the digital input signal to generate a digital difference signal. The digital-to-analog converter performs a digital-to-analog conversion on the digital difference signal to obtain an analog output signal.Type: GrantFiled: March 13, 2015Date of Patent: January 19, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kei Shiraishi, Masanori Furuta, Junya Matsuno, Tetsuro Itakura
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Patent number: 9225351Abstract: In one embodiment, a current amplifier circuit includes a first transistor, a first resistor, a second transistor, a second resistor, a first passive element, and a control circuit. The first transistor has a first terminal, a second terminal, and a control terminal. The first resistor has one end connected to the first terminal of the first transistor. The second transistor has a first terminal, a second terminal, and a control terminal. The second resistor has one end connected to the first terminal of the second transistor. The first passive element is connected between the first terminals of the first transistor and the second transistor. The control circuit controls at least one of voltage at the control terminals of the first transistor and the second transistor such that the voltage at the other end of the first resistor becomes equal to the voltage at the other end of the second resistor.Type: GrantFiled: November 11, 2014Date of Patent: December 29, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Tetsuro Itakura, Masanori Furuta, Akihide Sai, Junya Matsuno, Yohei Hatakeyama
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Patent number: 9224795Abstract: A semiconductor device includes a silicon substrate, a shield which is disposed on the silicon substrate and includes a conductive material, a capacitor electrode disposed on the shield, and at least one pillar member which is provided between the shield and the silicon substrate and includes a conductive material. The pillar member may be disposed at a location other than a location of a through-hole.Type: GrantFiled: August 29, 2013Date of Patent: December 29, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Shusuke Kawai, Toshiya Mitomo, Shigehito Saigusa, Tetsuro Itakura
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Patent number: 9225168Abstract: A control circuit of a switching power supply device has a first current source capable of supplying an auxiliary current to a load resistance of the switching power supply device when a load current flowing through the load resistance increases, a second current source capable of pulling in a current from the load resistance when the load current flowing through the load resistance decreases, and an auxiliary current controller configured to activate the first current source or the second current source from when a variation in the load current flowing through the load resistance is detected to have exceeded a predetermined level until a current flowing through the inductor becomes equal to the current flowing through the load resistance.Type: GrantFiled: December 3, 2012Date of Patent: December 29, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Taichi Ogawa, Takeshi Ueno, Tetsuro Itakura
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Patent number: 9213346Abstract: There is provided a multiphase switching power supply circuit in which an input terminal receives an input voltage, an output terminal outputs an output voltage, first to an Nth power stages each include an inductor having one end connected to the output terminal; a high-side switch that connects another end of the inductor to the input terminal; and a low-side switch that connects the other end of the inductor to a reference voltage, a switch signal controller supplies first to an Nth control signals to the first to Nth power stages, the first to Nth control signals complementarily turning on and off their corresponding high-side switches and low-side switches at a frequency fs, and a switch signal controller determines phases of the first to Nth control signals according to a ration between inductance values of the inductors included in the first to Nth power stages.Type: GrantFiled: January 9, 2013Date of Patent: December 15, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kei Shiraishi, Takeshi Ueno, Taichi Ogawa, Tetsuro Itakura
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Publication number: 20150349753Abstract: An integration circuit according to one embodiment includes a first capacitance element, a capacitance circuit, a comparison circuit, a memory circuit and an operation circuit. The first capacitance element receives a current signal. The capacitance circuit includes a first switch and a second capacitance element, and is connected in parallel to the first capacitance element. The second capacitance element receives a current signal via the first switch. The comparison circuit compares a voltage of the first capacitance element with a reference voltage to obtain a comparison result. The memory circuit stores the comparison result, and opens or closes the first switch based on the comparison result. The operation circuit outputs a residual signal based on a difference between the integrated value obtained by the first capacitance element and the second capacitance element and a value based on the comparison result.Type: ApplicationFiled: May 22, 2015Publication date: December 3, 2015Inventors: Tetsuro ITAKURA, Masanori FURUTA, Shunsuke KIMURA, Hideyuki FUNAKI, Go KAWATA
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Patent number: 9184658Abstract: A DC-DC converter converts an input voltage into an output voltage and includes an input terminal, an output terminal, a power stage, a switch driving circuit, a charge pump, and a capacitor. The power stage includes a high-side switch, a low-side switch and an inductor. The switch driving circuit generates a high-side switch driving signal and a low-side switch driving signal. The charge pump generates a first polarity current according to the high-side switch driving signal, and generates a second polarity current having an opposite polarity to the first polarity current according to the low-side switch driving signal. The capacitor generates a first voltage by integrating the first and second polarity currents generated by the charge pump. The switch driving circuit generates the high-side switch driving signal and the low-side switch driving signal according to a difference between the first voltage and a reference voltage.Type: GrantFiled: June 4, 2013Date of Patent: November 10, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Takeshi Ueno, Tetsuro Itakura
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Patent number: 9160359Abstract: According to an embodiment, an analog-to-digital (AD) converter includes a first AD conversion unit, a selector and a second AD conversion unit. The first AD conversion unit performs AD conversion of an analog signal in a first period to generate an upper-bit digital signal. The selector selects not less than one reference voltage based on the upper-bit digital signal to obtain a selected reference voltage group in a voltage range narrower than a full scale. The second AD conversion unit performs AD conversion of the analog signal by using the selected reference voltage group. The first period starts before settling of the analog signal up to an accuracy corresponding to a total resolution of the first AD conversion unit and the second AD conversion unit.Type: GrantFiled: November 20, 2014Date of Patent: October 13, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kei Shiraishi, Junya Matsuno, Masanori Furuta, Tetsuro Itakura
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Patent number: 9160939Abstract: According to an embodiment, a signal processing device includes an integrator, a first analog-to-digital converter, and a histogram creator. The integrator is configured to integrate an electrical charge corresponding to electromagnetic waves. The first analog-to-digital converter is configured to perform an analog-to-digital conversion operation that generates digital data of the electrical charge using an integration output from the integrator, on a parallel with an integration operation performed by the integrator. The histogram creator is configured to create a histogram that represents an energy distribution of the electromagnetic waves, from the digital data generated by the first analog-to-digital converter.Type: GrantFiled: September 10, 2014Date of Patent: October 13, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hideyuki Funaki, Shunsuke Kimura, Go Kawata, Tetsuro Itakura, Masanori Furuta
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Publication number: 20150270840Abstract: A current detection circuit according to one embodiment includes a low-pass filter, a voltage-to-current converter circuit, and a comparator. The low-pass filter has a first terminal connected to a signal input terminal to which a signal current is input. The voltage-to-current converter circuit has a first terminal connected to a second terminal of the low-pass filter and has a second terminal connected to the signal input terminal. The comparator has a first input terminal and a second input terminal and outputs a signal according to a difference between a signal input through the first input terminal and a signal input through the second input terminal, the first input terminal being connected to the second terminal of the low-pass filter, and the second input terminal being connected to the second terminal of the voltage-to-current converter circuit.Type: ApplicationFiled: March 3, 2015Publication date: September 24, 2015Inventors: Tetsuro ITAKURA, Masanori Furuta, Shunsuke Kimura, Hideyuki Funaki, Go Kawata
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Publication number: 20150263679Abstract: An inverting amplifier according to a first embodiment includes an inverter circuit, a first voltage generating circuit, and a second voltage generating circuit. The inverter circuit has an input terminal, an output terminal, a first first-conductivity transistor, and a first second-conductivity transistor. The first (second) voltage generating circuit has a first (second) current source, a second first (second)-conductivity transistor, and a third first (second)-conductivity transistor. The first (second) current source supplies a predetermined current. The second first (second)-conductivity transistor has a control terminal with a predetermined bias voltage applied, and two ends connected to the other end of the first first (second)-conductivity transistor and the first (second) current source, respectively.Type: ApplicationFiled: February 12, 2015Publication date: September 17, 2015Inventors: Tetsuro ITAKURA, Masanori FURUTA
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Publication number: 20150263746Abstract: According to an embodiment, a power supply noise cancelling circuit includes a generator, a first multiplier, a subtractor and a digital-to-analog converter. The generator generates a sine wave signal. The first multiplier multiplies a digital input signal by a digital signal based on the sine wave signal to generate a first digital product signal. The subtractor subtracts a digital signal based on the first digital product signal from the digital input signal to generate a digital difference signal. The digital-to-analog converter performs a digital-to-analog conversion on the digital difference signal to obtain an analog output signal.Type: ApplicationFiled: March 13, 2015Publication date: September 17, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kei SHIRAISHI, Masanori FURUTA, Junya MATSUNO, Tetsuro ITAKURA
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Patent number: 9136855Abstract: In one embodiment, an AD converter includes a first (second) oscillation circuit, a first (second) counter, a first (second) arithmetic circuit, a first (second) subtracting circuit, an adder circuit, and a feedback circuit. The first oscillation circuit generates a first pulse signal having a frequency corresponding to a level of a first analog signal. The first counter counts the first pulse signal. The first arithmetic circuit generates a first signal corresponding to a change amount of a count value. The first subtracting circuit outputs a digital signal corresponding to a difference between the signals generated by the first and second arithmetic circuits. The adder circuit generates a sum signal of the signals generated by the first and second arithmetic circuits. The second subtracting circuit generates a difference signal between the sum signal and a reference signal. The feedback circuit inputs the difference signal to the first oscillation circuit.Type: GrantFiled: July 23, 2014Date of Patent: September 15, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Tetsuro Itakura, Masanori Furuta, Akihide Sai, Junya Matsuno
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Patent number: 9118340Abstract: According to an embodiment, an analog-to-digital converter includes a first AD (analog-to-digital) conversion circuit and a second AD conversion circuit. The first AD conversion circuit performs AD conversion of a first input signal to generate an upper-bit digital signal. The second AD conversion circuit performs AD conversion of a sampled signal to generate a lower-bit digital signal. The sampled signal is obtained by sampling a residual signal corresponding to a residue of the AD conversion in the first AD conversion circuit. A period during which the second AD conversion circuit performs AD conversion of the sampled signal overlaps a period during which a second input signal subsequent to the first input signal is settled.Type: GrantFiled: November 20, 2014Date of Patent: August 25, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kei Shiraishi, Junya Matsuno, Masanori Furuta, Tetsuro Itakura
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Publication number: 20150213905Abstract: A signal processing circuit according to one embodiment includes a rectifier, a holder, a controller, and a setter. The rectifier generates a rectified voltage by rectifying an input voltage in which a signal voltage is superimposed on a common-mode voltage. The holder holds a voltage. The controller controls the holder so that the holder holds a voltage according to the rectified voltage generated by the rectifier. The setter sets the voltage held by the holder to a predetermined voltage at predetermined time intervals.Type: ApplicationFiled: January 22, 2015Publication date: July 30, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Junya MATSUNO, Masanori FURUTA, Tetsuro ITAKURA
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Publication number: 20150200636Abstract: An amplifier circuit according to one embodiment includes an input terminal, an output terminal, an amplifier, a first switch, and a first signal setter. An input side of the amplifier is connected to the input terminal and an output side is connected to the output terminal. A difference between a signal input from the input side and a predetermined reference signal is amplified with a predetermined gain. The first switch opens and closes between the output side of the amplifier and the output terminal. The first signal setter sets a signal of the output terminal to the predetermined signal when the first switch opens.Type: ApplicationFiled: January 8, 2015Publication date: July 16, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Junya Matsuno, Masanori Furuta, Tetsuro Itakura
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Publication number: 20150160677Abstract: There is provided a single to differential conversion circuit including: a divider circuit, first and second bias current generators, first and second output terminals and a current generating circuit. The divider circuit receives an input current including a DC component and an AC component and divides the input current to generate a first current and a second current. The first bias current generator generates a first bias current. The first output terminal outputs a first output current depending on a difference between the first current and the first bias current. The current generating circuit generates a third current which has a sign opposite to the second current on the basis of the second current. The second bias current generator generates a second bias current. The second output terminal outputs a second output current depending on a difference between the third current and the second bias current.Type: ApplicationFiled: December 5, 2014Publication date: June 11, 2015Inventors: Masanori FURUTA, Tetsuro Itakura, Hideyuki Funaki, Shunsuke Kimura, Go Kawata
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Publication number: 20150137858Abstract: In one embodiment, a buffer circuit includes a first transistor, a second transistor, a first current source, a third transistor, a fourth transistor, a second current source, and a third current source. The first transistor has a control terminal connected to an input terminal, and a first terminal connected to an output terminal. The second transistor has a control terminal connected to the input terminal, a first terminal connected to the output terminal, and a second terminal connected to a first power source. The third transistor has a first terminal connected to the output terminal. The fourth transistor has a first terminal connected to the second terminal of the first transistor, a control terminal applied bias voltage, and a second terminal connected to a control terminal of the third transistor.Type: ApplicationFiled: November 13, 2014Publication date: May 21, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Tetsuro ITAKURA, Masanori Furuta, Shunsuke Kimura, Go Kawata, Hideyuki Funaki