Abstract: An electronic circuit according to one embodiment of the present invention includes a first logic circuit, a second logic circuit, first and second capacitors, and a connection circuit. The first logic circuit has a first output terminal from which a first output signal based on a first input signal is output. The second logic circuit outputs a second output signal obtained by inversion of the first output signal is output in a steady state. The first and second capacitors each have one terminal at a first voltage. The connection circuit connects one of the first output terminal and the second output terminal to the first capacitor, and the other to the second capacitor. The connection circuit interchanges connection destinations of the first capacitor and the second capacitor in accordance with a received first connection control signal.

Abstract: According to an embodiment, a circuit includes a shunt and a controller. The shunt shunts input current into a plurality of current paths. The controller controls a gain of current inputted to the shunt by combining the current that is shunted into the current paths by the shunt in combination corresponding to a first signal from the outside or changing a shunt ratio with which the shunt shunts the current into the current paths corresponding to the first signal.

Abstract: According to an embodiment, an analog-to-digital converter includes a detection circuit, a first conversion circuit, a second comparator, a delay control circuit, a control circuit. A detection circuit detects a differential time signal corresponding to a delay time by using a comparison signal and a delay comparison signal. A first conversion circuit generates a differential voltage by performing time-to-voltage conversion on the differential time signal. A second comparator generates a digital delay determination signal by comparing the differential voltage and an adjustment target voltage. A delay control circuit generates a delay control signal controlling the delay time in accordance with a delay determination signal. A control circuit generates a control signal by using the delay comparison signal in an analog-to-digital conversion period.

Abstract: According to one embodiment, a DC-DC converter, includes: an inductor configured to be supplied with an input voltage; a plurality of rectifiers connected in parallel to the inductor; a plurality of p-MOS transistors connected in series to the respective rectifiers; a switch configured to connect an output side of the inductor to a reference potential; and a control circuit configured to control the p-MOS transistors and the switch. The control circuit performs control to supply a voltage to turn on a first p-MOS transistor selected from among the p-MOS transistors to a gate terminal of the first p-MOS transistor, and to supply a voltage depending on an output voltage of the first p-MOS transistor to a gate terminal of a second p-MOS transistor other than the first p-MOS transistor among the p-MOS transistors.

Abstract: A time to digital converter has a counter, a first phase difference detector, a first capacitor, a second capacitor having capacitance N times a capacitance of the first capacitor, a comparator to compare a charge voltage of the first capacitor with a charge voltage of the second capacitor, a first charge controller, a first phase difference arithmetic unit, a second phase difference detector, a second charge controller, a second phase difference arithmetic unit to operate the phase difference between the first signal and the second signal, and a third phase difference arithmetic unit to detect a fractional phase difference between the first signal and the second signal. The first phase difference arithmetic unit operates the phase difference between the first signal and the second signal, based on a reference phase, when the counter suspends a measurement operation.

Abstract: A waveform shaping filter according to one embodiment includes a first resistor, a first transistor, a first capacitor, and a first amplifier. The first resistor includes one end to which a signal current is input and the other end. The first transistor includes a first terminal connected to the other end of the first resistor, a second terminal, and a control terminal. The first capacitor includes one end connected to the other end of the first resistor and the other end. The first amplifier includes an input terminal connected to the one end of the first resistor and an output terminal connected to the control terminal of the first transistor.

Abstract: An amplifying circuit according to an embodiment includes an input terminal, an output terminal, first and second operational amplifiers, first and second input impedance elements, first to third feedback impedance elements, and an adder. The first (second) operational amplifier includes an inversion input terminal connected to a first (third) node and an output terminal connected to a second (fourth) node. The first (second) input impedance element has one end connected to the input terminal and the other end connected to the first (third) node. The first (second) feedback impedance element has one end connected to the first (third) node and the other end connected to the second (fourth) node. The third feedback impedance element has one end connected to the first node and the other end connected to the fourth node. The adder adds output voltages of the first and second operational amplifiers.

Abstract: A radiation detection apparatus according to an embodiment includes a radiation detector that detects radiation; a first measurer that measures energy of the radiation from the radiation detected by the radiation detector; and a second measurer that measures the number of times that the radiation detector detects the radiation.

Abstract: A readout circuit has a first transistor which have a first terminal, a second terminal, and a control terminal, a second transistor having a first terminal, a second terminal, and a control terminal, a first variable resistance having a first terminal connected to a first reference voltage line, and a second terminal connected to the first terminal of the first transistor, a first resistance having a first terminal connected to the first reference voltage line, and a second terminal connected to the first terminal of the second transistor, a second resistance having a first terminal connected to the second terminal of the first transistor, and a second terminal connected to a second reference voltage line, and a second variable resistance which has a first terminal connected to the second terminal of the second transistor, and a second terminal connected to the second reference voltage line.

Abstract: A DC-DC converter as embodiments of the present invention includes an input terminal, multiple output terminals, an inductor, a first switch, a first condenser, a second switch and a switch controller. One end of the inductor is connected to the input terminal. The first switch is subjected to on-off control to change a current flowing through the inductor. The first condenser has one end connected between the inductor and a first output terminal, which is one of the multiple output terminals, and has the other end connected to a ground. The second switch is connected between the inductor and the first condenser. The switch controller controls the second switch to turn on when the first switch is turned off while a first output voltage from the first output terminal is smaller than a predetermined first threshold value.

Abstract: According to some embodiments, there is provided a controller that performs communication with a plurality of power supply units each of which outputs electric power to a load. The controller includes a receiving unit, a control information generating unit and a transmitting unit. The receiving unit receives operation information from the power supply units by radio, the operation information being information on electric power output to the load from the power supply units, respectively. The control information generating unit generates control information to control the power supply units based on the operation information. The transmitting unit transmits the control information to the power supply units by radio.

Abstract: A time to digital converter has a counter to measure the number of cycles of a first signal, a first phase difference detector to generate a phase difference signal having a pulse width corresponding to a phase difference, a first capacitor to be charged with an electric charge, a second capacitor including capacitance N times the capacitance of the first capacitor, the N being a real number larger than 1, a comparator to compare a charge voltage of the first capacitor and a charge voltage of the second capacitor, a first charge controller to continue to charge the second capacitor until the comparator detects that the charge voltage of the second capacitor has reached the charge voltage of the first capacitor or more, and a first phase difference arithmetic unit to operate the phase difference between the first signal and the second signal.

Abstract: A wireless communication device has an analog control loop circuitry that generates an analog control signal to adjust a phase of a voltage controlled oscillation signal, in accordance with a phase of a reception signal, a digital control loop circuitry that generates a digital control signal having a frequency determined by a frequency of a reference signal and a predetermined frequency setting code signal and having a phase opposite to a phase of the analog control signal, a voltage controlled oscillator that generates the voltage controlled oscillation signal, on the basis of the analog control signal and the digital control signal, and a data slicer that generates a digital signal obtained by digital demodulation of the reception signal, on the basis of a comparison result of the digital control signal and a predetermined threshold value.

Abstract: An amplifier circuit has a sample-and-hold circuit to sample and hold an input signal, an amplifier which comprises an input terminal inputted with the input signal held by the sample-and-hold circuit and an output terminal outputting an amplification signal obtained by amplifying the input signal inputted, a feedback capacitor to be connected between the input terminal and output terminal of the amplifier, a successive approximation circuit to perform successive approximation operation to correct the amplification signal based on a voltage of the input terminal of the amplifier, the successive approximation operation being performed a predetermined number of cycles, and a control circuit to control the successive approximation circuit based on an amplification error included in the amplification signal.

Abstract: A wireless communication device has an analog control loop circuitry that generates an analog control signal to adjust a phase of a voltage controlled oscillation signal, in accordance with a phase of a reception signal, a digital control loop circuitry that generates a digital control signal having a frequency determined by a frequency of a reference signal and a predetermined frequency setting code signal and having a phase opposite to a phase of the analog control signal, a voltage controlled oscillator that generates the voltage controlled oscillation signal, on the basis of the analog control signal and the digital control signal, and a data slicer that generates a digital signal obtained by digital demodulation of the reception signal, on the basis of a comparison result of the digital control signal and a predetermined threshold value.

Abstract: An integrator according to an embodiment includes first and second nodes, first to fifth switches, first and second main integration capacitors, and a first subsidiary integration capacitor. The first (second, third, fourth, fifth) switch has one end connected to a first (third, first, fourth, first) node and the other end connected to a third (second, fourth, second, fifth) node. The first main integration capacitor has one end connected to the third node and the other end connected to a standard voltage line. The second main integration capacitor has one end connected to the fourth node and the other end connected to the standard voltage line. The first subsidiary integration capacitor that has one end connected to the fifth node and the other end connected to the standard voltage line.

Abstract: An amplifier circuit has a sample-and-hold circuit to sample and hold an input signal, an amplifier which comprises an input terminal inputted with the input signal held by the sample-and-hold circuit and an output terminal outputting an amplification signal obtained by amplifying the input signal inputted, a feedback capacitor to be connected between the input terminal and output terminal of the amplifier, a successive approximation circuit to perform successive approximation operation to correct the amplification signal based on a voltage of the input terminal of the amplifier, the successive approximation operation being performed a predetermined number of cycles, and a control circuit to control the successive approximation circuit based on an amplification error included in the amplification signal.

Abstract: An A/D converter has an analog input terminal, an analog output terminal, a digital output terminal, a first resistance comprising one end connected to the analog input terminal or a reference voltage line and another end connected to a first node, a second resistance comprising one end connected to the first node and another end connected to the analog output terminal, an operational amplifier comprising a first input terminal connected to the first node, a second input terminal connected to the reference voltage line or the analog input terminal, and an output terminal connected to the analog output terminal, a quantizer comprising an input terminal connected to the analog input terminal and an output terminal connected to the digital output terminal, and a DA converter comprising an input terminal connected to the digital output terminal and an output terminal connected to the first node.

Abstract: An A/D converter circuit has an amplifier circuit to amplify an input signal and output a first amplification signal and a second amplification signal, the second amplification signal having an amplification error smaller than that in the first amplification signal, a first sampling circuit to sample the first amplification signal, a first A/D converter to perform A/D conversion on the first amplification signal sampled by the first sampling circuit and output a first digital signal, a second sampling circuit to sample the second amplification signal, a D/A converter to perform D/A conversion on the first digital signal and output a first analog signal, a subtracter to subtract the first analog signal from the second amplification signal sampled by the second sampling circuit and output a second analog signal, and a second A/D converter to perform A/D conversion on the second analog signal and output a second digital signal.

Abstract: An A/D converter circuit has an amplifier circuit to amplify an input signal and output a first amplification signal and a second amplification signal, the second amplification signal having an amplification error smaller than that in the first amplification signal, a first sampling circuit to sample the first amplification signal, a first A/D converter to perform A/D conversion on the first amplification signal sampled by the first sampling circuit and output a first digital signal, a second sampling circuit to sample the second amplification signal, a D/A converter to perform D/A conversion on the first digital signal and output a first analog signal, a subtracter to subtract the first analog signal from the second amplification signal sampled by the second sampling circuit and output a second analog signal, and a second A/D converter to perform A/D conversion on the second analog signal and output a second digital signal.