Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.

Abstract: An electrically reliable heat radiating package provided with a ball grid array (BGA) structure and a method of manufacturing the package are disclosed.A semiconductor chip is mounted on one surface of a ceramic wiring board via first solder bump electrodes and resin is filled in a gap area between the one surface of the wiring board and the principal surface of the semiconductor chip. A heat diffusing plate formed in a larger plane size than that of the semiconductor chip by aluminum nitride is arranged on the rear surface opposite to the principal surface of the semiconductor chip and soldered.Further, a radiating fin made of aluminum is provided on the heat diffusing plate and struck via silicone rubber in which a thermally conductive filler is includes.

Abstract: For manufacturing a packaged semiconductor device, a lead frame with an electrically insulating strip member and a semiconductor chip is placed in a molding unit having upper and lower dies. The upper and lower dies have recessed areas for determining a size of a cavity of the molding unit different from each other, the size of the cavity being measured in a direction perpendicular to a clamping motion direction of the dies. The lead frame is positioned so that a surface of each lead with the insulating strip member applied thereto is contacted with one of the upper and lower dies having a larger recessed area and a molding line of the molding unit intersects the insulating strip member. The molding unit is closed to clamp the lead frame to depress and thrust into spaces between adjacent leads that part of the strip member which is outside the molding line and to form the cavity of the molding unit.

Abstract: In soldering together two members such as electronic circuit devices, after an oxide or contaminated layer has been removed from the surface of a solder material or bonding pad, for example, the members are aligned in an oxidizing atmosphere. Then the solder material is heated in a nonoxidizing atmosphere to melt the solder and bond the members. Cleaning of the solder material or bonding pad is performed by sputter-cleaning, laser cleaning, mechanical polishing, or cutting.

Abstract: A method of soldering used in fabricating an electronic circuit device employs an organic material supplied to at least one of the connecting members to be bonded. The connecting members are positioned in an oxidizing atmosphere, and heated in a nonoxidizing atmosphere to remove oxide and/or contamination layers present on the surface of presoldered portions or metallized bonding portions. By this method, fluxless soldering is performed, positional shifts are reduced, and high reliability of the soldering connections with reduction in residues after reflow are obtained.

Abstract: A semiconductor device has a pellet at the upper surface of a substrate and connects the pellet with a plurality of connecting terminals formed of solder bumps. The connecting terminal group is arranged in the form of a plurality of annular lines in the periphery of the pellet, and a reinforcing resin layer is formed, in the connecting terminal group, of a resin filling a thinner space formed between the pellet and the substrate. At the time of forming the solder bumps, a cutout portion (a vacant area where no bumps are arranged) is formed in the connecting terminal annular line group by means of a cutout part opened at one side of the annular line group, and the reinforcing resin layer is also formed in the cutout portion. Since the air in the thinner space is perfectly exhausted by the effect of the connecting terminal annular line group cutout portion when the vacant area is filled with the reinforcing resin, the generation of an unfilled area in the reinforcing resin layer can be prevented.

Abstract: An apparatus comprises a sputter cleaning device, an alignment device operable in atmospheric condition and a heating and soldering device in the form of a belt furnace operable in non-oxidizing or reducing environment. Instead of the sputter cleaning device, a mechanical polishing or cutting device can be used to clean a surface of solder or a member to be bonded or a solder ball plated with gold may be used. An alignment between two members to be bonded is provided by an alignment mark means which comprises a protrusion on a surface of one member and a complimentary recess formed at a center portion of a protrusion means formed on a corresponding surface of the other member.

Abstract: In a method of soldering for use in fabricating electronic circuit device, after an oxide layer and/or contaminated layer on a surface of a soldering material and members to be soldered thereby is removed by sputter-cleaning with atom or ion, the members are aligned in an oxidizing atmosphere within a predetermined time period and, then, the soldering material is heated in non-oxidizing atmosphere to performe soldering. An apparatus for performing the above method comprises a sputter cleaning device, an alignment device operable in atmospheric condition and a heating and soldering device in the form of a belt furnace operable in non-oxidizing or reducing environment. Instead of the sputter cleaning device, a mechanical polishing or cutting device can be used to cleaning a surface of solder or a member to be bonded or a solder ball plated with gold may be used.

Abstract: A semiconductor module comprises a substrate, a plurality of semiconductor chips mounted on the substrate, a plurality of heat conduction members mounted on the back surfaces of the plurality of semiconductor chips, respectively, and a cooling jacket, on which the plurality of heat conduction members are bonded with heat conductive bonding agent, sealed with the substrate, wherein, in a surface of each of the plurality of heat conduction members adjacent to the cooling jacket and in a surface of the cooling jacket adjacent to the heat conduction members, around a portion corresponding to the back surface of each of the semiconductor chip is formed a portion which has non-affinity for the heat conductive bonding agent. Further, it is preferred that a reservoir having an affinity for the heat conductive bonding agent and serving to receive an excessive bonding agent is formed around each of the non-affinity portions of the plurality of heat conduction members and the cooling jacket.

Abstract: In a chip carrier wherein a semiconductor chip is face down bonded to a package substrate through solder bumps, then covered with a cap and sealed hermetically using a sealing solder, the back of the semiconductor chip being bonded closely to the underside of the cap using a solder for heat transfer, a solder preform serving as the said heat transfer solder is heat-melted and a portion of the thus melted solder is allowed to flow into the sealing portion to effect the hermetic seal of the chip. Furthermore, in order to improve the flowability of the solder preform during the melt flow thereof, a metallized layer for heat transfer formed under the heat transfer solder of the cap and a sealing metallized layer are partially connected with each other through a connecting metallized layer.

Abstract: A method of manufacturing a semiconductor device wherein the back surface of a semiconductor chip is adhered closely to a substrate or a seal member through a soldering material or the like, and a metallized layer is formed on the back surface of the chip for attaining good adhesion. The metallized layer according to the present invention is a layer formed by laminating a metal silicide, a barrier metal and an oxidation preventing metal successively on the back of the chip. The layer of the metal silicide can be formed in a known heat treatment process, for example, simultaneously with the formation of bump electrodes, on a main surface of the semiconductor chip by the heat used at the time of forming such bump electrodes, or simultaneously with the mounting of the semiconductor chip by the heat used at the time of the chip mounting.

Abstract: A bipolar memory of a construction having high immunity to soft error attributable to alpha rays is provided. The transistors of a flip flop, i.e., the essential circuitry of the memory cell, are inverted and the load device thereof has shielding means for shielding the flip flop from the noise produced within the substrate. Bipolar transistors and Schottky barrier diodes are employed as the load devices. A buried layer (ordinarily, an n type layer) and a doped layer of the reverse conductivity type (ordinarily the p type) are formed in a region where the device is provided, and a reverse bias is applied across the buried layer and the doped layer to shut off the noise produced within the substrate.

Abstract: A bipolar memory of a construction having high immunity from soft error attributable to alpha rays is provided. The transistors of a flip flop, i.e., the essential circuit of the memory cell, are inverted, and the load device thereof has a shielding arrangement for shielding the flip flop from the noise produced within the substrate. Either pnp type transistors or Schottky barrier diodes are employed as the load devices. A buried layer (ordinarily, an n type layer) and a doped layer of the reverse conductivity type (ordinarily the p type) are formed in the region where the device is provided. A reverse bias is applied across the buried layer and the doped layer to shut off the noise produced within the substrate.

Abstract: A semiconductor device is disclosed, which includes bipolar transistor each having an emitter, base and collector formed inside each protruding portion of a semiconductor substrate, and trenches for device isolation. The bipolar transistor and the trench are spaced apart from each other by a predetermined spacing. According to this arrangement, the width of a base contact becomes uniform and any change of transistor characteristics can be prevented effectively.

Abstract: A bipolar transistor capable of operating at high speeds. In a bipolar transistor designed for operation at high speeds, a polycrystalline silicon layer used as a base electrode effects is a contact area with respect to the base region which lacks precision or tends to increase. Further, when the transistor is formed in a small size, the ratio of the contact area with respect to the polycrystalline area increases, making it difficult to increase the operation speed. In order to reduce the contact area of the polycrystalline silicon layer, this invention deals with the structure in which the polycrystalline silicon layer is brought into contact with a portion near the edge of the convex semiconductor layer maintaining a small size and a high precision.

Abstract: A bipolar memory of a construction having high immunity to soft error attributable to alpha rays is provided. The transistors of a flip flop, i.e., the essential circuitry of the memory cell, are inverted and the load device thereof has shielding means for shielding the flip flop from the noise produced within the substrate. Bipolar transistors and Schottky barrier diodes are employed as the load devices. A buried layer (ordinarily, an n type layer) and a doped layer of the reverse conductivity type (ordinarily the p type) are formed in a region where the device is provided, and a reverse bias is applied across the buried layer and the doped layer to shut off the noise produced within the substrate.

Abstract: A semiconductor device includes a first insulation film formed on a monocrystalline substrate and having an opening, a monocrystalline semiconductor layer formed so as to protrude into the first insulation film, and a conductive layer formed in contact with the side section of the monocrystalline semiconductor layer and extending over a second insulation film formed on the monocrystalline semiconductor layer.

Abstract: A static random access memory cell in which capacitors are electrically connected to storage nodes, so that the memory cell will not suffer from soft error even when it is hit by alpha particles. The memory cell has MOS transistors, capacitors constituted by two polycrystalline silicon layers, and resistors constituted by a polycrystalline silicon layer, that are formed on a semiconductor substrate.

Abstract: An anti-reflective coating film is formed on a resist film formed on a substrate having a target pattern formed on its surface, thereby to reduce multiple reflection of light in said resist film. The distortion of the pattern detection signal due to multiple reflection in said resist film is thereby prevented to improve the mask positioning accuracy.

Abstract: After a bottom layer film, an intermediate film and a top layer film were laminated and formed on a film which is processed and which was formed on a substrate having a different level portion, the patterns of the top layer film are sequentially transferred to the intermediate film, bottom layer film and film to be processed, thereby forming the patterns of the film to be processed. By minimizing the differences among the light refractive index of the intermediate film and the light refractive indexes of the bottom and top layer films, the patterns can be formed with a far higher degree of accuracy than that by the conventional multi layer resist method.