Patents by Inventor Tetsuya Iizuka
Tetsuya Iizuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9658505Abstract: A display device includes an insulating substrate, a semiconductor layer formed of polycrystalline silicon, including a first impurity area, a second impurity area, and a channel area, an insulating film which covers the semiconductor layer, a gate electrode formed on the insulating film and opposed to the channel area, a source line electrically connected to the first impurity area, an electrode electrically connected to the second impurity area, and a light-shielding film located between the insulating substrate and the semiconductor layer, disposed at a position displaced from a position opposed to the source line, and opposed to an area including a boundary between the channel area and the second impurity area.Type: GrantFiled: April 16, 2015Date of Patent: May 23, 2017Assignee: Japan Display Inc.Inventors: Tatsuya Ishii, Tetsuya Iizuka
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Patent number: 9548322Abstract: According to one embodiment, a wiring substrate includes a pad group of a first pad to supply a power source voltage of low level, a second pad to supply a power source voltage of high level, and a third pad to supply a necessary signal for displaying an image, a common line, a first connection line to connect the first pad with the common line, a second connection line to connect the second pad with the common line, and a third connection line to connect the third pad with the common line, wherein the first connection line and the second connection line are formed of polysilicon in which no impurity is doped, and the third connection line and the common line are formed of polysilicon in which an impurity is doped.Type: GrantFiled: December 4, 2014Date of Patent: January 17, 2017Assignee: Japan Display Inc.Inventors: Takamitsu Fujimoto, Tetsuya Iizuka
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Patent number: 9543326Abstract: According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second semiconductor layer, a gate line, a first source line, a second source line, a switching element, and a pixel electrode, wherein an area in which the first light shielding layer and the pixel electrode are opposed to each other and an area in which the second light shielding layer and the pixel electrode are opposed to each other are equal in size.Type: GrantFiled: August 4, 2015Date of Patent: January 10, 2017Assignee: Japan Display Inc.Inventors: Naoki Miyanaga, Tetsuya Iizuka, Masanori Ando
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Patent number: 9470936Abstract: In one embodiment, a first shield electrode and a second shield electrode are arranged on a first substrate. A first source line and a second source line are arranged facing the first and second shield electrodes through an insulating layer, respectively. A first main common electrode and a second main common electrode are formed facing the first and second source lines through an insulating layer, respectively. A main pixel electrode is formed so as to locate between the first and second main common electrodes. A second substrate includes a third main common electrode and a fourth main common electrode facing the first and second main common electrodes, respectively. A liquid crystal layer is held between the first and second substrates. The first, second, third and fourth main common electrodes are set to the same electric potential.Type: GrantFiled: June 17, 2015Date of Patent: October 18, 2016Assignee: Japan Display, Inc.Inventors: Koji Yamamoto, Tetsuya Iizuka
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Publication number: 20160286637Abstract: [A problem to be solved] To provide a plasma torch in which a nozzle can be effectively cooled to an ejecting hole of plasm arc and which has a stable electrification properties [Measures to solve the problem] The plasma torch of the present invention has nozzle A and the torch body B. The nozzle A has the inner nozzle 2 and the inner cap 3 which is fastened to the torch body with the inner nozzle 2. The annular water passage 8 and a plurality of independent water passages 9 are formed between the inner nozzle 2 and the inner cap 3. A fastening force applied when the inner cap 3 is fastened to the nozzle base 14 is transmitted via the partitions 2f. The torch body B has the water supply port 20 and the water drain port 21. At least one of the water supply port 20 and the water drain port 21 is configured as a groove which extends on a plane which crosses the axis and which is connected to the water passage.Type: ApplicationFiled: August 18, 2014Publication date: September 29, 2016Applicant: Koike Sanso Kogyo Co., Ltd.Inventors: Ryosuke KIMOTO, Masatoshi MOTOYAMA, Tetsuya IIZUKA, Susumu KANDA, Katsuhiko SAKAMOTO, Akira HURUJO, Daiji SAKAI
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Publication number: 20160141319Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.Type: ApplicationFiled: January 22, 2016Publication date: May 19, 2016Inventors: Takashi ABE, Ryoji SUZUKI, Keiji MABUCHI, Tetsuya IIZUKA, Takahisa UENO, Tsutomu HARUTA
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Publication number: 20160103346Abstract: In one embodiment, a liquid crystal display panel includes an array substrate and a counter substrate each having a display region and a peripheral region arranged adjacent to the display region. A resin layer is formed either one of the array substrate and the counter substrate. A protrusion in the shape of a wall is arranged on the resin layer with a gap between the protrusion and the substrate opposing the protrusion. A seal material is formed between the array substrate and the counter substrate, and arranged between a peripheral portion of the display region and the protrusion for attaching the array substrate and the counter substrate. A liquid crystal layer is formed in a surrounded region by the array substrate, the counter substrate and the seal material.Type: ApplicationFiled: December 16, 2015Publication date: April 14, 2016Applicant: Japan Display Inc.Inventors: Katsuhiro HOSHINA, Tetsuya IIZUKA
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Patent number: 9250480Abstract: In one embodiment, a liquid crystal display panel includes an array substrate and a counter substrate each having a display region and a peripheral region arranged adjacent to the display region. A resin layer is formed either one of the array substrate and the counter substrate. A protrusion in the shape of a wall is arranged on the resin layer with a gap between the protrusion and the substrate opposing the protrusion. A seal material is formed between the array substrate and the counter substrate, and arranged between a peripheral portion of the display region and the protrusion for attaching the array substrate and the counter substrate. A liquid crystal layer is formed in a surrounded region by the array substrate, the counter substrate and the seal material.Type: GrantFiled: October 22, 2014Date of Patent: February 2, 2016Assignee: JAPAN DISPLAY INC.Inventors: Katsuhiro Hoshina, Tetsuya Iizuka
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Patent number: 9242407Abstract: A cyclic-olefin-based thermoplastic resin for thermal imprint to be used in the production of a sheet or a film which contains at least one of skeletons represented by the following chemical equation 1 or the following chemical equation 2 in a main chain. The glass transition temperature Tg (° C.) and the value ([M]) of MFR at 260° C. satisfy the following equation 1, and [M]<30. The thermal imprint characteristics (transferability, mold release characteristic, and the like) are superior and the productivity (throughput) is improved.Type: GrantFiled: August 1, 2014Date of Patent: January 26, 2016Assignees: SCIVAX CORPORATION, MARUZEN PETROCHEMICAL CO., LTD.Inventors: Toshifumi Takemori, Yoshiaki Takaya, Takahito Mita, Tetsuya Iizuka, Yuji Hashima, Takahisa Kusuura, Mitsuru Fujii, Takuji Taguchi, Anupam Mitra
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Publication number: 20150346567Abstract: According to one embodiment, a liquid crystal display includes a first substrate including a gate wire, a source wire intersecting with the gate wire, a pixel electrode with a contact portion and a main pixel electrode extending from the contact portion, and a semiconductor layer arranged under the source wire and intersecting with the gate wire and bending under the source wire so as to extend to below the contact portion, a second substrate opposed to the array substrate, and a liquid crystal layer between the first and second substrate. The semiconductor layer is electrically connected to the source wire on one side of a position of the gate wire and to the contact portion on another side of the gate wire.Type: ApplicationFiled: August 10, 2015Publication date: December 3, 2015Applicant: Japan Display Inc.Inventors: Katsuhiro HOSHINA, Tetsuya IIZUKA, Masato NAKAMURA, Kazuya Daishi
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Patent number: 9176354Abstract: In one aspect, a liquid crystal display device includes a display region formed of plural divided regions in a row direction. First and second driving circuits are arranged to face each other interposing the display region therebetween in the row direction. The first driving circuit is connected with odd scanning lines, and the second driving circuit is connected with the even scanning lines. A channel area of the TFT of the pixels connected to the odd scanning lines is the smallest in the divided region nearest to the first driving circuit and becomes larger gradually in the divided regions distant from the first driving circuit. A channel area of the TFT of the pixels connected to the even scanning lines is the smallest in the divided region nearest to the second driving circuit and becomes larger gradually in the divided regions with distant from the second driving circuit.Type: GrantFiled: September 23, 2011Date of Patent: November 3, 2015Assignee: JAPAN DISPLAY INC.Inventors: Masaki Miyatake, Tetsuya Iizuka, Katsuhiro Hoshina
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Publication number: 20150301378Abstract: A display device includes an insulating substrate, a semiconductor layer formed of polycrystalline silicon, including a first impurity area, a second impurity area, and a channel area, an insulating film which covers the semiconductor layer, a gate electrode formed on the insulating film and opposed to the channel area, a source line electrically connected to the first impurity area, an electrode electrically connected to the second impurity area, and a light-shielding film located between the insulating substrate and the semiconductor layer, disposed at a position displaced from a position opposed to the source line, and opposed to an area including a boundary between the channel area and the second impurity area.Type: ApplicationFiled: April 16, 2015Publication date: October 22, 2015Applicant: Japan Display Inc.Inventors: Tatsuya ISHII, Tetsuya IIZUKA
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Patent number: 9166770Abstract: A clock data recovery device 1 generates a recovered clock Recovered Clock and recovered data Recovered Data based on an input signal Data In, and includes a signal selector 10, a phase delay unit 20, a time measurement unit 30, a phase selector 40, an edge detector 50, a polarity detector 60, a logic inverter 70, and a data output unit 80. The signal selector 10, the phase delay unit 20, the time measurement unit 30, and the phase selector 40 constitute a clock-generation device 1A. The phase delay unit 20 includes a plurality of cascaded delay elements 211 to 21P. The phase selector 40 selects a signal output from the delay element in a position corresponding to a unit interval time among the delay elements 211 to 21P, and outputs the signal as a feedback clock Feedback Clock.Type: GrantFiled: August 6, 2013Date of Patent: October 20, 2015Assignee: THINE ELECTRONICS, INC.Inventors: Kunihiro Asada, Tetsuya Iizuka, Satoshi Miura, Yohei Ishizone, Yoshimichi Murakami, Shunichi Kubo, Shuhei Yamamoto
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Patent number: 9140943Abstract: According to one embodiment, a liquid crystal display includes a first substrate including a gate wire, a source wire intersecting with the gate wire, a pixel electrode with a contact portion and a main pixel electrode extending from the contact portion, and a semiconductor layer arranged under the source wire and intersecting with the gate wire and bending under the source wire so as to extend to below the contact portion, a second substrate opposed to the array substrate, and a liquid crystal layer between the first and second substrate. The semiconductor layer is electrically connected to the source wire on one side of a position of the gate wire and to the contact portion on another side of the gate wire.Type: GrantFiled: February 25, 2015Date of Patent: September 22, 2015Assignee: JAPAN DISPLAY INC.Inventors: Katsuhiro Hoshina, Tetsuya Iizuka, Masato Nakamura, Kazuya Daishi
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Publication number: 20150263850Abstract: A clock data recovery device 1 generates a recovered clock Recovered Clock and recovered data Recovered Data based on an input signal Data In, and includes a signal selector 10, a phase delay unit 20, a time measurement unit 30, a phase selector 40, an edge detector 50, a polarity detector 60, a logic inverter 70, and a data output unit 80. The signal selector 10, the phase delay unit 20, the time measurement unit 30, and the phase selector 40 constitute a clock-generation device 1A. The phase delay unit 20 includes a plurality of cascaded delay elements 211 to 21P. The phase selector 40 selects a signal output from the delay element in a position corresponding to a unit interval time among the delay elements 211 to 21P, and outputs the signal as a feedback clock Feedback Clock.Type: ApplicationFiled: August 6, 2013Publication date: September 17, 2015Applicant: THINE ELECTRONICS, INC.Inventors: Kunihiro Asada, Tetsuya Iizuka, Satoshi Miura, Yohei Ishizone, Yoshimichi Murakami, Shunichi Kubo, Shuhei Yamamoto
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Patent number: 9136281Abstract: According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second semiconductor layer, a gate line, a first source line, a second source line, a switching element, and a pixel electrode, wherein an area in which the first light shielding layer and the pixel electrode are opposed to each other and an area in which the second light shielding layer and the pixel electrode are opposed to each other are equal in size.Type: GrantFiled: December 4, 2014Date of Patent: September 15, 2015Assignee: Japan Display Inc.Inventors: Naoki Miyanaga, Tetsuya Iizuka, Masanori Ando
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Patent number: 9104075Abstract: In one embodiment, a first shield electrode and a second shield electrode are arranged on a first substrate. A first source line and a second source line are arranged facing the first and second shield electrodes through an insulating layer, respectively. A first main common electrode and a second main common electrode are formed facing the first and second source lines through an insulating layer, respectively. A main pixel electrode is formed so as to locate between the first and second main common electrodes. A second substrate includes a third main common electrode and a fourth main common electrode facing the first and second main common electrodes, respectively. A liquid crystal layer is held between the first and second substrates. The first, second, third and fourth main common electrodes are set to the same electric potential.Type: GrantFiled: September 2, 2014Date of Patent: August 11, 2015Assignee: JAPAN DISPLAY INC.Inventors: Koji Yamamoto, Tetsuya Iizuka
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Publication number: 20150168791Abstract: According to one embodiment, a liquid crystal display includes a first substrate including a gate wire, a source wire intersecting with the gate wire, a pixel electrode with a contact portion and a main pixel electrode extending from the contact portion, and a semiconductor layer arranged under the source wire and intersecting with the gate wire and bending under the source wire so as to extend to below the contact portion, a second substrate opposed to the array substrate, and a liquid crystal layer between the first and second substrate. The semiconductor layer is electrically connected to the source wire on one side of a position of the gate wire and to the contact portion on another side of the gate wire.Type: ApplicationFiled: February 25, 2015Publication date: June 18, 2015Applicant: JAPAN DISPLAY INC.Inventors: Katsuhiro HOSHINA, Tetsuya IIZUKA, Masato NAKAMURA, Kazuya DAISHI
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Publication number: 20150162357Abstract: According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second semiconductor layer, a gate line, a first source line, a second source line, a switching element, and a pixel electrode, wherein an area in which the first light shielding layer and the pixel electrode are opposed to each other and an area in which the second light shielding layer and the pixel electrode are opposed to each other are equal in size.Type: ApplicationFiled: December 4, 2014Publication date: June 11, 2015Applicant: Japan Display Inc.Inventors: Naoki MIYANAGA, Tetsuya Iizuka, Masanori Ando
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Patent number: RE45891Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.Type: GrantFiled: September 28, 2012Date of Patent: February 16, 2016Assignee: Sony CorporationInventors: Takashi Abe, Ryoji Suzuki, Keiji Mabuchi, Tetsuya Iizuka, Takahisa Ueno, Tsutomu Haruta