Patents by Inventor Tetsuya Kakehata

Tetsuya Kakehata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090203176
    Abstract: To suppress generation of dangling bonds, the present invention relates to a method for manufacturing a semiconductor device including the steps of: forming a semiconductor film; forming a gate insulating film and a gate electrode over the semiconductor film; forming an impurity region in the semiconductor film by addition of an impurity element having one conductivity type thereto; forming an insulating film containing fluorine with the semiconductor film, the gate insulating film, and the gate electrode covered therewith; heating the semiconductor film and the insulating film containing fluorine; and forming a wiring, which is electrically connected to the impurity region, over the insulating film containing fluorine. The insulating film containing fluorine is any one of a silicon oxide film containing fluorine, a silicon oxide film containing fluorine and nitrogen, or a silicon nitride film containing fluorine.
    Type: Application
    Filed: August 12, 2008
    Publication date: August 13, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Tetsuya KAKEHATA
  • Publication number: 20090162992
    Abstract: There are provided a semiconductor device having a structure which can realize not only suppression of a punch-through current but also reuse of a silicon wafer used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. A semiconductor film into which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted is formed over a substrate, and a single crystal semiconductor film is bonded to the semiconductor film by an SOI technique to form a stacked semiconductor film. A channel formation region is formed using the stacked semiconductor film, thereby suppressing a punch-through current in a semiconductor device.
    Type: Application
    Filed: December 19, 2008
    Publication date: June 25, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Sho KATO, Fumito ISAKA, Tetsuya KAKEHATA, Hiromichi GODO, Akihisa SHIMOMURA
  • Publication number: 20090111236
    Abstract: An object is to reduce occurrence of defective bonding between a base substrate and a semiconductor substrate even when a silicon nitride film or the like is used as a bonding layer. Another object is to provide a method for manufacturing an SOI substrate by which an increase in the number of steps can be suppressed.
    Type: Application
    Filed: October 28, 2008
    Publication date: April 30, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tetsuya Kakehata, Kazutaka Kuriki
  • Publication number: 20090111248
    Abstract: A damaged region is formed by generation of plasma by excitation of a source gas, and by addition of ion species contained in the plasma from one of surfaces of a single crystal semiconductor substrate; an insulating layer is formed over the other surface of the single crystal semiconductor substrate; a supporting substrate is firmly attached to the single crystal semiconductor substrate so as to face the single crystal semiconductor substrate with the insulating layer interposed therebetween; separation is performed at the damaged region into the supporting substrate to which a single crystal semiconductor layer is attached and part of the single crystal semiconductor substrate by heating of the single crystal semiconductor substrate; dry etching is performed on a surface of the single crystal semiconductor layer attached to the supporting substrate; the single crystal semiconductor layer is recrystallized by irradiation of the single crystal semiconductor layer with a laser beam to melt at least part of the
    Type: Application
    Filed: October 8, 2008
    Publication date: April 30, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hideto OHNUMA, Tetsuya KAKEHATA, Akihisa SHIMOMURA, Shinya SASAGAWA, Motomu KURATA
  • Publication number: 20090102008
    Abstract: A semiconductor substrate having an SOI layer is provided. Between an SOI layer and a glass substrate, a bonding layer is provided which is formed of one layer or a plurality of layers of phosphosilicate glass, borosilicate glass, and/or borophosphosilicate glass, using organosilane as one material by a thermal CVD method at a temperature of 500° C. to 800° C.
    Type: Application
    Filed: October 10, 2008
    Publication date: April 23, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Tetsuya KAKEHATA
  • Publication number: 20090098739
    Abstract: An object of the present invention is to provide a method for manufacturing an SOI substrate provided with a semiconductor layer which can be used practically even where a substrate having a low upper temperature limit such as a glass substrate is used. The manufacturing method compromises the steps of preparing a semiconductor substrate provided with a bonding layer formed on a surface thereof and a separation layer formed at a predetermined depth from the surface thereof, bonding the bonding layer to the base substrate having a distortion point of 700° C. or lower so that the semiconductor substrate and the base substrate face each other, and separating a part of the semiconductor substrate at the separation layer by heat treatment in order to form a single-crystal semiconductor layer over the base substrate. In the manufacturing method, a substrate which shrinks isotropically at least by the heat treatment is used as the base substrate.
    Type: Application
    Filed: October 2, 2008
    Publication date: April 16, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hideto OHNUMA, Takashi SHINGU, Tetsuya KAKEHATA, Kazutaka KURIKI, Shunpei YAMAZAKI
  • Publication number: 20090096054
    Abstract: A semiconductor device including a semiconductor substrate is provided. The semiconductor substrate includes a substrate having an insulating surface, and a plurality of stacks over the substrate having an insulating surface. Each of the plurality of stacks includes a bonding layer over the substrate having an insulating surface, an insulating layer over the bonding layer, and a single crystal semiconductor layer over the insulating layer. The substrate having an insulating surface has a depression, and the depression is provided between one of the plurality of stacks and another adjacent one of the plurality of stacks.
    Type: Application
    Filed: September 25, 2008
    Publication date: April 16, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Tetsuya KAKEHATA
  • Publication number: 20090072343
    Abstract: A high-performance semiconductor device using an SOI substrate in which a low-heat-resistance substrate is used as a base substrate. Further, a high-performance semiconductor device formed without using chemical polishing. Further, an electronic device using the semiconductor device. An insulating layer over an insulating substrate, a bonding layer over the insulating layer, and a single-crystal semiconductor layer over the bonding layer are included, and the arithmetic-mean roughness of roughness in an upper surface of the single-crystal semiconductor layer is greater than or equal to 1 nm and less than or equal to 7 nm. Alternatively, the root-mean-square roughness of the roughness may be greater than or equal to 1 nm and less than or equal to 10 nm. Alternatively, a maximum difference in height of the roughness may be greater than or equal to 5 nm and less than or equal to 250 nm.
    Type: Application
    Filed: September 10, 2008
    Publication date: March 19, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hideto OHNUMA, Yoichi IIKUBO, Yoshiaki YAMAMOTO, Kenichiro MAKINO, Akihisa SHIMOMURA, Eiji HIGA, Tatsuya MIZOI, Yoji NAGANO, Fumito ISAKA, Tetsuya KAKEHATA, Shunpei YAMAZAKI
  • Publication number: 20090050941
    Abstract: A semiconductor device including a plurality of field-effect transistors which are stacked with a planarization layer interposed therebetween over a substrate having an insulating surface, in which semiconductor layers in the plurality of field-effect transistors are separated from semiconductor substrates, and the semiconductor layers are bonded to an insulating layer formed over the substrate having an insulating surface or an insulating layer formed over the planarization layer.
    Type: Application
    Filed: August 19, 2008
    Publication date: February 26, 2009
    Inventors: Shunpei Yamazaki, Hideto Ohnuma, Tetsuya Kakehata
  • Publication number: 20090017568
    Abstract: A semiconductor device of the present invention is manufactured by the following steps: forming a single-crystal semiconductor layer over a substrate having an insulating surface; irradiating a region of the single-crystal semiconductor layer with laser light; forming a circuit of a pixel portion using a region of the single-crystal semiconductor layer which is not irradiated with the laser light; and forming a driver circuit for driving the circuit of the pixel portion using the region of the single-crystal semiconductor layer which is irradiated with the laser light. Thus, a semiconductor device using a single-crystal semiconductor layer which is suitable for a peripheral driver circuit region and a single-crystal semiconductor layer which is suitable for a pixel region can be provided.
    Type: Application
    Filed: July 8, 2008
    Publication date: January 15, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tetsuya Kakehata
  • Publication number: 20090011575
    Abstract: It is object to provide a manufacturing method of an SOI substrate provided with a single-crystal semiconductor layer, even in the case where a substrate having a low allowable temperature limit, such as a glass substrate, is used and to manufacture a high-performance semiconductor device using such an SOI substrate. Light irradiation is performed on a semiconductor layer which is separated from a semiconductor substrate and bonded to a support substrate having an insulating surface, using light having a wavelength of 365 nm or more and 700 nm or less, and a film thickness d (nm) of the semiconductor layer which is irradiated with the light is made to satisfy d=?/2n×m±? (nm), when a light wavelength is ? (nm), a refractive index of the semiconductor layer is n, m is a natural number greater than or equal to 1 (m=1, 2, 3, 4, . . . ), and 0???10 is satisfied.
    Type: Application
    Filed: June 17, 2008
    Publication date: January 8, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihisa Shimomura, Hideto Ohnuma, Tetsuya Kakehata, Kenichiro Makino
  • Publication number: 20090001452
    Abstract: The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
    Type: Application
    Filed: June 24, 2008
    Publication date: January 1, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tamae Takano, Tetsuya Kakehata, Shunpei Yamazaki
  • Publication number: 20080318394
    Abstract: A single crystal semiconductor layer is formed over a substrate having an insulating surface by the following steps: forming an ion doped layer at a given depth from a surface of a single crystal semiconductor substrate; performing plasma treatment to the surface of the single crystal semiconductor substrate; forming an insulating layer on the single crystal semiconductor substrate to which the plasma treatment is performed; bonding the single crystal semiconductor substrate to the substrate having the insulating surface with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate using the ion doped layer as a separation surface. As a result, a semiconductor substrate in which a defect in an interface between the single crystal semiconductor layer and the insulating layer is reduced can be provided.
    Type: Application
    Filed: June 18, 2008
    Publication date: December 25, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Kazutaka Kuriki
  • Publication number: 20080315351
    Abstract: A semiconductor device and a method for manufacturing thereof are provided. The method includes a step of forming a first insulating film containing silicon and oxygen as its composition over a single-crystal semiconductor substrate, a step of forming a second insulating film containing silicon and nitrogen as its composition over the first insulating film, a step of irradiating the second insulating film with first ions to form a separation layer in the single-crystal semiconductor substrate, a step of irradiating the second insulating film with second ions so that halogen is contained in the first insulating film, and a step of performing heat treatment to separate the single-crystal semiconductor substrate with a single-crystal semiconductor film left over the supporting substrate.
    Type: Application
    Filed: June 3, 2008
    Publication date: December 25, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tetsuya Kakehata
  • Publication number: 20080308897
    Abstract: A substrate with which a semiconductor device with excellent electric characteristics and high reliability can be manufactured is provided. An aspect of the invention is a method for manufacturing a substrate for manufacturing a semiconductor device: a first silicon oxide film, a silicon nitride film, and a second silicon oxide film are stacked in this order over a surface of a semiconductor substrate by a thermal CVD method, and then a weakened layer is formed at a given depth of the semiconductor substrate; the semiconductor substrate and a substrate having an insulating surface are arranged to face each other, and the second silicon oxide film provided for the semiconductor substrate and a supporting substrate are bonded to each other; and the semiconductor substrate is separated at the weakened layer by heat treatment, whereby a semiconductor film separated from the semiconductor substrate is left over the substrate having the insulating surface.
    Type: Application
    Filed: June 3, 2008
    Publication date: December 18, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Kazutaka Kuriki
  • Publication number: 20080290393
    Abstract: An object is to provide a technique to manufacture an insulating film having excellent film characteristics. In particular, an object is to provide a technique to manufacture a dense insulating film with a high withstand voltage. Moreover, an object is to provide a technique to manufacture an insulating film with few electron traps. An insulating film including oxygen is subjected to plasma treatment using a high frequency under the conditions where the electron density is 1×1011 cm?3 or more and the electron temperature is 1.5 eV or less in an atmosphere including oxygen.
    Type: Application
    Filed: May 18, 2007
    Publication date: November 27, 2008
    Inventors: Tetsuya Kakehata, Tetsuhiro Tanaka, Yoshinobu Asami
  • Publication number: 20080246109
    Abstract: An SOI substrate having an SOI layer that can be used in practical applications even when a substrate with low upper temperature limit, such as a glass substrate, is used, is provided. A semiconductor device using such an SOI substrate, is provided. In bonding a single-crystal semiconductor layer to a substrate having an insulating surface or an insulating substrate, a silicon oxide film formed using organic silane as a material on one or both surfaces that are to form a bond is used. According to the present invention, a substrate with an upper temperature limit of 700° C. or lower, such as a glass substrate, can be used, and an SOI layer that is strongly bonded to the substrate can be obtained. In other words, a single-crystal semiconductor layer can be formed over a large-area substrate that is longer than one meter on each side.
    Type: Application
    Filed: March 10, 2008
    Publication date: October 9, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideto Ohnuma, Tetsuya Kakehata, Yoichi Iikubo
  • Patent number: 7416928
    Abstract: An amorphous semiconductor film and a semiconductor film including an element selected from Group 15 of the periodic table are formed over a substrate. An island-shaped region including an island-shaped amorphous semiconductor film and an island-shaped semiconductor film is formed. A source electrode and a drain electrode are formed over the island-shaped region. The island-shaped semiconductor film that is not covered by the source electrode and the drain electrode is removed using the source electrode and the drain electrode as a mask. At this time, the thickness of the island-shaped amorphous semiconductor film is reduced, and a portion of the island-shaped amorphous semiconductor film is exposed. A catalytic element promoting crystallization is added into a region in which the island-shaped amorphous semiconductor film is exposed. By a heat treatment, the island-shaped amorphous semiconductor film is crystallized and the catalytic element is gettered.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: August 26, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Yuuichi Takehara, Yasuhiro Jinbo
  • Publication number: 20080020528
    Abstract: An object is to provide a technique for manufacturing an insulating layer with favorable withstand voltage. Another object is to provide a technique for manufacturing a semiconductor device having an insulating layer with favorable withstand voltage. By subjecting a semiconductor layer or semiconductor substrate mainly containing silicon to a high density plasma treatment, an insulating layer is formed on a surface of the semiconductor layer or a top surface of the semiconductor substrate. At this time, the high density plasma treatment is performed by switching a supply gas in the middle of the treatment from a gas containing a rare gas, oxygen, and hydrogen, to a gas containing a rare gas and oxygen.
    Type: Application
    Filed: July 13, 2007
    Publication date: January 24, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Tomokazu Yokoi
  • Publication number: 20070253881
    Abstract: The present invention provides a method for forming by plasma CVD a silicon nitride film that can be formed over heat-sensitive elements as well as an electroluminescent element and that has favorable barrier characteristics. Further, the present invention also provides a semiconductor device, a display device and a light-emitting display device formed by using the silicon nitride film. In the method for forming a silicon nitride film by plasma CVD, silane (SiH4), nitrogen (N2) and a rare gas are introduced into a deposition chamber in depositing, and the reaction pressure is within the range from 0.01 Torr to 0.1 Torr.
    Type: Application
    Filed: July 5, 2007
    Publication date: November 1, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shinji Maekawa, Tetsuya Kakehata, Yuuichi Takehara