Patents by Inventor Tetsuya Kakehata

Tetsuya Kakehata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110073934
    Abstract: The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
    Type: Application
    Filed: December 9, 2010
    Publication date: March 31, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tamae TAKANO, Tetsuya KAKEHATA, Shunpei YAMAZAKI
  • Publication number: 20110053343
    Abstract: There are provided a semiconductor device having a structure which can realize not only suppression of a punch-through current but also reuse of a silicon wafer used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. A semiconductor film into which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted is formed over a substrate, and a single crystal semiconductor film is bonded to the semiconductor film by an SOI technique to form a stacked semiconductor film. A channel formation region is formed using the stacked semiconductor film, thereby suppressing a punch-through current in a semiconductor device.
    Type: Application
    Filed: November 9, 2010
    Publication date: March 3, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Sho KATO, Fumito ISAKA, Tetsuya KAKEHATA, Hiromichi GODO, Akihisa SHIMOMURA
  • Publication number: 20110027968
    Abstract: A semiconductor device including a plurality of field-effect transistors which are stacked with a planarization layer interposed therebetween over a substrate having an insulating surface, in which semiconductor layers in the plurality of field-effect transistors are separated from semiconductor substrates, and the semiconductor layers are bonded to an insulating layer formed over the substrate having an insulating surface or an insulating layer formed over the planarization layer.
    Type: Application
    Filed: October 7, 2010
    Publication date: February 3, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hideto OHNUMA, Tetsuya KAKEHATA
  • Patent number: 7875532
    Abstract: A substrate with which a semiconductor device with excellent electric characteristics and high reliability can be manufactured is provided. An aspect of the invention is a method for manufacturing a substrate for manufacturing a semiconductor device: a first silicon oxide film, a silicon nitride film, and a second silicon oxide film are stacked in this order over a surface of a semiconductor substrate by a thermal CVD method, and then a weakened layer is formed at a given depth of the semiconductor substrate; the semiconductor substrate and a substrate having an insulating surface are arranged to face each other, and the second silicon oxide film provided for the semiconductor substrate and a supporting substrate are bonded to each other; and the semiconductor substrate is separated at the weakened layer by heat treatment, whereby a semiconductor film separated from the semiconductor substrate is left over the substrate having the insulating surface.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: January 25, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Kazutaka Kuriki
  • Patent number: 7851279
    Abstract: The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: December 14, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tamae Takano, Tetsuya Kakehata, Shunpei Yamazaki
  • Patent number: 7851332
    Abstract: A semiconductor device including a semiconductor substrate is provided. The semiconductor substrate includes a substrate having an insulating surface, and a plurality of stacks over the substrate having an insulating surface. Each of the plurality of stacks includes a bonding layer over the substrate having an insulating surface, an insulating layer over the bonding layer, and a single crystal semiconductor layer over the insulating layer. The substrate having an insulating surface has a depression, and the depression is provided between one of the plurality of stacks and another adjacent one of the plurality of stacks.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: December 14, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Tetsuya Kakehata
  • Patent number: 7842584
    Abstract: There are provided a semiconductor device having a structure which can realize not only suppression of a punch-through current but also reuse of a silicon wafer used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. A semiconductor film into which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted is formed over a substrate, and a single crystal semiconductor film is bonded to the semiconductor film by an SOI technique to form a stacked semiconductor film. A channel formation region is formed using the stacked semiconductor film, thereby suppressing a punch-through current in a semiconductor device.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: November 30, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sho Kato, Fumito Isaka, Tetsuya Kakehata, Hiromichi Godo, Akihisa Shimomura
  • Publication number: 20100291753
    Abstract: A single crystal semiconductor layer is formed over a substrate having an insulating surface by the following steps: forming an ion doped layer at a given depth from a surface of a single crystal semiconductor substrate; performing plasma treatment to the surface of the single crystal semiconductor substrate; forming an insulating layer on the single crystal semiconductor substrate to which the plasma treatment is performed; bonding the single crystal semiconductor substrate to the substrate having the insulating surface with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate using the ion doped layer as a separation surface. As a result, a semiconductor substrate in which a defect in an interface between the single crystal semiconductor layer and the insulating layer is reduced can be provided.
    Type: Application
    Filed: July 21, 2010
    Publication date: November 18, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tetsuya KAKEHATA, Kazutaka KURIKI
  • Publication number: 20100237458
    Abstract: A semiconductor device and a method for manufacturing thereof are provided. The method includes a step of forming a first insulating film containing silicon and oxygen as its composition over a single-crystal semiconductor substrate, a step of forming a second insulating film containing silicon and nitrogen as its composition over the first insulating film, a step of irradiating the second insulating film with first ions to form a separation layer in the single-crystal semiconductor substrate, a step of irradiating the second insulating film with second ions so that halogen is contained in the first insulating film, and a step of performing heat treatment to separate the single-crystal semiconductor substrate with a single-crystal semiconductor film left over the supporting substrate.
    Type: Application
    Filed: June 2, 2010
    Publication date: September 23, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Tetsuya KAKEHATA
  • Patent number: 7790563
    Abstract: A semiconductor device of the present invention is manufactured by the following steps: forming a single-crystal semiconductor layer over a substrate having an insulating surface; irradiating a region of the single-crystal semiconductor layer with laser light; forming a circuit of a pixel portion using a region of the single-crystal semiconductor layer which is not irradiated with the laser light; and forming a driver circuit for driving the circuit of the pixel portion using the region of the single-crystal semiconductor layer which is irradiated with the laser light. Thus, a semiconductor device using a single-crystal semiconductor layer which is suitable for a peripheral driver circuit region and a single-crystal semiconductor layer which is suitable for a pixel region can be provided.
    Type: Grant
    Filed: July 8, 2008
    Date of Patent: September 7, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tetsuya Kakehata
  • Patent number: 7781306
    Abstract: A semiconductor device and a method for manufacturing thereof are provided. The method includes a step of forming a first insulating film containing silicon and oxygen as its composition over a single-crystal semiconductor substrate, a step of forming a second insulating film containing silicon and nitrogen as its composition over the first insulating film, a step of irradiating the second insulating film with first ions to form a separation layer in the single-crystal semiconductor substrate, a step of irradiating the second insulating film with second ions so that halogen is contained in the first insulating film, and a step of performing heat treatment to separate the single-crystal semiconductor substrate with a single-crystal semiconductor film left over the supporting substrate.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: August 24, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tetsuya Kakehata
  • Patent number: 7763502
    Abstract: A single crystal semiconductor layer is formed over a substrate having an insulating surface by the following steps: forming an ion doped layer at a given depth from a surface of a single crystal semiconductor substrate; performing plasma treatment to the surface of the single crystal semiconductor substrate; forming an insulating layer on the single crystal semiconductor substrate to which the plasma treatment is performed; bonding the single crystal semiconductor substrate to the substrate having the insulating surface with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate using the ion doped layer as a separation surface. As a result, a semiconductor substrate in which a defect in an interface between the single crystal semiconductor layer and the insulating layer is reduced can be provided.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: July 27, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Tetsuya Kakehata, Kazutaka Kuriki
  • Publication number: 20100136765
    Abstract: When printing is performed on a base substrate with a laser after a single crystal silicon layer is transferred to the base substrate, there are problems such as ablation of the single crystal silicon layer in the peripheral portion of a printed dot or attachment of glass chips or the like to the surface of the single crystal silicon layer. After printing is performed on the bonding surface of a silicon wafer with a laser, the surface of the silicon wafer is polished by CMP (chemical mechanical polishing), so that the projection in the peripheral portion of the printed dot is removed. After that, the silicon wafer is bonded to the base substrate. Since the depression of the printed dot remains to some extent by a chemical etching effect even after the polishing by CMP, the single crystal silicon layer is not transferred only at the depression portion at the time of the transfer; accordingly, the information is left on the base substrate.
    Type: Application
    Filed: November 24, 2009
    Publication date: June 3, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tetsuya KAKEHATA, Takashi KUDO
  • Patent number: 7723205
    Abstract: There is provided a semiconductor device, in which characteristics of the semiconductor device are improved by thinning a gate insulating film and a leak current can be reduced, and a manufacturing method thereof. An aluminum film which is a metal film is formed over a polycrystalline semiconductor film, and plasma oxidizing treatment is performed to the aluminum film, whereby an aluminum oxide film is formed by oxidizing the aluminum film, and a silicon oxide film is formed between the polycrystalline semiconductor film and the aluminum oxide film.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: May 25, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventor: Tetsuya Kakehata
  • Publication number: 20100120225
    Abstract: An object is to reduce occurrence of defective bonding between a base substrate and a semiconductor substrate even when a silicon nitride film or the like is used as a bonding layer. Another object is to provide a method for manufacturing an SOI substrate by which an increase in the number of steps can be suppressed.
    Type: Application
    Filed: January 25, 2010
    Publication date: May 13, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tetsuya KAKEHATA, Kazutaka KURIKI
  • Patent number: 7696058
    Abstract: An object is to reduce occurrence of defective bonding between a base substrate and a semiconductor substrate even when a silicon nitride film or the like is used as a bonding layer. Another object is to provide a method for manufacturing an SOI substrate by which an increase in the number of steps can be suppressed.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: April 13, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Kazutaka Kuriki
  • Publication number: 20100075470
    Abstract: After a single crystal semiconductor layer provided over a base substrate by attaching is irradiated with a laser beam, characteristics thereof are improved by first heat treatment, and after adding an impurity element imparting conductivity to the single crystal semiconductor layer, second heat treatment is performed at lower temperature than that of the first heat treatment.
    Type: Application
    Filed: August 31, 2009
    Publication date: March 25, 2010
    Inventors: Suguru OZAWA, Atsuo ISOBE, Takashi HAMADA, Junpei MOMO, Hiroaki HONDA, Takashi SHINGU, Tetsuya KAKEHATA
  • Patent number: 7678668
    Abstract: It is object to provide a manufacturing method of an SOI substrate provided with a single-crystal semiconductor layer, even in the case where a substrate having a low allowable temperature limit, such as a glass substrate, is used and to manufacture a high-performance semiconductor device using such an SOI substrate. Light irradiation is performed on a semiconductor layer which is separated from a semiconductor substrate and bonded to a support substrate having an insulating surface, using light having a wavelength of 365 nm or more and 700 nm or less, and a film thickness d (nm) of the semiconductor layer which is irradiated with the light is made to satisfy d=?/2n×m±? (nm), when a light wavelength is ? (nm), a refractive index of the semiconductor layer is n, m is a natural number greater than or equal to 1 (m=1, 2, 3, 4, . . . ), and 0???10 is satisfied.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: March 16, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihisa Shimomura, Hideto Ohnuma, Tetsuya Kakehata, Kenichiro Makino
  • Publication number: 20100006940
    Abstract: An object is to provide an SOI substrate provided with a semiconductor layer which can be used practically even when a glass substrate is used as a base substrate. Another object is to provide a semiconductor device having high reliability using such an SOI substrate. An altered layer is formed on at least one surface of a glass substrate used as a base substrate of an SOI substrate to form the SOI substrate. The altered layer is formed on at least the one surface of the glass substrate by cleaning the glass substrate with solution including hydrochloric acid, sulfuric acid or nitric acid. The altered layer has a higher proportion of silicon oxide in its composition and a lower density than the glass substrate.
    Type: Application
    Filed: July 6, 2009
    Publication date: January 14, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tetsuya KAKEHATA, Hideto OHNUMA, Yoshiaki YAMAMOTO, Kenichiro MAKINO
  • Patent number: 7608490
    Abstract: To provide a semiconductor device having a circuit with high operating performance and high reliability, and improve the reliability of the semiconductor device, thereby improving the reliability of an electronic device having the same. The aforementioned object is achieved by combining a step of crystallizing a semiconductor layer by irradiation with continuous wave laser beams or pulsed laser beams with a repetition rate of 10 MHz or more, while scanning in one direction; a step of photolithography with the use of a photomask or a leticle including an auxiliary pattern which is formed of a diffraction grating pattern or a semi-transmissive film having a function of reducing the light intensity; and a step of performing oxidation, nitridation, or surface-modification to the surface of the semiconductor film, an insulating film, or a conductive film, with high-density plasma with a low electron temperature.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: October 27, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tetsuya Kakehata, Hideto Ohnuma, Masaharu Nagai, Mitsuaki Osame, Masayuki Sakakura, Shigeki Komori