Patents by Inventor Tetsuya Shibayama

Tetsuya Shibayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10158869
    Abstract: A video decoding processing apparatus which can reduce overhead for the start of parallel decoding processing. The video decoding processing apparatus includes a parsing unit, and first and second video processing units. A coding bit stream including information of largest coding units each having at least a prescribed pixel size is supplied to an input terminal of the parsing unit. The parsing unit performs parsing of the syntax of the coding bit stream to thereby generate parallel-processable first and second intermediate streams from the largest coding unit. The first and second video processing units parallel-process the first and second intermediate streams generated from the parsing unit.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: December 18, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Tetsuya Shibayama, Seiji Mochizuki, Kenichi Iwata, Motoki Kimura
  • Publication number: 20180343461
    Abstract: A video encoding/decoding system includes a video encoding device, and a video decoding device. The video encoding device includes an encoding circuit for encoding an image including a diagnostic image or a normal image. The video decoding device includes a decoding circuit for decoding the image encoded in the encoding circuit, a check signal generation circuit for generating a check signal of the decoded image, a storage circuit for storing the check signal generated by the check signal generation circuit, and a comparison circuit for comparing the check signal stored in the storage circuit with the check signal generated by the check signal generation circuit. The failure is detected by comparing the check signal including an expected value stored in the storage circuit with the check signal including a comparison value generated by the check signal generation circuit by processing the same image data a plurality of times.
    Type: Application
    Filed: August 2, 2018
    Publication date: November 29, 2018
    Inventors: Seiji MOCHIZUKI, Toshiyuki KAYA, Hiroshi UEDA, Tetsuya SHIBAYAMA
  • Patent number: 10123022
    Abstract: In a picture encoding device and a picture decoding device, the access to a reference frame memory is suppressed. The picture encoding device is comprised of a first encoder for intra picture encoding, a second encoder for inter picture encoding, and an intermediate buffer. A local decoded picture generated by the first encoder is stored as a reference picture in the intermediate buffer, and the inter picture encoding by the second encoder is performed by referring to the local decoded picture in the intermediate buffer. A picture decoding device is comprised of a first decoder for intra picture decoding, a second decoder for inter picture decoding, and an intermediate buffer. A local decoded picture generated by the first decoder is stored as a reference picture in the intermediate buffer, and the inter picture decoding by the second decoder is performed by referring the local decoded picture in the intermediate buffer.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: November 6, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Toshiyuki Kaya, Seiji Mochizuki, Tetsuya Shibayama, Kenichi Iwata, Hiroshi Ueda, Ren Imaoka
  • Patent number: 10051280
    Abstract: A video encoding/decoding system includes a video encoding device and a video decoding device. The video encoding device includes an encoding part for encoding a diagnostic image or normal image. The video decoding device includes a decoding part for decoding the image encoded by the encoding part, a check signal generation part for generating a check signal of the decoded image, a storage part for storing the expected value of the check signal of the diagnostic image or the check signal generated by the check signal generation part, and a comparison part for comparing the check signal stored in the storage part with the check signal generated by the check signal generation part, in order to detect failure in all the paths from the image input part of the video encoding device to the image output part of the video decoding device.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: August 14, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Seiji Mochizuki, Toshiyuki Kaya, Hiroshi Ueda, Tetsuya Shibayama
  • Publication number: 20180213230
    Abstract: The present invention provides a video encoder and a method of operating the video encoder to implement high-precision bit rate control by reducing the risk of overflow of an intermediate buffer coupled between a quantizer and an encoding section. The intermediate buffer supplies a selection control signal indicative of whether the amount of stored data is large or small to a selector. If the selection control signal indicates large, the selector outputs an estimated code amount from a code amount estimation section to the rate controller. If the selection control signal indicates small, the selector outputs an actual code amount from the encoding section to the rate controller. The rate controller calculates the quantization scale according to the output of the selector and feedbacks the calculated quantization scale to the quantizer. The quantizer adjusts the quantizer scale.
    Type: Application
    Filed: March 23, 2018
    Publication date: July 26, 2018
    Inventors: Seiji Mochizuki, Tetsuya Shibayama
  • Patent number: 9961346
    Abstract: The present invention provides a video encoder and a method of operating the video encoder to implement high-precision bit rate control by reducing the risk of overflow of an intermediate buffer coupled between a quantizer and an encoding section. The intermediate buffer supplies a selection control signal indicative of whether the amount of stored data is large or small to a selector. If the selection control signal indicates large, the selector outputs an estimated code amount from a code amount estimation section to the rate controller. If the selection control signal indicates small, the selector outputs an actual code amount from the encoding section to the rate controller. The rate controller calculates the quantization scale according to the output of the selector and feedbacks the calculated quantization scale to the quantizer. The quantizer adjusts the quantizer scale.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: May 1, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Seiji Mochizuki, Tetsuya Shibayama
  • Publication number: 20170311001
    Abstract: An image encoding device includes an encoding circuit configured to encode an image, the image being constituted of a plurality of columns and a plurality of rows of which width are longer than the columns, generate a reference image and stores the reference image into a memory, and output a bit stream including the encoded image. The image encoding device also includes an image rotation circuit configured to rotate the image read from the memory by 90° and output the rotated image to a encoding processing circuit, and a read address generating circuit configured to read the column of the image from the memory, and provide the column with the image rotation circuit.
    Type: Application
    Filed: July 12, 2017
    Publication date: October 26, 2017
    Inventors: Seiji Mochizuki, Kazushi Akie, Tetsuya Shibayama, Kenichi Iwata
  • Publication number: 20170264820
    Abstract: A semiconductor device includes: an encoding processing unit that stores an encoded stream of an input data that is encoded based on the specified encoding control information; a buffer management unit that calculates the transmission buffer occupancy indicating the amount of data stored in a transmission buffer according to the generated data amount, and the reception buffer occupancy indicating the amount of data stored in a reception buffer, which is the destination of the encoded stream; and a control information specifying unit that, when the transmission buffer occupancy is equal to or less than a first threshold, specifies the encoding control information based on the reception buffer occupancy, and when the transmission buffer occupancy is greater than the first threshold, specifies the encoding control information to further reduce the generated data amount than in the case of equal to or less than the first threshold, to the encoding processing unit.
    Type: Application
    Filed: February 1, 2017
    Publication date: September 14, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Tetsuya SHIBAYAMA, Toshiyuki KAYA, Seiji MOCHIZUKI, Ryoji HASHIMOTO
  • Publication number: 20170118468
    Abstract: An image receiving method for a decoder, includes receiving an encoding stream multiplexed into three levels of sequence, picture, and slice, receiving an environmental information of an image receiving device and determining a parameter to be changed in the image encoding stream based on the environmental information of the image receiving device, changing a parameter at the sequence level, changing a parameter at the picture level and at the sequence level for each picture based on information indicating accuracy of image recognition, and statistical information obtained by decoding, and changing a parameter in the slice header based on the information indicating accuracy of image recognition, and the statistical information obtained by decoding.
    Type: Application
    Filed: January 9, 2017
    Publication date: April 27, 2017
    Inventors: Kenichi Iwata, Tetsuya Shibayama, Katsushige Matsubara, Ren Imaoka, Seiji Mochizuki
  • Publication number: 20170064312
    Abstract: Making effective use of an image encoder and an image decoder for processing a color image of a general-purpose standard bit depth, an image transmission device capable of transmitting/receiving a monochrome image of a higher bit depth is configured. An image transmission device includes an image encoder to encode a high bit-depth monochrome image and output encoded data and an image decoder to generate, by decoding the encoded data received via a transmission path, a high bit-depth monochrome image. The image encoder decomposes the input high bit-depth image data into plural bit planes corresponding to color image data of a standard bit depth and encodes the standard bit-depth color image data. The image decoder decodes the color image data of the standard bit depth and synthesizes, from the decoded standard bit-depth color image data, a high bit-depth monochrome image.
    Type: Application
    Filed: July 9, 2016
    Publication date: March 2, 2017
    Inventors: Tomohiro UNE, Takahiko SUGIMOTO, Kwangsoo PARK, Toshiyuki KAYA, Tetsuya SHIBAYAMA, Seiji MOCHIZUKI
  • Patent number: 9554137
    Abstract: To improve an image recognition rate by quickly changing a parameter in a proper manner without being affected by a transmission delay of an image encoding stream in an image receiving device that recognizes a decoded image obtained by decoding the received image encoding stream. The image receiving device includes a data receiving unit, a parameter changing unit, a decoding unit, and an image recognition unit. The data receiving unit receives an image encoding stream including image encoding data and the parameter. The parameter changing unit changes the parameter received by the data receiving unit, that is, the parameter specified for encoding performed by a sender, to a value suitable for image recognition performed in the subsequent stage. The decoding unit generates the image decoding data by decoding the received image encoding data according to the changed parameter. The image recognition unit performs image recognition on the image decoding data.
    Type: Grant
    Filed: June 27, 2015
    Date of Patent: January 24, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kenichi Iwata, Tetsuya Shibayama, Katsushige Matsubara, Ren Imaoka, Seiji Mochizuki
  • Publication number: 20160198174
    Abstract: A video encoding/decoding system includes a video encoding device and a video decoding device. The video encoding device includes an encoding part for encoding a diagnostic image or normal image. The video decoding device includes a decoding part for decoding the image encoded by the encoding part, a check signal generation part for generating a check signal of the decoded image, a storage part for storing the expected value of the check signal of the diagnostic image or the check signal generated by the check signal generation part, and a comparison part for comparing the check signal stored in the storage part with the check signal generated by the check signal generation part, in order to detect failure in all the paths from the image input part of the video encoding device to the image output part of the video decoding device.
    Type: Application
    Filed: October 30, 2015
    Publication date: July 7, 2016
    Inventors: Seiji MOCHIZUKI, Toshiyuki KAYA, Hiroshi UEDA, Tetsuya SHIBAYAMA
  • Publication number: 20160057432
    Abstract: Included are an encoding section, a decoding section, and an image recognition section. The encoding section performs an encoding process for a video signal to be input based on a calculated encoding mode, and transmits an encoded stream. The decoding section performs a decoding process for the received encoded stream, and outputs a decoded image. The image recognition section performs an image recognition process for the decoded image. The encoding section adjusts the encoding mode based on recognition accuracy information representing the certainty of a recognition result in the image recognition section.
    Type: Application
    Filed: August 19, 2015
    Publication date: February 25, 2016
    Inventors: Tetsuya SHIBAYAMA, Seiji MOCHIZUKI, Katsushige MATSUBARA, Kenichi IWATA
  • Publication number: 20160029021
    Abstract: To improve an image recognition rate by quickly changing a parameter in a proper manner without being affected by a transmission delay of an image encoding stream in an image receiving device that recognizes a decoded image obtained by decoding the received image encoding stream. The image receiving device includes a data receiving unit, a parameter changing unit, a decoding unit, and an image recognition unit. The data receiving unit receives an image encoding stream including image encoding data and the parameter. The parameter changing unit changes the parameter received by the data receiving unit, that is, the parameter specified for encoding performed by a sender, to a value suitable for image recognition performed in the subsequent stage. The decoding unit generates the image decoding data by decoding the received image encoding data according to the changed parameter. The image recognition unit performs image recognition on the image decoding data.
    Type: Application
    Filed: June 27, 2015
    Publication date: January 28, 2016
    Inventors: Kenichi IWATA, Tetsuya SHIBAYAMA, Katsushige MATSUBARA, Ren IMAOKA, Seiji MOCHIZUKI
  • Publication number: 20160007025
    Abstract: In a picture encoding device and a picture decoding device, the access to a reference frame memory is suppressed. The picture encoding device is comprised of a first encoder for intra picture encoding, a second encoder for inter picture encoding, and an intermediate buffer. A local decoded picture generated by the first encoder is stored as a reference picture in the intermediate buffer, and the inter picture encoding by the second encoder is performed by referring to the local decoded picture in the intermediate buffer. A picture decoding device is comprised of a first decoder for intra picture decoding, a second decoder for inter picture decoding, and an intermediate buffer. A local decoded picture generated by the first decoder is stored as a reference picture in the intermediate buffer, and the inter picture decoding by the second decoder is performed by referring the local decoded picture in the intermediate buffer.
    Type: Application
    Filed: June 24, 2015
    Publication date: January 7, 2016
    Inventors: Toshiyuki KAYA, Seiji MOCHIZUKI, Tetsuya SHIBAYAMA, Kenichi IWATA, Hiroshi UEDA, Ren IMAOKA
  • Publication number: 20150117549
    Abstract: The present invention is directed to reduce deterioration in parallel processing capability. In a moving-picture decoding processing apparatus, information of a first plurality of frames and a second plurality of frames is supplied from a decoding control unit to first and second decoding processing units. For decoding the information from an intermediate point to an end point of a second preceding frame by the second decoding unit in a third period, use of a result of the process of the first decoding processing unit in the third period is inhibited, and use of a result of the process of a first preceding frame by the first decoding processing unit in a second period is permitted by an end signal.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 30, 2015
    Inventors: Katsushige MATSUBARA, Seiji MOCHIZUKI, Toshiyuki KAYA, Tetsuya SHIBAYAMA
  • Publication number: 20150092849
    Abstract: Disclosed is a video decoding processing apparatus which can reduce overhead for the start of parallel decoding processing. The video decoding processing apparatus includes a parsing unit, and first and second video processing units. A coding bit stream including information of largest coding units each having at least a prescribed pixel size is supplied to an input terminal of the parsing unit. The parsing unit performs parsing of the syntax of the coding bit stream to thereby generate parallel-processable first and second intermediate streams from the largest coding unit. The first and second video processing units parallel-process the first and second intermediate streams generated from the parsing unit.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 2, 2015
    Inventors: Tetsuya Shibayama, Seiji Mochizuki, Kenichi Iwata, Motoki Kimura
  • Publication number: 20150092840
    Abstract: The present invention provides a video encoder and a method of operating the video encoder to implement high-precision bit rate control by reducing the risk of overflow of an intermediate buffer coupled between a quantizer and an encoding section. The intermediate buffer supplies a selection control signal indicative of whether the amount of stored data is large or small to a selector. If the selection control signal indicates large, the selector outputs an estimated code amount from a code amount estimation section to the rate controller. If the selection control signal indicates small, the selector outputs an actual code amount from the encoding section to the rate controller. The rate controller calculates the quantization scale according to the output of the selector and feedbacks the calculated quantization scale to the quantizer. The quantizer adjusts the quantizer scale.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 2, 2015
    Inventors: Seiji Mochizuki, Tetsuya Shibayama
  • Patent number: 8516888
    Abstract: Disclosed is an angular velocity sensor. The angular velocity sensor includes a first layer, a piezoelectric layer, and a second layer. The first layer has a first main surface and a second main surface, and includes a vibrator portion and a base portion that supports the vibrator portion. The piezoelectric layer is formed on the first main surface of the first layer. The second layer is integrally bonded to the base portion on a side of the second main surface of the first layer.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: August 27, 2013
    Assignee: Sony Corporation
    Inventors: Junichi Honda, Teruo Inaguma, Tetsuya Shibayama
  • Publication number: 20120294373
    Abstract: The moving image encoding method includes encoding macro-blocks included in a landscape picture frame of a moving image having a larger horizontal width in a horizontal direction than a vertical width in a vertical direction by an encoding device. In macro-block encoding, information of the encoded macro-blocks surrounding a macro-block to be encoded is stored in a built-in information storing memory of the encoding device. Further, in the encoding, first a vertical array of macro-blocks at the left end of the horizontal width of the landscape picture frame are encoded sequentially, and the resultant encode information is stored in the information storing memory, and subsequently an adjacent vertical array of the plural macro-blocks located horizontally on the right of the left end of the horizontal width of the landscape picture frame are encoded sequentially.
    Type: Application
    Filed: December 14, 2010
    Publication date: November 22, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Seiji Mochizuki, Kazushi Akie, Tetsuya Shibayama, Kenichi Iwata