Abstract: The present invention provides a functional block that executes video coding and video decoding based on H. 264/AVC. The functional block includes two moving picture processing units, and a memory unit that stores therein data related to the results of processing of first plural macroblocks arranged within one row of one picture by the first moving picture processing unit. Data related to the results of processing of plural adjacent macroblocks, which are selected from the data stored in the memory unit, are transferred to the second moving picture processing unit. The second moving picture processing unit performs processing of one macroblock of second plural macroblocks arranged in the following row, using the transferred data.

Abstract: The present invention provides a functional block that executes video coding and video decoding based on H.264/AVC. The functional block includes two moving picture processing units, and a memory unit that stores therein data related to the results of processing of first plural macroblocks arranged within one row of one picture by the first moving picture processing unit. Data related to the results of processing of plural adjacent macroblocks, which are selected from the data stored in the memory unit, are transferred to the second moving picture processing unit. The second moving picture processing unit performs processing of one macroblock of second plural macroblocks arranged in the following row, using the transferred data.

Abstract: Disclosed is an angular velocity sensor. The angular velocity sensor includes a first layer, a piezoelectric layer, and a second layer. The first layer has a first main surface and a second main surface, and includes a vibrator portion and a base portion that supports the vibrator portion. The piezoelectric layer is formed on the first main surface of the first layer. The second layer is integrally bonded to the base portion on a side of the second main surface of the first layer.

Abstract: The present invention provides a functional block that executes video coding and video decoding based on H.264/AVC. The functional block includes two moving picture processing units, and a memory unit that stores therein data related to the results of processing of first plural macroblocks arranged within one row of one picture by the first moving picture processing unit. Data related to the results of processing of plural adjacent macroblocks, which are selected from the data stored in the memory unit, are transferred to the second moving picture processing unit. The second moving picture processing unit performs processing of one macroblock of second plural macroblocks arranged in the following row, using the transferred data.

Abstract: To provide a technique to reduce power consumption when carrying out image processing by processors. For the purpose of this, for example, a means for specifying a two-dimensional source register and destination register is provided in an operand of an instruction, and the processor includes a means which executes calculation using a plurality of source registers in a plurality of cycles and obtains a plurality of destinations. Moreover, in an instruction to obtain a destination using a plurality of source registers and consuming a plurality of cycles, a data rounding processing part is connected to a final stage of a pipeline. With such configurations, the power consumed when reading an instruction memory is reduced by reducing the access frequency to the instruction memory, for example.

Abstract: Disclosed herein is an encryption and decryption communication semiconductor device comprising at least, a communication interface for performing a transfer of data according to a predetermined communication system, one or two or more encryption/decryption circuits which encrypt or decrypt input data in accordance with a predetermined algorithm, and a plurality of external interfaces for performing the input/output of data from and to external devices. The communication interface, the encryption/decryption circuits and the plurality of external interfaces are formed on one semiconductor chip. In the cryption and decryption communication semiconductor device, input data sent from any one of the plurality of external interfaces is encrypted or decrypted by at least one of the encryption/decryption circuits and is capable of being outputted to any different one of the plurality of external interfaces.

Abstract: An image coding unit and an image coding method which assure high speed and high image quality with a simple structure. For coding plural sub macroblocks into which a macroblock to be coded is divided, plural types of virtual predicted image data are generated using target image data to be coded in a sub macroblock concerned and an adjacent sub macroblock, and intra-frame prediction mode decision information to select the most suitable virtual predicted image data of one type from among the plural types of virtual predicted image data is generated. According to this prediction mode decision information, real predicted image data is generated by intra-frame prediction operation using reference image data in the adjacent sub macroblock, and difference from the target image data is coded.

Abstract: In an authentication communicating semiconductor device to enhance protection against illegal copying, a logic analyzer probe or the like is connected to a CPU bus to suppress possibility in which the authentication process is intercepted and is analyzed to break the mechanism of illegal copy protection and the electronic device is modified to set a tampered encryption key to the CPU bus. The authentication communicating semiconductor device includes a semiconductor chip, a main processing unit formed on the chip for generating a key code according to a predetermined algorithm, for determining approval/non-approval of communication of data with an external device, and for controlling the communication; an encryption unit formed on the chip for encrypting and decoding communication data using the key code generated by the main processing unit, and an interface unit formed on the chip for conducting communication with an upper-layer or a lower-layer according to a predetermined protocol.

Abstract: Disclosed herein is a cryption and decryption communication semiconductor device comprising at least, a communication interface for performing a transfer of data according to a predetermined communication system, one or two or more encryption/decryption circuits which encrypt or decrypt input data in accordance with a predetermined algorithm, and a plurality of external interfaces for performing the input/output of data from and to external devices. The communication interface, the encryption/decryption circuits and the plurality of external interfaces are formed on one semiconductor chip. In the cryption and decryption communication semiconductor device, input data sent from any one of the plurality of external interfaces is encrypted or decrypted by at least one of the encryption/decryption circuits and is capable of being outputted to any different one of the plurality of external interfaces.

Abstract: In an authentication communicating semiconductor device to enhance protection against illegal copying, a logic analyzer probe or the like is connected to a CPU bus to suppress possibility in which the authentication process is intercepted and is analyzed to break the mechanism of illegal copy protection and the electronic device is modified to set a tampered encryption key to the CPU bus. The authentication communicating semiconductor device includes a semiconductor chip, a main processing unit formed on the chip for generating a key code according to a predetermined algorithm, for determining approval/non-approval of communication of data with an external device, and for controlling the communication; an encryption unit formed on the chip for encrypting and decoding communication data using the key code generated by the main processing unit, and an interface unit formed on the chip for conducting communication with an upper-layer or a lower-layer according to a predetermined protocol.