Abstract: A solid-state image pickup device includes a semiconductor substrate including a substrate main body having P-type impurities and a first N-type semiconductor layer provided on the substrate main body, an image pickup area including a plurality of photoelectric converters in which the plurality of photoelectric converters include second N-type semiconductor layers, the second N-type semiconductor layers being provided on a surface portion of the first N-type semiconductor layer independently of one another, and a first peripheral circuit area including a first P-type semiconductor layer formed on the first N-type semiconductor layer. The solid-state image pickup device further includes a second peripheral circuit area including a second P-type semiconductor layer formed on the first N-type semiconductor layer and connected to the substrate main body.

Abstract: A cleaning device is provided with a cleaning unit (35) disposed downstream from a position at which a toner image is transferred to a paper. The cleaning unit (35) is provided with a cleaning blade (35c) for scraping off residual toner attached to an image bearing member and a toner catching sheet (35e) for preventing the residual toner or paper dust which have been scraped off from falling outside the cleaning unit. The free length in the toner catching sheet (35e) between affixed positions of a first end portion which is affixed to the cleaning unit (35) and a second end portion which abuts an outer circumferential portion of the image bearing member is determined by an amount of paper dust buildup on the outer circumferential portion of the image bearing member.

Abstract: A solid-state image sensing device including an image sensing region in which a matrix of unit pixels, each including a photodiode in a surface portion of a semiconductor substrate, is provided; a read transistor connected between a respective photodiode and a detection node; an amplifying transistor connected to the detection node so as to amplify the signal charge output to the detection node and to output a pixel signal to a signal output line reading out the pixel signal output; a reset transistor connected to the detection node and to a discharge node; and an address transistor connected to a source of the amplifying transistor for selecting an address of the photodiode when an address signal is supplied to a gate.

Abstract: A solid-state image pickup device comprising a semiconductor substrate which comprises a substrate body containing P-type impurities and a first N-type semiconductor layer containing N-type impurities, the first N-type semiconductor layer being provided on the substrate body, and including a first P-type semiconductor layer which contains p-type impurities, and which is located on the substrate body, a plurality of optical/electrical conversion portions formed of second N-type semiconductor layers which are provided independently of each other in respective positions in a surface portion of the first N-type semiconductor layer, and a plurality of second P-type semiconductor layers which are formed to surround the optical/electrical conversion portions, which are provided along element isolation regions provided in respective positions in the surface portion of the first N-type semiconductor layer, and which continuously extend from the surface portion of the first N-type semiconductor layer to a surface porti

Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.

Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.

Abstract: Each of the unit cells provided on a semiconductor substrate of a solid-state imaging device comprises a first p-type well which isolates the semiconductor substrate into an n-type photoelectric conversion region, a second p-type well which is formed in the surface of the photoelectric conversion region and in which a signal scanning circuit section is formed, and a signal storage section which is comprised of a highly doped n-type layer which is formed in the surface of the photoelectric conversion region apart from the second p-type well and higher in impurity concentration than the photoelectric conversion region. The signal storage section having its part placed under a signal readout gate adapted to transfer a packet of signal charge from the storage section to the signal scanning circuit section and its part at which the potential becomes deepest located under the readout gate.

Abstract: A mobile communication terminal comprises an information managing portion 1, and a nonvolatile storing medium 2 attached to the information managing portion 1, and the nonvolatile storing medium 2 has a plurality of memory areas for storing same information items in sequence. According to this configuration, when storing of the information items, e.g., the time information, etc., whose access frequency is high are updated by using the nonvolatile storing medium, the burden imposed on the nonvolatile storing medium can be reduced by using different areas. Thus, the information items having a high updating frequency, e.g., the time information, etc. can be stored in the nonvolatile storing medium whose lifetime is short and then employed.

Abstract: A method of designing a wiring structure of an LSI is capable of reducing a capacitance variation ratio ?C/C or a resistance-by-capacitance variation ratio ?(RC)/(RC) of the wiring structure.

Abstract: A wiring structure of a semiconductor device, includes a wiring layer formed on an insulating film, a width (W) of each wire in the wiring layer and a thickness (H) of the insulating film satisfying “W/H<1” a length (L) of each wiring in the wiring layer being equal to or longer than 1 mm.

Abstract: A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface of the substrate. The first and second impurity areas are formed in the surface of the substrate and sandwich a region under the first gate electrode. A third impurity area of a second conductivity type is formed in the surface of the substrate and spaced from the second impurity area at an opposite side to the first gate electrode. A fourth impurity area is formed under the second impurity area and connected to the third impurity area. A second gate electrode is provided above the substrate. A fifth impurity area of the second conductivity type is formed in the surface of the substrate. The third and fifth impurity areas sandwich a region under the second gate electrode.

Abstract: A solid-state image sensing device including an image sensing region in which a matrix of unit pixels, each including a photodiode in a surface portion of a semiconductor substrate, is provided; a read transistor connected between a respective photodiode and a detection node; an amplifying transistor connected to the detection node so as to amplify the signal charge output to the detection node and to output a pixel signal to a signal output line reading out the pixel signal output; a reset transistor connected to the detection node and to a discharge node; and an address transistor connected to a source of the amplifying transistor for selecting an address of the photodiode when an address signal is supplied to a gate.

Abstract: A solid-state imaging device comprises an image pickup unit having unit cells including opto-electrical converter elements, said unit cells being disposed in a two-dimensional array, a selection line made of polysilicon for selectively determining the unit cells in the same row within the image pickup unit, a read-out line made of polysilicon for reading out an electric charge accumulated in the opto-electrical converter elements of the unit cells in the same row within the image pickup unit, a signal line transmitting pixel signals produced from the unit cells in the same row within the image pickup unit, a reset line made of polysilicon for discharging the unit cells in the same row within the image pickup unit down to a desired voltage level, a driver circuit located on one side of the image pickup unit for supplying drive signals to the read-out line, the selection line, and the reset line, respectively, and a read-out auxiliary wiring disposed along at least the read-out line and electrically connected t

Abstract: A ferroelectric semiconductor memory includes a cell array in which a plurality of ferroelectric memory cells are arranged in a matrix format, and a circuit section. Each memory cell includes a field-effect transistor and a capacitor formed as a gate electrode section of the field-effect transistor and having a stacked structure of metal film/ferroelectric film/metal film. The circuit section selectively executes a read mode, program mode, and erase mode for performing data read, programming, and erase to the memory cells, and a rewrite mode for rewriting data stored in each memory cell.

Abstract: First characteristic values (SS, FF) which fluctuate most of the characteristic of a device composing a semiconductor device are obtained according to a fluctuation of manufacturing process for the semiconductor device. Next, the width (optimized K value) of a fluctuation width of manufacturing process which matches second characteristic values (C1, C16) of the worst cases of the characteristic of this device with the first characteristic values (SS, FF) is determined. Finally, a third characteristic value of the worst case of the circuit characteristic of the semiconductor device is determined based on this fluctuation width (optimized K value).

Abstract: A solid-state imaging device, comprises an image pickup unit having unit cells including opto-electrical converter elements, said unit cells being disposed in two-dimensional array, a selection line made of polysilicon for selectively determining the unit cells in the same row within the image pickup unit, a read-out line made of polysilicon for reading out electric charge accumulated in the opto-electrical converter elements of the unit cells in the same row within the image pickup unit, a signal line transmitting pixel signals produced from the unit cells in the same row within the image pickup unit, a reset line made of polysilicon for discharging the unit cells in the same row within the image pickup unit down to the desired voltage level, a driver circuit located on one side of the image pickup unit for supplying drive signals to the read-out line, the selection line, and the reset line, respectively, and a read-out auxiliary wiring disposed along at least the read-out line and electrically connected to

Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.

Abstract: In the disclosed invention, the influence of the dispersions of the gate lengths and the gate widths is prevented from adversely affecting circuit parameters except for the specific circuit parameter. According to this invention, the circuit parameters can be correctly extracted, and circuit characteristics can be accurately predicted.

Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.

Abstract: A solid state imaging device comprises a plurality of unit cells formed in a surface region of a semiconductor substrate. Each of the unit cells comprises a photoelectric converter, an MOS-type read-out transistor for reading a signal from the photoelectric converter, an MOS-type amplifying transistor having a gate connected to a drain of the read-out transistor and for amplifying the signal read by the read-out transistor, a reset transistor having a source connected to the drain of the read-out transistor and for resetting a potential of a gate of the amplifying transistor, and an addressing element connected in series to the amplifying transistor and for selecting the unit cell. The read-out transistor is formed in a first device region in the semiconductor substrate. The reset transistor is formed in a second device region in the semiconductor substrate.