Patents by Inventor Tetsuzo Ueda

Tetsuzo Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050272224
    Abstract: The present invention aims at providing a method for dividing a substrate that is capable of dividing each substrate into chips in the same square-like form without causing chip breaking and capable of forming all cleaved facets flat. In the method for dividing a substrate of the present invention, an electron beam 1 with the intensity that causes a dislocation inside the substrate is irradiated to a substrate surface 2 to generate a crack starting from such dislocation, and a cleaved facet 5 is formed to divide the substrate.
    Type: Application
    Filed: June 7, 2005
    Publication date: December 8, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd
    Inventors: Tetsuzo Ueda, Daisuke Ueda
  • Publication number: 20050269577
    Abstract: The present invention is conceived in order to accomplish an object of providing a surface treatment method and a surface treatment device that can planarize, at high speed, the surface of a nitride semiconductor with an excellent evenness. The surface treatment device includes an electrolyte supply port 15 for supplying a KOH electrolyte 14 containing fine metal particles and an abrasive, a storage container 40 having an opening on the top surface and is for storing the KOH electrolyte 14 supplied from the electrolyte supply port 15, a wafer holder 12 for fixing the GaN substrate 11 and bringing the surface of the GaN substrate 11 into contact with the KOH electrolyte 14 by impregnating the surface of the substrate into the KOH electrolyte 14 in the storage container 40 from above, a load 13 placed on the wafer holder 12, a device housing 16, a polishing pad 17 for polishing the surface of the GaN substrate 11 and an ultraviolet light source 42.
    Type: Application
    Filed: June 7, 2005
    Publication date: December 8, 2005
    Applicant: Matsushita Electric Industrial co., Ltd.
    Inventors: Tetsuzo Ueda, Daisuke Ueda
  • Publication number: 20050218414
    Abstract: 4H-InGaAlN alloy based optoelectronic and electronic devices on non-polar face are formed on 4H-AlN or 4H-AlGaN on (11-20) a-face 4H-SiC substrates. Typically, non polar 4H-AlN is grown on 4H-SiC (11-20) by molecular beam epitaxy (MBE). Subsequently, III-V nitride device layers are grown by metal organic chemical vapor deposition (MOCVD) with 4H-polytype for all of the layers. The non-polar device does not contain any built-in electric field due to the spontaneous and piezoelectric polarization. The optoelectonic devices on the non-polar face exhibits higher emission efficiency with shorter emission wavelength because the electrons and holes are not spatially separated in the quantum well. Vertical device configuration for lasers and light emitting diodes(LEDs) using conductive 4H-AlGaN interlayer on conductive 4H-SiC substrates makes the chip size and series resistance smaller. The elimination of such electric field also improves the performance of high speed and high power transistors.
    Type: Application
    Filed: March 30, 2004
    Publication date: October 6, 2005
    Inventors: Tetsuzo Ueda, Tsunenobu Kimoto, Hiroyuki Matsunami, Jun Suda, Norio Onojima
  • Publication number: 20050199901
    Abstract: A spacer layer is formed on a single-crystal substrate and an epitaxially grown layer composed of a group III-V compound semiconductor layer containing a nitride or the like is further formed on the spacer layer. The epitaxially grown layer is adhered to a recipient substrate. The back surface of the single-crystal substrate is irradiated with a light beam such as a laser beam or a bright line spectrum from a mercury vapor lamp such that the epitaxially grown layer and the single-crystal substrate are separated from each other. Since the forbidden band of the spacer layer is smaller than that of the single-crystal substrate, it is possible to separate the thin semiconductor layer from the substrate by decomposing or fusing the spacer layer, while suppressing the occurrence of a crystal defect or a crack in the epitaxially grown layer.
    Type: Application
    Filed: February 10, 2005
    Publication date: September 15, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tetsuzo Ueda
  • Publication number: 20050184298
    Abstract: A white light source has an excitation light source and a white light emitting element provided at a position which allows the transmission of light from the excitation light source to generate white light through irradiation with the light from the excitation light source. The white light emitting element has a sapphire substrate made of sapphire or the like which transmits visible light, an InGaAlN semiconductor layer formed on a surface of the sapphire substrate to emit red light through irradiation with visible light, and a fluorescent layer formed on the surface opposite to the surface provided with the semiconductor layer to emit yellow light or green light through irradiation with visible light.
    Type: Application
    Filed: February 18, 2005
    Publication date: August 25, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Tetsuzo Ueda
  • Publication number: 20050184305
    Abstract: A semiconductor light emitting device is composed of a blue light emitting diode, a red light emitting layer grown epitaxially on the blue light emitting diode, and an insulating material containing a YAG fluorescent material. The red light emitting layer is made of, e.g., undoped In0.4Ga0.6N having a forbidden band width of 1.9 eV and formed on a p-type semiconductor layer to have a configuration consisting of a plurality of mutually spaced-apart islands.
    Type: Application
    Filed: February 18, 2005
    Publication date: August 25, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tetsuzo Ueda
  • Publication number: 20050159000
    Abstract: A method for fabricating a nitride semiconductor element according to the present invention comprises the steps of: forming a nitride semiconductor layer 13 on a base substrate 11; forming, on part of the upper surface of the nitride semiconductor layer 13, a conductive film 14 made of an electron emitting layer 14b and a dry etching mask layer 14a from bottom to top; performing dry etching on the nitride semiconductor layer 13; and performing wet etching on the nitride semiconductor layer 13 by emitting electrons from the nitride semiconductor layer 13 through the conductive film 14 to the outside.
    Type: Application
    Filed: December 22, 2004
    Publication date: July 21, 2005
    Inventors: Hiroshi Ohno, Satoshi Tamura, Tetsuzo Ueda
  • Patent number: 6919641
    Abstract: A semiconductor device includes: a substrate having in its principal surface first and second recessed portions formed adjacent to each other; and first and second semiconductor laser chips each having a portion that is inserted in one of the recessed portions. The depth of the recessed portions is smaller than the height of the first and second semiconductor laser chips that are disposed in the recessed portions.
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: July 19, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazutoshi Onozawa, Tetsuzo Ueda, Daisuke Ueda
  • Patent number: 6887770
    Abstract: A polymer film including an adhesive layer, which can be peeled off with heat, is bonded to the upper surface of a semiconductor layer. Then, a KrF excimer laser light beam is applied to a surface of a substrate opposite to the semiconductor layer. This causes local heating at the laser spot, so that the bonding of atoms is cut off at the interface between the semiconductor layer and the substrate, thereby forming a thermal decomposition layer between the substrate and the semiconductor layer. Subsequently, the substrate is heated at a given temperature, so that the adhesive layer foams to lose its adhesive power. As a result, the polymer film is easily peeled off from the semiconductor layer.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: May 3, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuzo Ueda, Masahiro Ishida, Masaaki Yuri
  • Patent number: 6881261
    Abstract: A p-type InGaAlN layer, an InGaAlN active layer, and an n-type InGaAlN layer each having a composition represented by (AlxGa1-x)yIn1-yN (0?x?1, 0?y?1) are formed on a sapphire substrate. In the as-grown state, Mg is bonded to hydrogen atoms in the p-type InGaAlN layer. Then, the back surface of the sapphire substrate is irradiated with a laser beam in a nitrogen atmosphere. The resistance of the p-type InGaAlN layer is reduced by removing hydrogen therefrom with irradiation with a weak laser beam. During the irradiation with the laser beam, the diffusion of a dopant in a multilayer portion is suppressed such that a dopant profile retains sharpness. It is also possible to separate the sapphire substrate from the multilayer portion by subsequently using an intense laser beam for irradiation.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: April 19, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tetsuzo Ueda
  • Publication number: 20050051790
    Abstract: A phosphor that emits white light due to excitation by a light emitting diode capable of emitting blue or ultraviolet light includes: a substrate that allows transmission of visible light; and a semiconductor layer formed on the substrate.
    Type: Application
    Filed: June 4, 2004
    Publication date: March 10, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tetsuzo Ueda
  • Patent number: 6861335
    Abstract: A spacer layer is formed on a single-crystal substrate and an epitaxially grown layer composed of a group III-V compound semiconductor layer containing a nitride or the like is further formed on the spacer layer. The epitaxially grown layer is adhered to a recipient substrate. The back surface of the single-crystal substrate is irradiated with a light beam such as a laser beam or a bright line spectrum from a mercury vapor lamp such that the epitaxially grown layer and the single-crystal substrate are separated from each other. Since the forbidden band of the spacer layer is smaller than that of the single-crystal substrate, it is possible to separate the thin semiconductor layer from the substrate by decomposing or fusing the spacer layer, while suppressing the occurrence of a crystal defect or a crack in the epitaxially grown layer.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: March 1, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tetsuzo Ueda
  • Publication number: 20050042788
    Abstract: A light emitting layer made of a group III-V nitride semiconductor is formed between a first semiconductor layer made of an n-type group III-V nitride semiconductor and a second semiconductor layer made of a p-type group III-V nitride semiconductor. In side portions of the second semiconductor layer, oxidized regions are formed through the oxidization of the second semiconductor layer itself so as to be spaced apart from each other in the direction parallel to the plane of the light emitting layer. A p-side electrode is formed across the entire upper surface of the second semiconductor layer including the oxidized regions, and an n-side electrode is formed on one surface of the first semiconductor layer that is away from the second semiconductor layer.
    Type: Application
    Filed: September 22, 2004
    Publication date: February 24, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tetsuzo Ueda
  • Publication number: 20050029646
    Abstract: The object of the present invention is to provide a semiconductor device and a method for dividing a substrate which are capable of preventing chips from breaking and manufacturing chips in a reproducible square-like form. After the surface of the epitaxial growth layer 2 of the end part of the nitride semiconductor wafer is linear-scanned a plurality of times by the electron beam 3 so that scanning lines are parallel, the scribe line 4 is formed. Then, the edge jig 5 is put on the scribe line 4. And, the back surface of the SiC substrate 1 is pressed by the edge jig 6.
    Type: Application
    Filed: August 6, 2004
    Publication date: February 10, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuzo Ueda, Daisuke Ueda
  • Publication number: 20050029531
    Abstract: A semiconductor device, which includes an active layer made of a first semiconductor layer formed on a substrate, is designed so that a first oxidized area made of an oxide layer is formed on the active layer.
    Type: Application
    Filed: August 6, 2004
    Publication date: February 10, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Nakayama, Tetsuzo Ueda, Masaaki Yuri, Toshiyuki Takizawa
  • Publication number: 20040235210
    Abstract: A method for fabricating semiconductor devices forms a semiconductor layer containing a positive layer on a mother substrate and then forms a metal layer on the semiconductor layer. After forming the metal layer, the method separates the mother substrate from the semiconductor layer and then removes a desired region of the metal layer from the exposed surface of the semiconductor layer from which the mother substrate has been separated to form a plurality of mutually separated semiconductor devices each containing the semiconductor layer.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 25, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO. LTD.
    Inventors: Satoshi Tamura, Tetsuzo Ueda
  • Publication number: 20040188693
    Abstract: A semiconductor device has a substrate, a first Group III nitride semiconductor layer formed on the substrate, a first oxide layer formed in proximity to the upper portions of defects present in the first Group III nitride semiconductor layer, and a second Group III nitride semiconductor layer including a positive layer and formed over each of the first Group III nitride semiconductor layer and the first oxide layer.
    Type: Application
    Filed: March 25, 2004
    Publication date: September 30, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hisashi Nakayama, Tetsuzo Ueda, Masaaki Yuri
  • Patent number: 6797532
    Abstract: A light emitting layer made of a group III-V nitride semiconductor is formed between a first semiconductor layer made of an n-type group III-V nitride semiconductor and a second semiconductor layer made of a p-type group III-V nitride semiconductor. In side portions of the second semiconductor layer, oxidized regions are formed through the oxidization of the second semiconductor layer itself so as to be spaced apart from each other in the direction parallel to the plane of the light emitting layer. A p-side electrode is formed across the entire upper surface of the second semiconductor layer including the oxidized regions, and an n-side electrode is formed on one surface of the first semiconductor layer that is away from the second semiconductor layer.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: September 28, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tetsuzo Ueda
  • Patent number: 6768135
    Abstract: A method for forming an epitaxial layer involves depositing a buffer layer on a substrate by a first deposition process, followed by deposition of an epitaxial layer by a second deposition process. By using such a dual process, the first and second deposition processes can be optimized, with respect to performance, growth rate, and cost, for different materials of each layer. A semiconductor heterostructure prepared by a dual deposition process includes a buffer layer formed on a substrate by MOCVD, and an epitaxial layer formed on the buffer layer, the epitaxial layer deposited by hydride vapor-phase deposition.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: July 27, 2004
    Assignees: CBL Technologies, Inc., Matsushita Electric Industrial Co., Ltd
    Inventors: Glenn S. Solomon, David J. Miller, Tetsuzo Ueda
  • Publication number: 20040140474
    Abstract: A light-emitting device includes an element structure including at least two semiconductor layers having mutually different conductivity types. A transparent p-side electrode of ITO is formed on the element structure. A bonding pad is formed on a region of the p-side electrode. An n-side electrode made of Ti/Au is formed on the surface of the element structure opposite to the p-side electrode. A metal film made of gold plating with a thickness of about 50 &mgr;m is formed, using an Au layer in the n-side electrode as an underlying layer.
    Type: Application
    Filed: June 23, 2003
    Publication date: July 22, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tetsuzo Ueda, Masaaki Yuri