Patents by Inventor Thomas F. Kuech

Thomas F. Kuech has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10192740
    Abstract: A reactor for growing or depositing semiconductor films or devices. The reactor may be designed for inline production of III-V materials grown by hydride vapor phase epitaxy (HVPE). The operating principles of the HVPE reactor can be used to provide a completely or partially inline reactor for many different materials. An exemplary design of the reactor is shown in the attached drawings. In some instances, all or many of the pieces of the reactor formed of quartz, such as welded quartz tubing, while other reactors are made from metal with appropriate corrosion resistant coatings such as quartz or other materials, e.g., corrosion resistant material, or stainless steel tubing or pipes may be used with a corrosion resistant material useful with HVPE-type reactants and gases. Using HVPE in the reactor allows use of lower-cost precursors at higher deposition rates such as in the range of 1 to 5 ?m/minute.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: January 29, 2019
    Assignees: Alliance for Sustainable Energy, LLC, Wisconsin Alumni Research Foundation
    Inventors: David L. Young, Aaron Joseph Ptak, Thomas F. Kuech, Kevin Schulte, John D. Simon
  • Publication number: 20180025902
    Abstract: A reactor for growing or depositing semiconductor films or devices. The reactor may be designed for inline production of III-V materials grown by hydride vapor phase epitaxy (HVPE). The operating principles of the HVPE reactor can be used to provide a completely or partially inline reactor for many different materials. An exemplary design of the reactor is shown in the attached drawings. In some instances, all or many of the pieces of the reactor formed of quartz, such as welded quartz tubing, while other reactors are made from metal with appropriate corrosion resistant coatings such as quartz or other materials, e.g., corrosion resistant material, or stainless steel tubing or pipes may be used with a corrosion resistant material useful with HVPE-type reactants and gases. Using HVPE in the reactor allows use of lower-cost precursors at higher deposition rates such as in the range of 1 to 5?m/minute.
    Type: Application
    Filed: September 18, 2017
    Publication date: January 25, 2018
    Inventors: David L. Young, Aaron Joseph Ptak, Thomas F. Kuech, Kevin Schulte, John D. Simon
  • Patent number: 9824890
    Abstract: A reactor for growing or depositing semiconductor films or devices. The reactor may be designed for inline production of III-V materials grown by hydride vapor phase epitaxy (HVPE). The operating principles of the HVPE reactor can be used to provide a completely or partially inline reactor for many different materials. An exemplary design of the reactor is shown in the attached drawings. In some instances, all or many of the pieces of the reactor formed of quartz, such as welded quartz tubing, while other reactors are made from metal with appropriate corrosion resistant coatings such as quartz or other materials, e.g., corrosion resistant material, or stainless steel tubing or pipes may be used with a corrosion resistant material useful with HVPE-type reactants and gases. Using HVPE in the reactor allows use of lower-cost precursors at higher deposition rates such as in the range of 1 to 5 ?m/minute.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: November 21, 2017
    Assignees: Alliance for Sustainable Energy, LLC, Wisconsin Alumni Research Foundation
    Inventors: David L. Young, Aaron Joseph Ptak, Thomas F. Kuech, Kevin Schulte, John D. Simon
  • Publication number: 20160138182
    Abstract: Provided are methods for forming a mixed metal oxide epitaxial film (e.g., ScAlMgO4) comprising growing an amorphous layer of a mixed metal oxide on a substrate (e.g., crystalline sapphire) via atomic layer deposition and annealing the amorphous layer of the mixed metal oxide at an elevated temperature for a period of time sufficient to induce epitaxial solid-state re-growth of the amorphous layer of the mixed metal oxide, thereby forming the mixed metal oxide epitaxial film. The method may further comprise growing a layer of a semiconductor (e.g., GaN) on the mixed metal oxide epitaxial film.
    Type: Application
    Filed: November 18, 2014
    Publication date: May 19, 2016
    Inventor: Thomas F. Kuech
  • Publication number: 20160025927
    Abstract: Methods for the fabrication of orientation-patterned semiconductor structures are provided. The structures are light-waveguiding structures for nonlinear frequency conversion. The structures are periodically poled semiconductor heterostructures comprising a series of material domains disposed in a periodically alternating arrangement along the optical propagation axis of the waveguide. The methods of fabricating the orientation-patterned structures utilize a series of surface planarization steps at intermediate stages of the heterostucture growth process to provide interlayer interfaces having extremely low roughnesses.
    Type: Application
    Filed: July 9, 2015
    Publication date: January 28, 2016
    Inventors: Dan Botez, Thomas F. Kuech, Luke J. Mawst, Steven Christopher Ruder
  • Patent number: 9244225
    Abstract: Methods for the fabrication of orientation-patterned semiconductor structures are provided. The structures are light-waveguiding structures for nonlinear frequency conversion. The structures are periodically poled semiconductor heterostructures comprising a series of material domains disposed in a periodically alternating arrangement along the optical propagation axis of the waveguide. The methods of fabricating the orientation-patterned structures utilize a series of surface planarization steps at intermediate stages of the heterostucture growth process to provide interlayer interfaces having extremely low roughnesses.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: January 26, 2016
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Dan Botez, Thomas F. Kuech, Luke J. Mawst, Steven Christopher Ruder
  • Publication number: 20150325430
    Abstract: A reactor for growing or depositing semiconductor films or devices. The reactor may be designed for inline production of III-V materials grown by hydride vapor phase epitaxy (HVPE). The operating principles of the HVPE reactor can be used to provide a completely or partially inline reactor for many different materials. An exemplary design of the reactor is shown in the attached drawings. In some instances, all or many of the pieces of the reactor formed of quartz, such as welded quartz tubing, while other reactors are made from metal with appropriate corrosion resistant coatings such as quartz or other materials, e.g., corrosion resistant material, or stainless steel tubing or pipes may be used with a corrosion resistant material useful with HVPE-type reactants and gases. Using HVPE in the reactor allows use of lower-cost precursors at higher deposition rates such as in the range of 1 to 5 ?m/minute.
    Type: Application
    Filed: July 16, 2015
    Publication date: November 12, 2015
    Inventors: David L. YOUNG, Aaron Joseph PTAK, Thomas F. KUECH, Kevin SCHULTE, John D. SIMON
  • Patent number: 9096948
    Abstract: Methods for the fabrication of orientation-patterned semiconductor structures are provided. The structures are light-waveguiding structures for nonlinear frequency conversion. The structures are periodically poled semiconductor heterostructures comprising a series of material domains disposed in a periodically alternating arrangement along the optical propagation axis of the waveguide. The methods of fabricating the orientation-patterned structures utilize a series of surface planarization steps at intermediate stages of the heterostructure growth process to provide interlayer interfaces having extremely low roughnesses.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: August 4, 2015
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Dan Botez, Thomas F. Kuech, Luke J. Mawst, Steven Christopher Ruder
  • Patent number: 9064774
    Abstract: Virtual substrates made by hydride vapor phase epitaxy are provided comprising a semiconductor growth substrate and a substantially strain-relaxed metamorphic buffer layer (MBL) structure comprising one or more layers of a semiconductor alloy on the growth substrate. The MBL structure is compositionally graded such that its lattice constant transitions from a lattice constant at the interface with the growth substrate that is substantially the same as the lattice constant of the growth substrate to a lattice constant at a surface opposite the interface that is different from the lattice constant of the growth substrate. The virtual substrates comprise relatively thick MBL structures (e.g., >20 ?m) and relatively thick growth substrates (e.g., >0.5 mm).
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: June 23, 2015
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Thomas F. Kuech, Kevin L. Schulte, Luke J. Mawst, Tae Wan Kim, Brian T. Zutter
  • Publication number: 20140339505
    Abstract: Virtual substrates made by hydride vapor phase epitaxy are provided comprising a semiconductor growth substrate and a substantially strain-relaxed metamorphic buffer layer (MBL) structure comprising one or more layers of a semiconductor alloy on the growth substrate. The MBL structure is compositionally graded such that its lattice constant transitions from a lattice constant at the interface with the growth substrate that is substantially the same as the lattice constant of the growth substrate to a lattice constant at a surface opposite the interface that is different from the lattice constant of the growth substrate. The virtual substrates comprise relatively thick MBL structures (e.g., >20 ?m) and relatively thick growth substrates (e.g., >0.
    Type: Application
    Filed: May 15, 2013
    Publication date: November 20, 2014
    Applicant: Wisconsin Alumni Research Foundation
    Inventors: Thomas F. Kuech, Kevin L. Schulte, Luke J. Mawst, Tae Wan Kim, Brian T. Zutter
  • Patent number: 8879595
    Abstract: Semiconductor structures, quantum cascade structures and lasers including the structures are provided. The semiconductor structures include a substrate, a metamorphic buffer layer structure over the substrate, and a quantum cascade structure including a superlattice of quantum wells and barriers over the metamorphic buffer layer structure. The substrate may be GaAs and the quantum cascade structure may be an InGaAs/InAlAs superlattice, including one or more barriers of AlAs.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: November 4, 2014
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Luke J. Mawst, Jeremy D. Kirch, Thomas F. Kuech
  • Patent number: 8668370
    Abstract: Dimpled plates for light distribution and concentration are provided. Also provided are apparatus incorporating the plates as waveguides, and methods for using the dimpled plates for distributing or concentrating input light. The dimpled plates are designed to spatially distribute light from each of one or more near point light sources into a pixelated light projection using an array of reflective conical light deflection elements.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: March 11, 2014
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Leon McCaughan, Thomas F. Kuech, Christopher J. Zenner, Cedric Meyers
  • Publication number: 20140037258
    Abstract: Methods for the fabrication of orientation-patterned semiconductor structures are provided. The structures are light-waveguiding structures for nonlinear frequency conversion. The structures are periodically poled semiconductor heterostructures comprising a series of material domains disposed in a periodically alternating arrangement along the optical propagation axis of the waveguide. The methods of fabricating the orientation-patterned structures utilize a series of surface planarization steps at intermediate stages of the heterostructure growth process to provide interlayer interfaces having extremely low roughnesses.
    Type: Application
    Filed: July 31, 2012
    Publication date: February 6, 2014
    Inventors: Dan Botez, Thomas F. Kuech, Luke J. Mawst, Steven Christopher Ruder
  • Publication number: 20130309848
    Abstract: A reactor for growing or depositing semiconductor films or devices. The reactor may be designed for inline production of III-V materials grown by hydride vapor phase epitaxy (HVPE). The operating principles of the HVPE reactor can be used to provide a completely or partially inline reactor for many different materials. An exemplary design of the reactor is shown in the attached drawings. In some instances, all or many of the pieces of the reactor formed of quartz, such as welded quartz tubing, while other reactors are made from metal with appropriate corrosion resistant coatings such as quartz or other materials, e.g., corrosion resistant material, or stainless steel tubing or pipes may be used with a corrosion resistant material useful with HVPE-type reactants and gases. Using HVPE in the reactor allows use of lower-cost precursors at higher deposition rates such as in the range of 1 to 5 ?m/minute.
    Type: Application
    Filed: May 15, 2013
    Publication date: November 21, 2013
    Applicant: ALLIANCE FOR SUSTAINABLE ENERGY, LLC
    Inventors: David L. YOUNG, Aaron Joseph PTAK, Thomas F. KUECH, Kevin SCHULTE, John D. SIMON
  • Publication number: 20130294064
    Abstract: Dimpled plates for light distribution and concentration are provided. Also provided are apparatus incorporating the plates as waveguides, and methods for using the dimpled plates for distributing or concentrating input light. The dimpled plates are designed to spatially distribute light from each of one or more near point light sources into a pixelated light projection using an array of reflective conical light deflection elements.
    Type: Application
    Filed: May 3, 2012
    Publication date: November 7, 2013
    Inventors: Leon McCaughan, Thomas F. Kuech, Christopher J. Zenner, Cedric Meyers
  • Patent number: 8471294
    Abstract: GaN-based heterojunction field effect transistor (HFET) sensors are provided with engineered, functional surfaces that act as pseudo-gates, modifying the drain current upon analyte capture. In some embodiments, devices for sensing nitric oxide (NO) species in a NO-containing fluid are provided which comprise a semiconductor structure that includes a pair of separated GaN layers and an AlGaN layer interposed between and in contact with the GaN layers. Source and drain contact regions are formed on one of the GaN layers, and an exposed GaN gate region is formed between the source and drain contact regions for contact with the NO-containing fluid. The semiconductor structure most preferably is formed on a suitable substrate (e.g., SiC). An insulating layer may be provided so as to cover the semiconductor structure. The insulating layer will have a window formed therein so as to maintain exposure of the GaN gate region and thereby allow the gate region to contact the NO-containing fluid.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: June 25, 2013
    Assignee: Duke University
    Inventors: Michael A. Garcia, Scott D. Wolter, April S. Brown, Joseph Bonaventura, Thomas F. Kuech
  • Publication number: 20130107903
    Abstract: Semiconductor structures, quantum cascade structures and lasers including the structures are provided. The semiconductor structures include a substrate, a metamorphic buffer layer structure over the substrate, and a quantum cascade structure including a superlattice of quantum wells and barriers over the metamorphic buffer layer structure. The substrate may be GaAs and the quantum cascade structure may be an InGaAs/InAlAs superlattice, including one or more barriers of AlAs.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Inventors: Luke J. Mawst, Jeremy D. Kirch, Thomas F. Kuech
  • Patent number: 8369915
    Abstract: A fiber optic probe having one or more photodetectors bound thereto is provided. By directly integrating thin, flexible photodetectors with an optical fiber, the probes provide a compact structure that increases throughput and decreases cost, making it practical for a clinical use. In some embodiments, the fiber optic probes are small enough for insertion into the shaft of a needle, such as a biopsy needle.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: February 5, 2013
    Assignees: Wisconsin Alumni Research Foundation, Duke University
    Inventors: Thomas F. Kuech, Nirmala Ramanujam, Leon McCaughan
  • Publication number: 20110112388
    Abstract: A fiber optic probe having one or more photodetectors bound thereto is provided. By directly integrating thin, flexible photodetectors with an optical fiber, the probes provide a compact structure that increases throughput and decreases cost, making it practical for a clinical use. In some embodiments, the fiber optic probes are small enough for insertion into the shaft of a needle, such as a biopsy needle.
    Type: Application
    Filed: November 6, 2009
    Publication date: May 12, 2011
    Applicant: WISCONSIN ALUMNI RESEARCH FOUNDATION
    Inventors: Thomas F. Kuech, Nirmala Ramanujam, Leon McCaughan
  • Publication number: 20110097837
    Abstract: GaN-based heterojunction field effect transistor (HFET) sensors are provided with engineered, functional surfaces that act as pseudo-gates, modifying the drain current upon analyte capture. In some embodiments, devices for sensing nitric oxide (NO) species in a NO-containing fluid are provided which comprise a semiconductor structure that includes a pair of separated GaN layers and an AlGaN layer interposed between and in contact with the GaN layers. Source and drain contact regions are formed on one of the GaN layers, and an exposed GaN gate region is formed between the source and drain contact regions for contact with the NO-containing fluid. The semiconductor structure most preferably is formed on a suitable substrate (e.g., SiC). An insulating layer may be provided so as to cover the semiconductor structure. The insulating layer will have a window formed therein so as to maintain exposure of the GaN gate region and thereby allow the gate region to contact the NO-containing fluid.
    Type: Application
    Filed: November 18, 2010
    Publication date: April 28, 2011
    Inventors: Michael A. Garcia, Scott D. Wolter, April S. Brown, Joseph Bonaventura, Thomas F. Kuech