Abstract: A method obtains measurements of semiconductor structures from a single wedge cut of an inspection volume. The method comprises obtaining the wedge cut by exposing a cross-section surface in the inspection volume by milling into the inspection volume with a FIB column arranged under a slant angle, and imaging the cross-section surface with a charged particle beam imaging system. The method also comprises determining positions of cross-section features of semiconductor structures in the wedge cut, and determining reference positions of the cross-section features from at least one reference image of the semiconductor structures. The method further comprises obtaining the one or more measurements of the semiconductor structures using lateral displacements between the positions of the cross-section features and the reference positions.

Abstract: A method comprises, during ion-beam milling of a cross-section surface into a wafer with an ion beam, compensating a milling-induced charging by scanning a charged particle imaging beam over a segment of the cross-section surface. The method further comprises adjusting a kinetic energy of the charged particle imaging beam to reduce a surface charge generated during ion-beam milling.

Abstract: A method comprises determining a representative ground truth structure provided in a semiconductor sample having a plurality of structures extending mainly in a thickness direction of the sample in a region of interest containing the plurality of structures. At least one adapted image of a milled sample is determined, wherein the at least one adapted image comprises image representations of the structures in the region of interest at different positions in the thickness direction. A transformation is determined by which the image representations at the different positions in the thickness direction of the structures build the ground truth structure, and the transformation is stored for a future application of the transformation to a further sample having the plurality of structures.

Abstract: A method of operating a dual beam device comprises obtaining a milled sample having an assumed milled top surface shape which was obtained by milling the sample with a first ion beam of the dual beam device, and determining a plurality of height coordinates of the assumed milled top surface shape using a second beam of the dual beam device. The method also comprises determining at least one actual milling top surface shape for the milled sample based on the determined plurality of height coordinates, and determining a parameter of the sample based on the adapted milled top surface shape.

Abstract: The present disclosure relates to dual beam device and three-dimensional circuit pattern inspection techniques by cross sectioning of inspection volumes with large depth extension exceeding 1 ?m below the surface of a semiconductor wafer, as well as methods, computer program products and apparatuses for generating 3D volume image data of a deep inspection volume inside a wafer without removal of a sample from the wafer. The disclosure further relates to 3D volume image generation and cross section image alignment methods utilizing a dual beam device for three-dimensional circuit pattern inspection.

Abstract: A method of preparing a sample for charged particle beam inspection comprises providing a semiconductor structure sample and identifying electrically isolated regions in an area of the sample to be examined. The method further comprises providing an electrical connection to the at least one electrically isolated region.

Abstract: A method of 3D-inspection of a semiconductor object inside of an inspection volume of a wafer or wafer sample comprises a 3D data processing and a step for acquiring a plurality of two-dimensional images. The acquiring step comprises a monitoring step for determining whether a two-dimensional image is in conformity with a desired property of the 3D data processing. The disclosure further comprises a method of configuring the method of 3D-inspection and a system configured to execute the method of 3D inspection as well as the method of configuring the method of 3D-inspection.

Abstract: The invention relates to a method for balancing charges on a surface of an object comprising integrated circuit patterns in a scanning electron microscope, the method comprising: scanning an area on the surface of the object with a first electron beam with a first landing energy one or more times to generate a scanning electron microscopy image of the area and subsequently scanning the area on the surface of the object with a second electron beam with a second landing energy one or more times such that the charges accumulated on the surface of the object are at least partially balanced. The invention also relates to scanning electron microscopes with a single or dual beam column setup for imaging and erasing the accumulated charges.

Abstract: The present disclosure relates to dual beam device and three-dimensional circuit pattern inspection techniques by cross sectioning of inspection volumes with large depth extension exceeding 1 ?m below the surface of a semiconductor wafer, as well as methods, computer program products and apparatuses for generating 3D volume image data of a deep inspection volume inside a wafer without removal of a sample from the wafer. The disclosure further relates to 3D volume image generation and cross section image alignment methods utilizing a dual beam device for three-dimensional circuit pattern inspection.

Abstract: A method of generating an image of a region of a semiconductor sample including a plurality of channels extending substantially perpendicular to a sample surface of the semiconductor sample based on a focused charged particle beam hitting a surface of the semiconductor sample along scanning lines, the method comprising at a charged particle beam imaging system the step of controlling the scanning lines of the focused charged particle beam in such a way that the scanning lines cross an interface between the semiconductor surface and each of the channels only with an angle greater or equal to 45°. The image is generated based on the scanning lines.

Abstract: Certain examples provide methods of performing semiconductor metrology by analyzing a sample surface, wherein the methods comprise: obtaining a first image generated using a first image modality; obtaining a second image generated using a second image modality; generating first labels by segmenting the first image; generating second labels by segmenting the second image; and generating third labels associated with the first image and the second image by fusing the first labels and the second labels.

Abstract: A method of determining a size of a contact area between a first 3D structure and a second 3D structure in an integrated semiconductor sample, includes: obtaining a first cross section image and a second cross section image parallel to the first cross section image, wherein obtaining the first and second cross section images includes subsequently removing a cross section surface layer of the integrated semiconductor sample using a focused ion beam to make a new cross section accessible for imaging, and imaging the new cross section of the integrated semiconductor sample with an imaging device; performing image registration of the obtained cross section images and obtaining a 3D data set; determining a 3D model representing the first 3D structure and the second 3D structure in the 3D data set; and determining a relative overlap of the first 3D structure with the second 3D structure based on the 3D model.

Abstract: A computer implemented method for defect recognition in an imaging dataset of a wafer in a charged particle beam system comprising an embedded system, the method comprising: i) obtaining an imaging dataset of a wafer; ii) obtaining model data for a model architecture of a machine learning model for defect recognition in the imaging dataset of the wafer, the model architecture being implemented in the embedded system; iii) transferring the model data to a programmable memory of the embedded system; and iv) applying the machine learning model to an imaging dataset of a wafer to recognize defects, comprising executing the embedded system implemented model architecture with the transferred model data.

Abstract: The present invention relates to a charged particle beam system comprising a deflection subsystem configured to deflect a charged particle beam in a deflection direction based on a sum of analog signals generated by separate digital to analog conversion of a first digital signal and a second digital signal. The present invention further relates to a method of configuring the charged particle beam system so that each of a plurality of regions of interest can be scanned by varying only the first digital signal while the second digital signal is held constant at a value associated with the respective region of interest. The present invention further relates to a method of recording a plurality of images of the regions of interest at the premise of reduced interference due to charge accumulation.

Abstract: A 3D tomographic inspection method for the inspection of semiconductor features in an inspection volume of a semiconductor wafer includes obtaining a 3D tomographic image, and selecting a plurality of 2D cross section images. The method also includes identifying contours of HAR structures, and extracting deviation parameters. The deviation parameters describe fabrication errors such as displacement, deviation in radius or diameter, area or shape.

Abstract: Semiconductor structures can be investigated, e.g., in an in-line quality check. An x-ray scattering measurement, e.g., CD-SAXS, can be used for wafer metrology. The x-ray scattering measurement can be configured based on a slice-and-imaging tomographic measurement using a dual-beam device, e.g., including a focused ion beam device and a scanning electron microscope.

Abstract: A method of determining a size of a contact area between a first 3D structure and a second 3D structure in an integrated semiconductor sample, includes the following steps: obtaining at least a first cross section image and a second cross section image parallel to the first cross section image, wherein obtaining the first and second cross section images includes subsequently removing a cross section surface layer of the integrated semiconductor sample using a focused ion beam to make a new cross section accessible for imaging, and imaging the new cross section of the integrated semiconductor sample with an imaging device; performing image registration of the obtained cross section images and obtaining a 3D data set; determining a 3D model representing the first 3D structure and the second 3D structure in the 3D data set; and determining a relative overlap of the first 3D structure with the second 3D structure based on the 3D model.

Abstract: A method for operating an ion beam device comprises determining an incidence angle at which an ion beam of the ion beam device hits an upper top surface of a semiconductor sample and a rotation angle for the semiconductor sample around a rotation axis extending perpendicular to the upper top surface. The method also includes rotating the semiconductor sample around the rotation axis by the rotation angle. The method further includes determining a scan angle between an adapted scan line along which the ion beam is moved when hitting the upper top surface and a default scan line of the ion beam extending parallel to the upper top surface of the semiconductor sample. Determining the scan angle is based on the rotation angle and the incidence angle. The scan line is adapted to the adapted scan line based on the determined scan angle.

Abstract: An illumination optical unit is part of a mask inspection system for use with EUV illumination light. A hollow waveguide serves to guide the illumination light. For the illumination light, the hollow waveguide has an entrance opening in an entrance plane and an exit opening in an exit plane. An input coupling mirror optical unit is disposed upstream of the hollow waveguide in the beam path of the illumination light and has at least one mirror for imaging a source region of an EUV light source into the entrance opening of the hollow waveguide. An output coupling mirror optical unit serves to image the exit opening of the hollow waveguide into an illumination field. This yields an illumination optical unit whose use efficiency for the EUV illumination light has been optimized.

Abstract: A method comprises: providing FIB and CPB columns with FIB and CPB optical axes coinciding at a wafer surface; in the coincidence arrangement, removing a cross section surface layer of a measurement site of a wafer using the FIB column to make a new cross section accessible for imaging; reducing a working distance between the CPB imaging column and the wafer surface in a direction along the axis of the CPB imaging column; imaging the new cross section at the measurement site of the wafer with the CPB imaging column at the reduced working distance and thus not in the coincidence arrangement; and increasing the working distance between the CPB imaging column and the wafer surface in the direction along the axis of the CPB imaging column until the coincidence arrangement is reached.