Abstract: A method identifies ring structures in pillars of high aspect ratio (HAR) structures. For segmentation of rings, a machine learning-logic is used. A two-step training method for the machine learning logic is described.

Abstract: A method for defect detection in a sample, such as in a semiconductor sample, includes the following steps: providing a reference image of the sample; providing a sample image generated via a particle beam inspection system, wherein the sample image comprises a rotation with respect to the reference image; dividing the sample image into sample image regions; dividing the reference image into reference image regions, wherein each sample image region is assigned one reference image region to form an image region pair; identifying in each image region pair a structure that is present both in the sample image region and also in the associated reference image region of the image region pair; registering the sample image regions by correcting a lateral offset of the identified structure in each sample image region on the basis of the location of the identified structure in the respectively associated reference image region, as a result of which corrected sample image regions are formed; and comparing each corrected

Abstract: The present invention relates to a three-dimensional circuit pattern inspection technique by cross sectioning of integrated circuits and, more particularly, to a method and apparatus for obtaining a 3D volume image of an integrated semiconductor sample. The method employs a feature based alignment of cross section images based on features of an integrated semiconductor sample.

Abstract: A system and a method for volume inspection of semiconductor wafers with increased throughput are configured for milling and imaging a reduced number or areas of appropriate cross-sections surfaces in an inspection volume and determining inspection parameters of the 3D objects from the cross-section surface images. The method and device can be utilized for quantitative metrology, defect detection, process monitoring, defect review, and inspection of integrated circuits within semiconductor wafers.

Abstract: A method for the manufacture of a finished glass tube with closed ends and a ventilation hole includes: providing a glass tube with open ends including a first end and a second end; opening a ventilation hole in a wall of the glass tube near one of the ends of the glass tube; closing the first end of the glass tube; closing the second end of the glass tube; and introducing a gas into the glass tube through the ventilation hole with a radial gas supply during at least one of the closings of the first end or the second end of the glass tube.

Abstract: A modular metrology apparatus comprises a vacuum chamber housing with an opening having a mechanical interface for sealed attachment of modular adapters. A sample stage inside the vacuum chamber positions a sample for processing. One or more charged-particle scanning systems scan particle beams across the sample. The mechanical interface enables integration of removable interchangeable modular adapters containing different configurations of process modules. The process modules are sealed within adapters and extend from outside to inside the vacuum housing towards the sample stage. Modular adapters are interchangeable to reconfigure installed process modules. Configurations may include scanning electron beams, focused ion beams, interferometers, detectors, and other process modules. The modular architecture provides a configurable mechanical framework to optimize the metrology apparatus by swapping adapters with customized sets of process modules.

Abstract: A method of 3D-inspection of a semiconductor object inside of an inspection volume of a wafer or wafer sample comprises a 3D data processing and a step for acquiring a plurality of two-dimensional images. The acquiring step comprises a monitoring step for determining whether a two-dimensional image is in conformity with a desired property of the 3D data processing. The disclosure further comprises a method of configuring the method of 3D-inspection and a system configured to execute the method of 3D-inspection as well as the method of configuring the method of 3D-inspection.

Abstract: A method obtains measurements of semiconductor structures from a single wedge cut of an inspection volume. The method comprises obtaining the wedge cut by exposing a cross-section surface in the inspection volume by milling into the inspection volume with a FIB column arranged under a slant angle, and imaging the cross-section surface with a charged particle beam imaging system. The method also comprises determining positions of cross-section features of semiconductor structures in the wedge cut, and determining reference positions of the cross-section features from at least one reference image of the semiconductor structures. The method further comprises obtaining the one or more measurements of the semiconductor structures using lateral displacements between the positions of the cross-section features and the reference positions.

Abstract: A method comprises, during ion-beam milling of a cross-section surface into a wafer with an ion beam, compensating a milling-induced charging by scanning a charged particle imaging beam over a segment of the cross-section surface. The method further comprises adjusting a kinetic energy of the charged particle imaging beam to reduce a surface charge generated during ion-beam milling.

Abstract: A method comprises determining a representative ground truth structure provided in a semiconductor sample having a plurality of structures extending mainly in a thickness direction of the sample in a region of interest containing the plurality of structures. At least one adapted image of a milled sample is determined, wherein the at least one adapted image comprises image representations of the structures in the region of interest at different positions in the thickness direction. A transformation is determined by which the image representations at the different positions in the thickness direction of the structures build the ground truth structure, and the transformation is stored for a future application of the transformation to a further sample having the plurality of structures.

Abstract: A method of operating a dual beam device comprises obtaining a milled sample having an assumed milled top surface shape which was obtained by milling the sample with a first ion beam of the dual beam device, and determining a plurality of height coordinates of the assumed milled top surface shape using a second beam of the dual beam device. The method also comprises determining at least one actual milling top surface shape for the milled sample based on the determined plurality of height coordinates, and determining a parameter of the sample based on the adapted milled top surface shape.

Abstract: The present disclosure relates to dual beam device and three-dimensional circuit pattern inspection techniques by cross sectioning of inspection volumes with large depth extension exceeding 1 ?m below the surface of a semiconductor wafer, as well as methods, computer program products and apparatuses for generating 3D volume image data of a deep inspection volume inside a wafer without removal of a sample from the wafer. The disclosure further relates to 3D volume image generation and cross section image alignment methods utilizing a dual beam device for three-dimensional circuit pattern inspection.

Abstract: A method of preparing a sample for charged particle beam inspection comprises providing a semiconductor structure sample and identifying electrically isolated regions in an area of the sample to be examined. The method further comprises providing an electrical connection to the at least one electrically isolated region.

Abstract: A method of 3D-inspection of a semiconductor object inside of an inspection volume of a wafer or wafer sample comprises a 3D data processing and a step for acquiring a plurality of two-dimensional images. The acquiring step comprises a monitoring step for determining whether a two-dimensional image is in conformity with a desired property of the 3D data processing. The disclosure further comprises a method of configuring the method of 3D-inspection and a system configured to execute the method of 3D inspection as well as the method of configuring the method of 3D-inspection.

Abstract: The invention relates to a method for balancing charges on a surface of an object comprising integrated circuit patterns in a scanning electron microscope, the method comprising: scanning an area on the surface of the object with a first electron beam with a first landing energy one or more times to generate a scanning electron microscopy image of the area and subsequently scanning the area on the surface of the object with a second electron beam with a second landing energy one or more times such that the charges accumulated on the surface of the object are at least partially balanced. The invention also relates to scanning electron microscopes with a single or dual beam column setup for imaging and erasing the accumulated charges.

Abstract: The present disclosure relates to dual beam device and three-dimensional circuit pattern inspection techniques by cross sectioning of inspection volumes with large depth extension exceeding 1 ?m below the surface of a semiconductor wafer, as well as methods, computer program products and apparatuses for generating 3D volume image data of a deep inspection volume inside a wafer without removal of a sample from the wafer. The disclosure further relates to 3D volume image generation and cross section image alignment methods utilizing a dual beam device for three-dimensional circuit pattern inspection.

Abstract: A method of generating an image of a region of a semiconductor sample including a plurality of channels extending substantially perpendicular to a sample surface of the semiconductor sample based on a focused charged particle beam hitting a surface of the semiconductor sample along scanning lines, the method comprising at a charged particle beam imaging system the step of controlling the scanning lines of the focused charged particle beam in such a way that the scanning lines cross an interface between the semiconductor surface and each of the channels only with an angle greater or equal to 45°. The image is generated based on the scanning lines.

Abstract: Certain examples provide methods of performing semiconductor metrology by analyzing a sample surface, wherein the methods comprise: obtaining a first image generated using a first image modality; obtaining a second image generated using a second image modality; generating first labels by segmenting the first image; generating second labels by segmenting the second image; and generating third labels associated with the first image and the second image by fusing the first labels and the second labels.

Abstract: A method of determining a size of a contact area between a first 3D structure and a second 3D structure in an integrated semiconductor sample, includes: obtaining a first cross section image and a second cross section image parallel to the first cross section image, wherein obtaining the first and second cross section images includes subsequently removing a cross section surface layer of the integrated semiconductor sample using a focused ion beam to make a new cross section accessible for imaging, and imaging the new cross section of the integrated semiconductor sample with an imaging device; performing image registration of the obtained cross section images and obtaining a 3D data set; determining a 3D model representing the first 3D structure and the second 3D structure in the 3D data set; and determining a relative overlap of the first 3D structure with the second 3D structure based on the 3D model.

Abstract: A computer implemented method for defect recognition in an imaging dataset of a wafer in a charged particle beam system comprising an embedded system, the method comprising: i) obtaining an imaging dataset of a wafer; ii) obtaining model data for a model architecture of a machine learning model for defect recognition in the imaging dataset of the wafer, the model architecture being implemented in the embedded system; iii) transferring the model data to a programmable memory of the embedded system; and iv) applying the machine learning model to an imaging dataset of a wafer to recognize defects, comprising executing the embedded system implemented model architecture with the transferred model data.