Abstract: A hermetic seal between an optical element and a metal mount or housing using a fluoropolymer. The fluoropolymer is dispersed along the interior edge of the metal mount. The metal mount and fluoropolymer are then heated to a temperature exceeding the melting point of the fluoropolymer. Once heated the optical element is pressed into the metal mount and allowed to cool. The metal mount, optical element and thickness of fluoropolymer are sized to provide an interference fit between the metal mount and optical element.

Abstract: A system for determining a correction for an output value of a time-to-digital converter within a phase-locked loop is provided. The output value relates to a time difference between an input signal and a reference signal supplied to the time-to-digital converter. The system includes a digitally-controlled oscillator configured to generate a first signal independently from the output signal. The first signal has a first frequency different from an integer multiple of a reference frequency of the reference signal. The system further includes a frequency divider configured to generate the input signal for the time-to-digital converter based on the first signal. The input signal has a second frequency being a fraction of the first frequency. Further, the system includes a processing unit configured to calculate the correction using a distribution of output values of multiple time differences.

Abstract: An endoscope coupler with a split focus ring having direct engagement between the focus ring and the lens cell. The endoscope coupler may also have a changeable lens cartridge which can be replaced when moisture penetrates and ruins a the previous lens cartridge. Additional features may include branding security key which prevents use of replacement parts from third parties.

Abstract: A hermetic seal between an optical element and a metal mount or housing using a fluoropolymer. The fluoropolymer is dispersed along the interior edge of the metal mount. The metal mount and fluoropolymer are then heated to a temperature exceeding the melting point of the fluoropolymer. Once heated the optical element is pressed into the metal mount and allowed to cool. The metal mount, optical element and thickness of fluoropolymer are sized to provide an interference fit between the metal mount and optical element.

Abstract: An endoscope coupler with a split focus ring having direct engagement between the focus ring and the lens cell. The endoscope coupler may also have a changeable lens cartridge which can be replaced when moisture penetrates and ruins a the previous lens cartridge. Additional features may include branding security key which prevents use of replacement parts from third parties.

Abstract: This application discusses, among other things, apparatus and methods for improving spurious frequency performance of digital-to-time converters (DTCs). In an example, a method can include receiving a code at selection logic of a digital-to-time converter at a first instant, selecting a first delay path of the DTC to provide a delay associated with the code, associating a second delay path with the code, receiving the code at the selection logic at a second instant, and selecting the second delay path of the DTC to provide the delay associated with the code.

Abstract: Embodiments of the present invention create a circuit having a digital-to-time converter with a high-frequency input for receiving a high-frequency signal, a digital input for receiving a first digital signal, and a high-frequency output for the provision of a chronologically delayed version of the HF signal. In addition, the circuit has an oscillator arrangement for the provision of the high-frequency signal, having a phase-locked loop for adjusting a frequency of the high-frequency signal. The digital-to-time converter is designed to chronologically delay the received high-frequency signal based on the first digital signal received at its digital input.

Abstract: A noise shaping circuit according to an example includes a forward signal path configured to generate an output signal based on an input signal, a feedback signal path configured to feed back a feedback signal based on the output signal to the forward signal path, and a dither generator configured to generate a dither signal and to couple the dither signal into the forward signal path to modify the input signal and into the feedback signal path. Employing a noise shaping circuit according to an example may improve an overall noise performance.

Abstract: A phase locked loop includes a feedforward path receiving a reference signal having a reference frequency and outputting an output signal having an output frequency that is a function of the reference signal and a feedback signal. The phase locked loop further includes a feedback path having a divider circuit associated therewith that is configured to receive the output signal and generate the feedback signal having a reduced frequency based on a divide value of the divider circuit. The feedback signal is supplied to the feedforward path. The phase locked loop also includes a modulator circuit configured to receive modulation data and provide a divider control signal to the divider circuit to control the divide value thereof, and a phase tracker circuit configured to determine an amount of phase drift from an initial phase value of the output signal due to an interruption in a locked state of the phase locked loop.

Abstract: A circuit according to an example includes a digital-to-time converter and a signal processing circuit coupled to the digital-to-time converter and configured to generate a processed signal derived from a signal provided to the signal processing circuit, the processed signal including a predetermined phase relation with respect to the signal provided to the signal processing circuit, wherein the circuit is configured to receive a reference signal and to generate an output signal based on the received reference signal. The a measurement circuit is configured to measure a delay between the output signal and the reference signal, wherein the output of the digital-to-time converter is coupled to a memory configured to store calibration data of the digital-to-time converter based on the measured delay.

Abstract: Embodiments of the present invention create a circuit having a digital-to-time converter with a high-frequency input for receiving a high-frequency signal, a digital input for receiving a first digital signal, and a high-frequency output for the provision of a chronologically delayed version of the HF signal. In addition, the circuit has an oscillator arrangement for the provision of the high-frequency signal, having a phase-locked loop for adjusting a frequency of the high-frequency signal. The digital-to-time converter is designed to chronologically delay the received high-frequency signal based on the first digital signal received at its digital input.

Abstract: A compressed air treatment chamber for improving the flow properties of compressed air or compressed gas mixtures in a coating process, comprising a housing for forming a hollow space, at least one air inlet opening and at least one air outlet opening are arranged in such a way that the compressed air or the compressed gas mixture can flow through the hollow space, preferably in a longitudinal direction, at least one electrode arranged within the hollow space, at least one high-voltage source for supplying high voltage to the electrode, wherein at least one insulation layer is arranged within the hollow space on an inner surface of an outer casing of the housing, and an electromagnetic field, with an active zone through which compressed air which is to be treated can flow, can be produced in the interior of the hollow space between the electrode and a counterelectrode.

Abstract: Predictive time-to-digital converters (TDCs) and methods for providing a digital representation of a time interval are disclosed herein. In an example, a TDC can include a delay line, a selection circuit, and a latch circuit. The delay line can include a plurality of delay elements configured to propagate a first edge of a first signal sequentially through the plurality of delay elements. The selection circuit can be configured to receive the first signal, to receive prediction information, and to route the first signal to an input of one of the plurality of delay elements based on the prediction information. The latch circuit can receive a second signal and can latch a plurality of outputs of the delay line upon reception of a second edge of the second signal. An output of the latch circuit can provide an indication of a delay between the first edge and the second edge.

Abstract: A manufacturing method is provided for a piezoelectric layer arrangement and a corresponding piezoelectric layer arrangement. The manufacturing method includes the steps: depositing a first electrode layer on a substrate; depositing a first insulating layer on the first electrode layer; forming a through opening in the first insulating layer to expose the first electrode layer within the through opening; depositing a piezoelectric layer on the first insulating layer and on the first electrode layer within the through opening; back-polishing the resulting structure to form a planar surface, on which a piezoelectric layer area, surrounded by the first insulating layer, is exposed; and depositing and structuring a second electrode layer on the first insulating layer, which contacts the piezoelectric layer area.

Abstract: A circuit according to an example includes a digital-to-time converter configured to receive an oscillator signal and to generate a processed oscillator signal based on the received oscillator signal in response to a control signal, and a time-interleaved control circuit configured to generate the control signal based on a time-interleaved technique.

Abstract: Apparatuses are disclosed which comprise a coarse tuning circuitry, a fine tuning circuitry and at least one switchable capacitance.

Abstract: A digital to time converter is disclosed and includes a code logic and an interpolator. The code logic is configured to receive a first phase signal and a second phase signal and generate a select signal according to the first phase signal and the second phase signal. The interpolator has a bank of inverters. The interpolator is configured to generate an interpolator signal based on the select signal and an input signal.

Abstract: A noise shaping circuit according to an example includes a forward signal path configured to generate an output signal based on an input signal, a feedback signal path configured to feed back a feedback signal based on the output signal to the forward signal path, and a dither generator configured to generate a dither signal and to couple the dither signal into the forward signal path to modify the input signal and into the feedback signal path. Employing a noise shaping circuit according to an example may improve an overall noise performance.

Abstract: Predictive time-to-digital converters (TDCs) and methods for providing a digital representation of a time interval are disclosed herein. In an example, a TDC can include a delay line, a selection circuit, and a latch circuit. The delay line can include a plurality of delay elements configured to propagate a first edge of a first signal sequentially through the plurality of delay elements. The selection circuit can be configured to receive the first signal, to receive prediction information, and to route the first signal to an input of one of the plurality of delay elements based on the prediction information. The latch circuit can receive a second signal and can latch a plurality of outputs of the delay line upon reception of a second edge of the second signal. An output of the latch circuit can provide an indication of a delay between the first edge and the second edge.

Abstract: A method for manufacturing a micromechanical component includes the following sequential steps: a first material layer including a first joining partner being applied to a first wafer; a second material layer including a second joining partner being applied to a second wafer; a micromechanical structure being created in the first wafer by gas phase etching with the aid of a gaseous etching medium which is applied to the first joining partner; the first and second wafers being joined in such a way that they are in contact at least in some areas; and the first and second joining partners being heated to be integrally joined to form a connecting layer, a eutectic joining material being formed in the connecting layer from the first joining partner and the second joining partner.