Abstract: Embodiments of the present invention create a circuit having a digital-to-time converter with a high-frequency input for receiving a high-frequency signal, a digital input for receiving a first digital signal, and a high-frequency output for the provision of a chronologically delayed version of the HF signal. In addition, the circuit has an oscillator arrangement for the provision of the high-frequency signal, having a phase-locked loop for adjusting a frequency of the high-frequency signal. The digital-to-time converter is designed to chronologically delay the received high-frequency signal based on the first digital signal received at its digital input.

Abstract: A compressed air treatment chamber for improving the flow properties of compressed air or compressed gas mixtures in a coating process, comprising a housing for forming a hollow space, at least one air inlet opening and at least one air outlet opening are arranged in such a way that the compressed air or the compressed gas mixture can flow through the hollow space, preferably in a longitudinal direction, at least one electrode arranged within the hollow space, at least one high-voltage source for supplying high voltage to the electrode, wherein at least one insulation layer is arranged within the hollow space on an inner surface of an outer casing of the housing, and an electromagnetic field, with an active zone through which compressed air which is to be treated can flow, can be produced in the interior of the hollow space between the electrode and a counterelectrode.

Abstract: Predictive time-to-digital converters (TDCs) and methods for providing a digital representation of a time interval are disclosed herein. In an example, a TDC can include a delay line, a selection circuit, and a latch circuit. The delay line can include a plurality of delay elements configured to propagate a first edge of a first signal sequentially through the plurality of delay elements. The selection circuit can be configured to receive the first signal, to receive prediction information, and to route the first signal to an input of one of the plurality of delay elements based on the prediction information. The latch circuit can receive a second signal and can latch a plurality of outputs of the delay line upon reception of a second edge of the second signal. An output of the latch circuit can provide an indication of a delay between the first edge and the second edge.

Abstract: A manufacturing method is provided for a piezoelectric layer arrangement and a corresponding piezoelectric layer arrangement. The manufacturing method includes the steps: depositing a first electrode layer on a substrate; depositing a first insulating layer on the first electrode layer; forming a through opening in the first insulating layer to expose the first electrode layer within the through opening; depositing a piezoelectric layer on the first insulating layer and on the first electrode layer within the through opening; back-polishing the resulting structure to form a planar surface, on which a piezoelectric layer area, surrounded by the first insulating layer, is exposed; and depositing and structuring a second electrode layer on the first insulating layer, which contacts the piezoelectric layer area.

Abstract: A circuit according to an example includes a digital-to-time converter configured to receive an oscillator signal and to generate a processed oscillator signal based on the received oscillator signal in response to a control signal, and a time-interleaved control circuit configured to generate the control signal based on a time-interleaved technique.

Abstract: Apparatuses are disclosed which comprise a coarse tuning circuitry, a fine tuning circuitry and at least one switchable capacitance.

Abstract: A digital to time converter is disclosed and includes a code logic and an interpolator. The code logic is configured to receive a first phase signal and a second phase signal and generate a select signal according to the first phase signal and the second phase signal. The interpolator has a bank of inverters. The interpolator is configured to generate an interpolator signal based on the select signal and an input signal.

Abstract: A noise shaping circuit according to an example includes a forward signal path configured to generate an output signal based on an input signal, a feedback signal path configured to feed back a feedback signal based on the output signal to the forward signal path, and a dither generator configured to generate a dither signal and to couple the dither signal into the forward signal path to modify the input signal and into the feedback signal path. Employing a noise shaping circuit according to an example may improve an overall noise performance.

Abstract: Predictive time-to-digital converters (TDCs) and methods for providing a digital representation of a time interval are disclosed herein. In an example, a TDC can include a delay line, a selection circuit, and a latch circuit. The delay line can include a plurality of delay elements configured to propagate a first edge of a first signal sequentially through the plurality of delay elements. The selection circuit can be configured to receive the first signal, to receive prediction information, and to route the first signal to an input of one of the plurality of delay elements based on the prediction information. The latch circuit can receive a second signal and can latch a plurality of outputs of the delay line upon reception of a second edge of the second signal. An output of the latch circuit can provide an indication of a delay between the first edge and the second edge.

Abstract: A method for manufacturing a micromechanical component includes the following sequential steps: a first material layer including a first joining partner being applied to a first wafer; a second material layer including a second joining partner being applied to a second wafer; a micromechanical structure being created in the first wafer by gas phase etching with the aid of a gaseous etching medium which is applied to the first joining partner; the first and second wafers being joined in such a way that they are in contact at least in some areas; and the first and second joining partners being heated to be integrally joined to form a connecting layer, a eutectic joining material being formed in the connecting layer from the first joining partner and the second joining partner.

Abstract: A method and an arrangement for manufacturing a multi-layer composite (13) by laminating a sheet-like element (6) onto a backing (2) in a laminating unit (1), having steps, in this order, of conveying the element (6) in a longitudinal direction, detecting a position of the element (6), correcting the position of the element (6) on the basis of the detected position and on the basis of a reference position (15), and bonding said element (6) onto the backing (2). The detection step comprises the phases of measuring the lateral position, an angle of pivoting, and a longitudinal position of the element (6), and the correction step includes phases of lateral movement (T), pivoting (P), and longitudinal movement (L) of the element (6), apparatus elements perform the steps.

Abstract: A digital to time converter is disclosed and includes a code logic and an interpolator. The code logic is configured to receive a first phase signal and a second phase signal and generate a select signal according to the first phase signal and the second phase signal. The interpolator has a bank of inverters. The interpolator is configured to generate an interpolator signal based on the select signal and an input signal.

Abstract: A circuit according to an example includes a digital-to-time converter configured to receive an oscillator signal and to generate a processed oscillator signal based on the received oscillator signal in response to a control signal, and a time-interleaved control circuit configured to generate the control signal based on a time-interleaved technique.

Abstract: A phase locked loop includes a feedforward path receiving a reference signal having a reference frequency and outputting an output signal having an output frequency that is a function of the reference signal and a feedback signal. The phase locked loop further includes a feedback path having a divider circuit associated therewith that is configured to receive the output signal and generate the feedback signal having a reduced frequency based on a divide value of the divider circuit. The feedback signal is supplied to the feedforward path. The phase locked loop also includes a modulator circuit configured to receive modulation data and provide a divider control signal to the divider circuit to control the divide value thereof, and a phase tracker circuit configured to determine an amount of phase drift from an initial phase value of the output signal due to an interruption in a locked state of the phase locked loop.

Abstract: A method for producing a semiconductor component (166) is proposed.

Abstract: A manufacturing method is provided for a piezoelectric layer arrangement and a corresponding piezoelectric layer arrangement. The manufacturing method includes the steps: depositing a first electrode layer on a substrate; depositing a first insulating layer on the first electrode layer; forming a through opening in the first insulating layer to expose the first electrode layer within the through opening; depositing a piezoelectric layer on the first insulating layer and on the first electrode layer within the through opening; back-polishing the resulting structure to form a planar surface, on which a piezoelectric layer area, surrounded by the first insulating layer, is exposed; and depositing and structuring a second electrode layer on the first insulating layer, which contacts the piezoelectric layer area.

Abstract: A fitting system for a vehicle seat, in particular for a motor vehicle seat, with an axially extending shaft, which is rotatable in the circumferential direction, with at least one fitting which is provided with a rotatably supported driver which is axially secured by a securing element, for driving or for unlocking the fitting, wherein the shaft cooperates with the driver in the circumferential direction in a rotationally secure manner or mechanically connected, in order to rotate the driver, and with at least one quick fastener which is seated on the shaft in an axially non-displaceable manner, in order to secure the cooperation of shaft and driver axially in at least one direction, has the quick fastener connected with the driver and/or with its securing element.

Abstract: This application discusses, among other things, apparatus and methods for improving spurious frequency performance of digital-to-time converters (DTCs). In an example, a method can include receiving a code at selection logic of a digital-to-time converter at a first instant, selecting a first delay path of the DTC to provide a delay associated with the code, associating a second delay path with the code, receiving the code at the selection logic at a second instant, and selecting the second delay path of the DTC to provide the delay associated with the code.

Abstract: This disclosure includes hockey pucks and methods of making hockey pucks. Some pucks include a shell having an upper shell member and a lower shell member coupled to the upper shell member to define a cavity and a ballast member disposed in the cavity such that at least a portion of the ballast member is translatable relative to the shell. Some pucks include a resilient material disposed in the cavity and configured to resist translation of the ballast member in at least one direction relative to the shell. Some pucks include a cylindrical outer housing surrounding the shell. Some pucks include first and third substantially cylindrical members, a second member, a first plurality of fasteners to couple the first member to the second member independently of the third member, and a second plurality of fasteners to couple the third member to the second member independently of the first member.

Abstract: One embodiment of the present invention relates to a modulation system having a phase locked loop and an adaptive control. The phased lock loop is configured to receive an input signal and an adaptive signal. The input signal is an unmodulated signal, such as a phase component or phase signal. The phase locked loop is also configured to provide an error signal and an output signal. The error signal indicates one or more modulation errors. The output signal is a modulated version of the input signal that has been corrected using the adaptive signal to mitigate the one or more modulation errors.