Abstract: This invention provides a method for making a semiconductor package with stacked dies that eliminates fracturing of the upper die(s) during the wire bonding process. One embodiment of the method includes the provision of a substrate and pair of semiconductor dies, each having opposite top and bottom surfaces and a plurality of wire bonding pads around the peripheries of their respective top surfaces. One die is attached and wire bonded to a top surface of the substrate. A measured quantity of an uncured, fluid adhesive is dispensed onto the top surface of the first die, and the adhesive is squeezed toward the edges of the dies by pressing the bottom surface of the second die down onto the adhesive until the two dies are separated by a layer of the adhesive. The adhesive is cured, the second die is then wire bonded to the substrate, and the dies are then molded over with an encapsulant.

Abstract: An image sensor package includes an image sensor having an upper surface with an active area and bond pads formed thereon. A noncritical region of the upper surface is between the active area and the bond pads. A window overlies the active area and is supported on the noncritical region by a window support. The window, window support and image sensor define a sealed cavity and the active area is located within the cavity. In particular, the active area is located within the cavity, which is sealed to protect the active area against external moisture, dust and contamination.

Abstract: A ball grid array (BAG) package includes a substrate having a central aperture. Traces are coupled to a lower surface of the substrate. First ends of the traces support an electronic component in the central aperture. Interconnection balls are formed on second ends of the traces. The interconnection balls extend from the second ends of the traces, through the substrate, and protrude above a second surface of the substrate.

Abstract: An image sensor package includes a molding having a locking feature. The package further includes a snap lid having a tab, where the tab is attached to the locking feature of the molding. To form the image sensor package, a window is placed in a pocket of the molding. The snap lid is secured in place. Once secured, the snap lid presses against a peripheral region of an exterior surface of the window. The window is sandwiched between the molding and the snap lid and held in place.

Abstract: A plurality of integrated circuit chip (IC chip) packages are fabricated simultaneously from a single insulating substrate having sections. In each section, an IC chip is attached. Bonding pads on the IC chip are electrically connected to first metallizations on a substrate first surface. The first metallizations, IC chip including bonding pads and first substrate surface are then encapsulated. Interconnection balls or pads are formed at substrate bonding locations on a substrate second surface, the interconnection pads or balls being electrically connected to corresponding first metallizations. The substrate and encapsulant are then cut along the periphery of each section to form the plurality of IC chip packages.

Abstract: Stackable integrated circuit packages with pin and barrel interconnects are disclosed, along with methods of making such packages. In an exemplary embodiment, a package includes a molded plastic body, metal coated barrels on an upper side of the body, and metal coated pins on a lower side of the body. The pins are arranged coaxial with respective barrels. An integrated circuit is mounted on the upper side of the body. Metal traces electrically couple the integrated circuit to the barrels. Vias through the body electrically connect the metal coated barrels to respective metal coated pins. Two or more packages may be stacked and electrically coupled together by inserting the pins of a top package into the barrels of a lower package. The pins of the lower package may be soldered to a conventional printed circuit board, or may be mounted on a mounting substrate including corresponding metal coated barrels.

Abstract: This invention provides a method for making a semiconductor package with stacked dies that eliminates fracturing of the upper die(s) during the wire bonding process. One embodiment of the method includes the provision of a substrate and pair of semiconductor dies, each having opposite top and bottom surfaces and a plurality of wire bonding pads around the peripheries of their respective top surfaces. One die is attached and wire bonded to a top surface of the substrate. A measured quantity of an uncured, fluid adhesive is dispensed onto the top surface of the first die, and the adhesive is squeezed toward the edges of the dies by pressing the bottom surface of the second die down onto the adhesive until the two dies are separated by a layer of the adhesive. The adhesive is cured, the second die is then wire bonded to the substrate, and the dies are then molded over with an encapsulant.

Abstract: A package for a device includes a substrate having a common voltage plane and a mounting region. The device is mounted to the mounting region. An electrically conductive dam structure is disposed on the upper surface of the substrate circumscribing the perimeter of the mounting region. The electrically conductive dam structure is coupled to the common voltage plane. An electrically insulating encapsulant at least partially fills the pocket defined by the substrate and the electrically conductive dam structure. The electrically insulating encapsulant contacts the electrically conductive dam structure. An electrically conductive encapsulant overlies the electrically insulating encapsulant and is coupled to the electrically conductive dam structure.

Abstract: Packages for an integrated circuit die and methods and leadframes for making such packages are disclosed. The package includes a die, a die pad, peripheral metal contacts, bond wires, and an encapsulant. The die pad and contacts are located at a lower surface of the package. The die pad and the contacts have side surfaces which include reentrant portions and asperities to engage the encapsulant.

Abstract: A method and apparatus for protecting hypersensitive microcircuits on the face of a semiconductor wafer from contamination and mechanical damage during die sawing and subsequent die handling operations include the provision of a plastic sheet having an array of protective domes formed into it, the array corresponding to the array of microcircuits on the wafer, and the temporary adhesion of the sheet to the face of the wafer such that each die in the wafer is covered by a respective one of the domes, with an associated one of the microcircuits protectively sealed therein. Die sawing is performed with the component side of the wafer facing up, the cut passing between the domes and through the thicknesses of both the domed sheet and the wafer such that each die is separated from the wafer, with a corresponding one other domes still attached to it. The domes may be removed later when the dies are located in a more benign environment by simply peeling them off the die.

Abstract: Packages for an integrated circuit die and methods and leadframes for making such packages are disclosed. The package includes a die, a die pad, peripheral metal contacts, bond wires, and an encapsulant. The die pad and contacts are located at a lower surface of the package. The die pad and the contacts have side surfaces which include reentrant portions and asperities to engage the encapsulant.

Abstract: A micromirror device package includes a micromirror device chip having a micromirror device area on an upper surface of the micromirror device chip. A window is mounted above the micromirror device area and to the upper surface of the micromirror device chip by a bead. By forming the window of borosilicate glass and the bead of solder glass, the micromirror device area is hermetically sealed. In this manner, corrosion and contamination of the micromirror device area is prevented.

Abstract: Methods for making packages and leadframes are enclosed. The package includes a die, a die pad, leads, bond wires, and an encapsulant. The lower surfaces of the die pad and leads are provided with a stepped profile by an etching step that etches partially through the thickness of a peripheral portion of the die pad, and also etches partially through the thickness of portions of the leads. Encapsulant material is applied by molding or liquid encapsulation techniques. The encapsulant material fills in beneath the recessed, substantially horizontal surfaces of the die pad and leads formed by the above-described partial etching step, and thereby prevents the die pad and leads from being pulled vertically from the package body. Other surface of the die pad and leads are not covered during the encapsulation step, but rather remain exposed at the lower surface of the package for connecting the package externally.

Abstract: A die mounting apparatus that includes: 1) a die including a bottom surface having an active region is located among the bottom surface and a first and second bond pads provided on the bottom surface outside of the active region; 2) a substrate including a top surface and protruding electrical contacts that are electrically coupled to the first and second bond pads; and 3) a first encapsulant circumscribing a periphery of the die, where the first encapsulant, the bottom surface of the die, and the top surface of the substrate define a free space. The first encapsulant extends inwards from the periphery of the die towards the active region but does not contact the active region. Advantageously, the first encapsulant forms a seal around the die to protect its active region from the environment. A further advantage is that the first encapsulant provides added security that bond pads of the die will remain in contact with contacts formed among the substrate even after distortion of the shape of the die.

Abstract: Disclosed herein are semiconductor packages and stacks thereof. An example package includes an insulative substrate having a first surface, first apertures, a second aperture, and circuit traces on the first surface. A first portion of each circuit trace overlies a first aperture and an end of the circuit trace is near the second aperture. A solder ball is in each first aperture, fused to the overlying circuit trace. A semiconductor die is in the second aperture and is electrically connected to the ends of the traces. A third aperture may extend through the first portion of each circuit trace. A second package can be stacked on a first package. Solder balls of the second package each fuse with an underlying solder ball of the first package through a third aperture of the first package. The dies of the stacked packages may be positioned for optical communication with each other.

Abstract: A method for forming a snapable multi-package array substrate, snapable multi-package array and snapable packaged electronic components is disclosed. The snapable multi-package substrate is formed with trenches that separate and define sections where individual packaged electronic components are fabricated in a snapable multi-package array, and where individual packaged electronic components are singulated from the snapable multi-package array of the invention by simply applying hand pressure to break or “snap” individual packaged electronic components apart.

Abstract: A structure includes a substrate such as a wafer or an array of packages. The substrate has a front-side surface and a back-side surface. A reference feature such as a scribe grid is on the front-side surface. In at least one alignment mark is on the back-side surface, the alignment mark having a precise positional relationship to the reference feature on the front-side surface. The reference mark is used to cut the substrate from the back-side surface.

Abstract: An apparatus for mounting an electronic device on a substrate without soldering is disclosed. The apparatus includes a body and a plurality of cantilever beams extending from the body. The apparatus is mounted on the substrate. The electronic device is placed within the apparatus. In one embodiment, the cantilever beams press against the electronic device. In another embodiment, the cantilever beams engage the substrate. The apparatus presses an array of electrical contacts of the electronic device (e.g., interconnection balls) against corresponding metal pads of the substrate, thereby forming an electrical connection.

Abstract: Packages for an integrated circuit die and methods and leadframes for making such packages are disclosed. The package includes a die, a die pad, peripheral metal contacts,.bond wires, and an encapsulant. The die pad and contacts are located at a lower surface of the package. The die pad and the contacts have side surfaces which include reentrant portions and asperities to engage the encapsulant.

Abstract: Packages for an integrated circuit die and methods and leadframes for making such packages are disclosed. The package includes a die, a die pad, peripheral metal contacts, bond wires, and an encapsulant. The die pad and contacts are located at a lower surface of the package. The die pad and the contacts have side surfaces which include reentrant portions and asperities to engage the encapsulant. A method of making a package includes providing a metal leadframe having a die pad in a rectangular frame. Tabs extend from the frame toward the die pad. The die pad and tabs have side surfaces with reentrant portions and asperities. A die is attached to the die pad. The die is electrically connected to the tabs. An encapsulant is applied to the upper and side surfaces of the leadframe. Finally, the leadframe is cut in situ so that the die pad and tabs are severed from the frame, the sides of the package are formed, and the package is severed from the leadframe.