Abstract: Package embodiments for integrated circuits or other electronic devices are disclosed, along with methods of making and interconnecting the packages. The packages include a package body formed of molded encapsulant. Leads extend from a first end that is embedded at a lower surface of the package body second end that is outside the package body. The leads are bent up the sides of the package and over the top surface of the package. The packages have mounting keys so that a plurality of packages may be precisely stacked one on top of the other. Abutting leads of the stacked packages may be electrically interconnected. The packages also may be placed next to each other so that their leads abut and may be electrically interconnected.

Abstract: A method includes identifying and determining a position of a scribe grid on a front-side surface of a wafer with a camera. Based on this information, a laser is fired to form an alignment mark on the back-side surface of the wafer. Advantageously, the alignment mark is positioned with respect to the scribe grid to within tight tolerance. The wafer is then cut from the backside surface using the alignment mark as a reference. Of importance, the wafer is cut from the back-side surface thus protecting the front-side surface of the wafer. Of further importance, the wafer is precisely cut such that the scribe line is not fabricated with the extra large width of scribe lines of conventional wafers designed to be cut from the back-side surface.

Abstract: A wafer-level method for mass production of surface-mounting, chip-size (“CS”) ball grid array (“BGA”), land grid array (“LGA”), and lead-less chip carrier (“LCC”) semiconductor packages includes the wire-bond or flip-chip attachment of ceramic substrates to the active surface of corresponding chips while they are still integral to a semiconductor wafer, thereby reducing manufacturing costs of the packages relative to that of individually packaged chips. The substrates have a thermal coefficient of expansion (TCE) closely matching that of the underlying chip.

Abstract: Packages for an integrated circuit device and methods and leadframes for making such packages are disclosed. The package includes a die, a die pad, leads, bond wires, and an encapsulant. The lower surfaces of the die pad and leads are provided with a stepped profile by an etching step that etches partially through the thickness of a peripheral portion of the die pad, and also etches partially through the thickness of portions of the leads. Encapsulant material fills in beneath the recessed, substantially horizontal surfaces of the die pad and leads formed by the above-described etching step, and thereby prevents the die pad and leads from being pulled vertically from the package body. Other portions of the die pad and leads are exposed at the lower surface of the package for connecting the package externally. A metal leadframe for making an encapsulated package includes an outer frame. A die pad is within and connected to the frame.

Abstract: A package for an integrated circuit device having an optical cell is disclosed. A method of making the package also is disclosed. The package includes a base of molded encapsulant material. A metal leadframe is embedded in the plastic base at the upper surface of the base. Encapsulant material covers the lower and side surfaces of the die pad and the leads of the leadframe, but does not cover the upper surfaces of the die pad and leads. The side surfaces of the die pad and leads have locking features for engaging the encapsulant material. An optical integrated circuit device is attached to the exposed surface of the die pad. An adhesive bead is applied around the optical device on the exposed upper surface of the leads. An optically clear cover is placed on and, in some embodiments, pressed into the still-viscous adhesive bead. When hardened, the bead supports the cover above the optical device.

Abstract: A package for an integrated circuit device having an optical cell is disclosed. A method of making the package also is disclosed. The package includes a base of molded encapsulant material. A metal leadframe is embedded in the plastic base at the upper surface of the base. Encapsulant material covers the lower and side surfaces of the die pad and the leads of the leadframe, but does not cover the upper surfaces of the die pad and leads. The side surfaces of the die pad and leads have locking features for engaging the encapsulant material. An optical integrated circuit device is attached to the exposed surface of the die pad. An adhesive bead is applied around the optical device on the exposed upper surface of the leads. An optically clear cover is placed on and, in some embodiments, pressed into the still-viscous adhesive bead. When hardened, the bead supports the cover above the optical device.

Abstract: A package for an integrated circuit is described, as are methods of making the package. The package includes a substrate having a generally planar first surface on which a metal die pad is formed. An integrated circuit die is attached to the metal die pad. An adhesive head surrounds the integrated circuit die and covers the exposed periphery of the metal die pad. A generally planar lid is in a press-fitted interconnection with the bead. An adhesive material covers conductive structures on the die, such as bonding pads, to prevent corrosion. Optionally, the package has vertical peripheral sides. The methods of making the package include methods for making packages individually, or making a plurality of packages simultaneously. Where a plurality of packages are made simultaneously, integrated circuit die are placed on each of a plurality of physically-joined package substrates on a generally planar sheet of substrate material. An adhesive bead is applied around each die.

Abstract: Image sensor packages are fabricated simultaneously to minimize the cost associated with each individual image sensor package. To fabricate the image sensor packages, windows are molded in molding compound to form a molded window array. A substrate includes a plurality of individual substrates integrally connected together in an array format. Image sensors are attached and electrically connected to corresponding individual substrates. An adhesive layer attaches the molded window array to the substrate. The substrate and attached molded window array are singulated into a plurality of individual image sensor packages.

Abstract: Methods for forming packages for housing an integrated circuit device are disclosed. In one embodiment, step 1 provides a plastic sheet having an adhesive first surface. Step 2 provides a patterned metal sheet on the first surface of the plastic sheet. The patterned metal sheet includes an array of package sites. Each package site is formed to include a die pad and a plurality of leads around the die pad. Step 3 places an integrated circuit device on each of the die pads. Step 4 connects a conductor between the integrated circuit device and the leads of the respective package site. Step 5 applies an encapsulating material onto the array. Step 6 hardens the encapsulating material. Step 7 removes the first plastic sheet. Step 8 applies solder balls to the exposed surfaces of the leads. Finally, step 9 separates individual packages from the encapsulated array.

Abstract: A package includes a substrate mechanically supporting circuitry. A conductive cover (e.g., a metal sheet) is over the circuitry so that the circuitry is exposed below an opening in the conductive cover. A bent down corner of the conductive cover is inserted into a hole in the substrate. A solder ball is placed on the other end of the hole. During a subsequent heating, the solder ball is drawn up through the hole. When cooled, the conductive material grasps onto the tip of the bent down corner, thereby establishing a good connection between the conductive cover and the newly formed conductive via. As a finger approaches the circuitry (e.g., a fingerprint detection circuit), the finger first discharges electrostatic charge into the cover, not into the circuit, thereby protecting the circuit. In another package, the cover is composed of a highly resistive material, to slowly dissipate the electrostatic charge.

Abstract: A plurality of integrated circuit chip (IC chip) packages are fabricated simultaneously from a single insulating substrate having sections. In each section, an IC chip is attached. Bonding pads on the IC chip are electrically connected to first metallizations on a substrate first surface. The first metallizations, IC chip including bonding pads and first substrate surface are then encapsulated. Interconnection balls or pads are formed at substrate bonding locations on a substrate second surface, the interconnection pads or balls being electrically connected to corresponding first metallizations. The substrate and encapsulant are then cut along the periphery of each section to form the plurality of IC chip packages.

Abstract: To fabricate a flip-chip micromachine package, a micromachine chip is mounted as a flip chip to a substrate. The micromachine chip is attached such that a micromachine area on a first surface of the micromachine chip faces the substrate. A limited flow liquid encapsulant is dispensed around the micromachine chip and cured to form a package body. The micromachine chip, the package body, and the substrate define a sealed cavity. The micromachine area is located within the sealed cavity and protected from the ambient environment.

Abstract: A shielded package for an IC chip having bond pads thereon includes an insulating substrate having metallizations formed on a surface of the substrate. The IC chip is mounted to the substrate surface and the IC chip bonding pads are electrically coupled to corresponding substrate metallizations. An insulating encapsulant layer encapsulates the IC chip and the substrate surface. A conductive shield layer comprising a cured flowable electrically conductive material is formed above the encapsulant layer.The encapsulant layer electrically isolates the shield layer from the IC chip and the various electrical conductors (e.g. bonding pads, bond wires, contacts and metallizations). The shield layer, being an electrically conductive material, forms a floating ground plane which shields the IC chip and the remainder of the package.

Abstract: A method of making an integrated circuit package for EPROM, CCD, and other optical integrated circuit devices is disclosed. First, a substrate base having metallized vias extending there through is provided. Second, an integrated circuit die is affixed to a first surface of the substrate, and is electrically connected to the metallized vias. Third, a bead of a viscous adhesive material is applied onto the substrate around the device. The bead covers the side surfaces of the device, the periphery of the upper first surface of the device, and the bond wires. The bead and the upper first surface of the die form a cavity above the die. Fourth, a layer of a transparent encapsulating material is deposited onto the die, within the cavity formed by the bead. Fifth, the encapsulating material is hardened, and subsequently forms an exterior surface of the package. The transparent encapsulating material allows light to illuminate the light sensitive circuitry of the device.

Abstract: Packages for an integrated circuit die and methods and leadframes for making such packages are disclosed. The package includes a die, a die pad, peripheral metal contacts, bond wires, and an encapsulant. The die pad and contacts are located at a lower surface of the package. The die pad and the contacts have side surfaces which include reentrant portions and asperities to engage the encapsulant.A method of making a package includes providing a metal leadframe having a die pad in a rectangular frame. Tabs extend from the frame toward the die pad. The die pad and tabs have side surfaces with reentrant portions and asperities. A die is attached to the die pad. The die is electrically connected to the tabs. An encapsulant is applied to the upper and side surfaces of the leadframe. Finally, the leadframe is cut in situ so that the die pad and tabs are severed from the frame, the sides of the package are formed, and the package is severed from the leadframe.

Abstract: A package for an integrated circuit is described, as are methods of making the package. The package includes a substrate having a generally planar first surface on which a metal die pad is formed. An integrated circuit die is attached to the metal die pad. An adhesive head surrounds the integrated circuit die and covers the exposed periphery of the metal die pad. A generally planar lid is in a press-fitted interconnection with the bead. An adhesive material covers conductive structures on the die, such as bonding pads, to prevent corrosion. Optionally, the package has vertical peripheral sides. The methods of making the package include methods for making packages individually, or making a plurality of packages simultaneously. Where a plurality of packages are made simultaneously, integrated circuit die are placed on each of a plurality of physically-joined package substrates on a generally planar sheet of substrate material. An adhesive bead is applied around each die.

Abstract: A method and apparatus for mounting an optical sensor to, and in optical alignment with, a lens or other imaging-forming element of an optical device includes attaching a fixture to the lens, the fixture having mounting features located thereon at predetermined positions measured relative to the focal plane of the lens, the optical axis of the lens, and the horizontal and vertical axes of a scene imaged by the lens. The absolute locations of the plane, the center, and the horizontal and vertical axes of the sensor array are found within and independently of the sensor package using automated optical pattern recognition apparatus. Using numerically controlled apparatus, complementary mounting features are then milled into the sensor package at positions measured relative to the absolute locations of the sensor features found by the pattern recognition equipment that correspond to the predetermined positions of the mounting features on the fixture measured relative to the optical features of the lens.

Abstract: A package for a device includes a substrate having a common voltage plane and a mounting region. The device is mounted to the mounting region. An electrically conductive dam structure is disposed on the upper surface of the substrate circumscribing the perimeter of the mounting region. The electrically conductive dam structure is coupled to the common voltage plane. An electrically insulating encapsulant at least partially fills the pocket defined by the substrate and the electrically conductive dam structure. The electrically insulating encapsulant contacts the electrically conductive dam structure. An electrically conductive encapsulant overlies the electrically insulating encapsulant and is coupled to the electrically conductive dam structure.

Abstract: A package for an integrated circuit is described, as is a method of making the package. The package is comprised of a substrate having a substantially planar first surface on which an integrated circuit die is placed. An imperforate adhesive bead on the first surface of the substrate surrounds the die. A lid transparent to electromagnetic radiation such as ultraviolet light is spaced above the integrated circuit, in a press-fitted interconnection with the bead. Epoxy is a preferred material for the bead. The lid is a single-piece of flat material, such as plastic, ceramic, or glass, which can have a diagonal edge.

Abstract: A plurality of integrated circuit chip (IC chip) packages are fabricated simultaneously from a single insulating substrate having sections. In each section, an IC chip is attached. Bonding pads on the IC chip are electrically connected to first metallizations on a substrate first surface. The first metallizations, IC chip including bonding pads and first substrate surface are then encapsulated. Interconnection balls or pads are formed at substrate bonding locations on a substrate second surface, the interconnection pads or balls being electrically connected to corresponding first metallizations. The substrate and encapsulant are then cut along the periphery of each section to form the plurality of IC chip packages.