Patents by Inventor Ting AN
Ting AN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11990510Abstract: A semiconductor device, includes a channel region, and a source/drain region adjacent to the channel region. The source/drain region includes a first epitaxial layer, a second epitaxial layer epitaxially formed on the first epitaxial layer and a third epitaxial layer epitaxially formed on the second epitaxial layer, and the first epitaxial layer is made of SiAs.Type: GrantFiled: July 26, 2021Date of Patent: May 21, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng-Yi Peng, Ting Tsai, Chung-Wei Hung, Jung-Ting Chen, Ying-Hua Lai, Song-Bor Lee, Bor-Zen Tien
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Patent number: 11991479Abstract: The disclosure provides a time-lapse photographic device. The time-lapse photographic device includes a camera module, a drive module, an environment detection module, and a control unit. The drive module is connected to the camera module to drive the camera module to rotate. The environment detection module is configured to detect an external environment of the time-lapse photographic device to generate an environment detection signal. The control unit is electrically connected to the camera module, the drive module, and the environment detection module. The control unit generates, according to a shooting stop parameter, a plurality of intermittent drive signals to control the drive module, and controls the camera module to shoot at intervals of the drive signals. The control unit adjusts operation of at least one of the camera module and the drive module according to the environment detection signal.Type: GrantFiled: February 15, 2022Date of Patent: May 21, 2024Assignee: ASUSTEK COMPUTER INC.Inventors: Hsin-Yi Pu, Kai-Yu Hsu, Lai-Peng Wong, Chieh Li, Ting-Han Chang, Ching-Xsuan Chen
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Patent number: 11989005Abstract: A system performs adaptive thermal ceiling control at runtime. The system includes computing circuits and a thermal management module. When detecting a runtime condition change that affects power consumption in the system, the thermal management module determines an adjustment to the thermal ceiling of a computing circuit, and increases the thermal ceiling of the computing circuit according to the adjustment.Type: GrantFiled: September 30, 2021Date of Patent: May 21, 2024Assignee: MediaTek Inc.Inventors: Bo-Jr Huang, Jia-Wei Fang, Jia-Ming Chen, Ya-Ting Chang, Chien-Yuan Lai, Cheng-Yuh Wu, Yi-Pin Lin, Wen-Wen Hsieh, Min-Shu Wang
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Patent number: 11991882Abstract: A method for fabricating a memory device includes: providing a substrate; forming a first dielectric layer over the substrate; forming a plurality of conductive layers and a plurality of dielectric layers alternately and horizontally disposed on the substrate; forming a channel column structure on the substrate and in the plurality of conductive layers and the plurality of dielectric layers, where a side wall of the channel column structure is in contact with the plurality of conductive layers; forming a second dielectric layer covering the first dielectric layer; and forming, in the first and second dielectric layers, a conductive column structure adjacent to the channel column structure and in contact with one of the plurality of conductive layers, where the conductive column structure includes a liner insulating layer as a shell layer.Type: GrantFiled: November 16, 2021Date of Patent: May 21, 2024Assignee: MACRONIX International Co., Ltd.Inventors: Yao-An Chung, Yuan-Chieh Chiu, Ting-Feng Liao, Kuang-Wen Liu, Kuang-Chao Chen
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Patent number: 11990400Abstract: Some embodiments relate to a method for forming an integrated chip, the method includes forming a first conductive wire and a second conductive wire over a substrate. A dielectric structure is formed laterally between the first conductive wire and the second conductive wire. The dielectric structure comprises a first dielectric liner, a dielectric layer disposed between opposing sidewalls of the first dielectric liner, and a void between an upper surface of the first dielectric liner and a lower surface of the dielectric layer. A dielectric capping layer is formed along an upper surface of the dielectric structure. Sidewalls of the dielectric capping layer are aligned with sidewalls of the dielectric structure.Type: GrantFiled: June 1, 2022Date of Patent: May 21, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Ya Lo, Chi-Lin Teng, Hai-Ching Chen, Hsin-Yen Huang, Shau-Lin Shue, Shao-Kuan Lee, Cheng-Chin Lee
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Patent number: 11991827Abstract: An electronic device is disclosed. The electronic device includes a system board and a first set of electronic devices disposed over the system board. Each of the first set of electronic devices comprises a processing unit and a carrier carrying the processing unit. The electronic device also includes a first interconnection structure electrically connected with the processing unit through the carrier and configured to receive a first power from a first power supply unit and to transmit the first power to the processing unit.Type: GrantFiled: October 14, 2022Date of Patent: May 21, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chun-Yen Ting, Pao-Nan Lee, Hung-Chun Kuo, Jung Jui Kang, Chang Chi Lee
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Patent number: 11990522Abstract: A semiconductor structure includes a substrate and a semiconductor channel layer over the substrate. The semiconductor structure includes a high-k gate dielectric layer over the semiconductor channel layer, a work function metal layer over the high-k gate dielectric layer, and a bulk metal layer over the work function metal layer. The work function metal layer includes a first portion and a second portion over the first portion. Both the first portion and the second portion are conductive. Materials included in the second portion are also included in the first portion. The first portion is doped with silicon at a first dopant concentration, and the second portion is not doped with silicon or is doped with silicon at a second dopant concentration lower than the first dopant concentration.Type: GrantFiled: December 9, 2022Date of Patent: May 21, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yen-Tien Tung, Szu-Wei Huang, Zhi-Ren Xiao, Yin-Chuan Chuang, Yung-Chien Huang, Kuan-Ting Liu, Tzer-Min Shen, Chung-Wei Wu, Zhiqiang Wu
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Patent number: 11986013Abstract: A paper hookah hose includes a bendable tube, a smoking mouth and a connecting tube. The bendable tube is a tubular member made of paper and having at least two layers and a spiral structure. The bendable tube has a section of bellows for bending. The bendable tube may be a full bellows or a combination of a bellows and a straight tube. The smoking mouth and the connecting tube are completely made of traditional pulp.Type: GrantFiled: April 29, 2021Date of Patent: May 21, 2024Inventor: Yu-Ting Hsu
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Patent number: 11990351Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.Type: GrantFiled: March 26, 2021Date of Patent: May 21, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih, Ting-Yu Yeh, Chen-Hsuan Tsai
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Patent number: 11990374Abstract: Embodiments of the present disclosure provide a method of forming sidewall spacers by filling a trench between a hybrid fin and a semiconductor fin structure. The sidewall spacer includes two fin sidewall spacer portions connected by a gate sidewall spacer portion. The fin sidewall spacer portion has a substantially uniform profile to provide uniform protection for vertically stacked channel layers and eliminate any gaps and leaks between inner spacers and sidewall spacers.Type: GrantFiled: December 19, 2022Date of Patent: May 21, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kuan-Ting Pan, Kuo-Cheng Chiang, Shi Ning Ju, Yi-Ruei Jhan, Kuan-Lun Cheng, Chih-Hao Wang
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Patent number: 11986238Abstract: A non-puncturing microwave ablation antenna, including an irradiator located at a front end of the antenna and an irradiator cover sleeved on the irradiator, where a front end of the irradiator cover is blunt. Because the front end of the irradiator cover is designed to be blunt, the special non-puncturing appearance of the irradiator cover enables the antenna to freely penetrate inside the lung tissue without puncturing blood vessels and bronchi in the lungs. In addition, blood vessels of tumor existing in the Ground-Glass Opacity (GGO) would not be damaged by the blunt head and bleed, thereby reducing a rate of surgery failure caused by that a lesion cannot be identified because of bleeding inside the lung, and in addition, avoiding a possibility that tumor cells spread through a puncturing passage or bleeding blood vessels.Type: GrantFiled: March 12, 2019Date of Patent: May 21, 2024Assignee: MIMA-PRO (NAN TONG ) SCIENTIFIC INCInventors: Jiachang Chi, Bo Zhai, Peng Zhang, Ting Yang
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Patent number: 11991196Abstract: Autoencoder-based anomaly detection methods have been used in identifying anomalous users from large-scale enterprise logs with the assumption that adversarial activities do not follow past habitual patterns. Most existing approaches typically build models by reconstructing single-day and individual-user behaviors. However, without capturing long-term signals and group-correlation signals, the models cannot identify low-signal yet long-lasting threats, and will incorrectly report many normal users as anomalies on busy days, which, in turn, leads to a high false positive rate. A method is provided based on compound behavior, which takes into consideration long-term patterns and group behaviors. The provided method leverages a novel behavior representation and an ensemble of deep autoencoders and produces an ordered investigation list.Type: GrantFiled: March 3, 2022Date of Patent: May 21, 2024Assignee: QATAR FOUNDATION FOR EDUCATION, SCIENCE AND COMMUNITY DEVELOPMENTInventors: Issa M. Khalil, Ting Yu, Eui J. Choo, Lun-Pin Yuan, Sencun Zhu
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Patent number: 11990906Abstract: Disclosed is an electronic device including a tunable element, a first power supply circuit, and a second power supply circuit. The first power supply circuit and the second power supply circuit are electrically connected to the tunable element. The first power supply circuit drives the tunable element during a first time period. The second power supply circuit drives the tunable element during a second time period.Type: GrantFiled: September 15, 2022Date of Patent: May 21, 2024Assignee: Innolux CorporationInventors: Yi-Hung Lin, Chung-Le Chen, Shuo-Ting Hong, Yu-Ti Huang, Yu-Hsiang Chiu, Nai-Fang Hsu
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Publication number: 20240161660Abstract: A display device and a housing of the display device are provided. The housing of the display device includes a reflective cover. The reflective cover has a plurality of segments formed on a front side of the reflective cover and a plurality of segment structures correspondingly formed on a rear side of the reflective cover. At least one of the segment structures has a notch formed thereat. Positions of the notches of the at least two adjacent ones of the segment structures are not opposite to each other.Type: ApplicationFiled: November 15, 2023Publication date: May 16, 2024Inventors: CHENG-YAN HSIEH, SHIH-YUAN KUO, Jie-Ting Tsai
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Publication number: 20240156283Abstract: A folding room divider may include at least two divider panels, a plurality of connectors, and at least an anti-pinch plate. Each of the divider panels is connected to a frame at outer edges thereof, and the connectors are positioned on the frame so as to enable the anti-pinch plate to connect to the frame. The two divider panels are pivotally connected through the anti-pinch plate to achieve the anti-pinch effect for the folding room divider.Type: ApplicationFiled: November 11, 2022Publication date: May 16, 2024Applicant: KADEYA ENTERPRISE CO., LTD.Inventor: Ting-Yu Lai
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Publication number: 20240161293Abstract: A multi-label classification method for generating labels annotated on medical images. An initial dataset including medical images and partial input labels is obtained. The partial input labels annotate a labeled part of abnormal features on the medical images. A first multi-label classification model is trained with the initial dataset. Difficulty levels of the medical images in the initial dataset are estimated based on predictions generated by the first multi-label classification model. The initial dataset is divided based on the difficulty levels of the medical images into different subsets. A second multi-label classification model is trained based on subsets with gradually increasing difficulty levels during different curriculum learning rounds. Predicted labels annotated on the medical images are generated about each of the abnormal features based on the second multi-label classification model.Type: ApplicationFiled: November 16, 2023Publication date: May 16, 2024Inventors: Zhe-Ting LIAO, Yu-Shao PENG
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Publication number: 20240160815Abstract: Embodiments of the present disclosure provide a method, system, and storage medium for predicting an area of oil spill on sea surface, the method for predicting the area of oil spill on sea surface includes: S1, obtaining a training dataset; S2, constructing an oil spill numerical model, and determining a predictive model by performing a predetermined processing on an initial predictive model based on simulation result data and the training dataset; S3, initializing the predictive model, determining a count of nodes of an input layer, an output layer, and a hidden layer; and S4, obtaining input data and inputting the input data into the predictive model in S2 to obtain an oil spill area on sea surface to be measured. The method, when used, has a small error and high accuracy, can save a lot of material and financial resources, and can be more widely used in real life.Type: ApplicationFiled: November 15, 2023Publication date: May 16, 2024Applicant: CHANGZHOU UNIVERSITYInventors: Hong JI, Ting WANG, Ke YANG, Yaxin WANG, Jie GUO
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Publication number: 20240162150Abstract: A method of manufacturing a semiconductor device, including: forming a plurality of gate strips, wherein each gate strip is arranged to be a gate terminal of a transistor; forming a plurality of first metal strips above the plurality of gate strips; and forming a plurality of second metal strips above the plurality of first metal strips, wherein the plurality of second metal strips are co-planar, and each second metal strip and one of the first metal strips are crisscrossed from top view; wherein a length between two adjacent gate strips is twice as a length between two adjacent second metal strips, and a length of said one of the first metal strips is smaller than two and a half times as the length between two adjacent gate strips.Type: ApplicationFiled: January 25, 2024Publication date: May 16, 2024Inventors: SHIH-WEI PENG, HUI-TING YANG, WEI-CHENG LIN, JIANN-TYNG TZENG
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Publication number: 20240162083Abstract: The present disclosure relates to a method for forming a semiconductor device includes forming an opening between first and second sidewalls of respective first and second terminals. The first and second sidewalls oppose each other. The method further includes depositing a first dielectric material at a first deposition rate on top portions of the opening and depositing a second dielectric material at a second deposition rate on the first dielectric material and on the first and second sidewalls. The second dielectric material and the first and second sidewalls entrap a pocket of air. The method also includes performing a treatment process on the second dielectric material.Type: ApplicationFiled: January 24, 2024Publication date: May 16, 2024Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shuen-Shin LIANG, Chen-Han WANG, Keng-Chu LIN, Tetsuji UENO, Ting-Ting CHEN
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Publication number: 20240162084Abstract: A method for manufacturing a semiconductor structure includes preparing a dielectric structure formed with trenches respectively defined by lateral surfaces of the dielectric structure, forming spacer layers on the lateral surfaces, filling an electrically conductive material into the trenches to form electrically conductive features, selectively depositing a blocking layer on the dielectric structure, selectively depositing a dielectric material on the electrically conductive features to form a capping layer, removing the blocking layer and the dielectric structure to form recesses, forming sacrificial features in the recesses, forming a sustaining layer to cover the sacrificial features; and removing the sacrificial features to obtain the semiconductor structure formed with air gaps confined by the sustaining layer and the spacer layers.Type: ApplicationFiled: January 26, 2024Publication date: May 16, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsin-Yen HUANG, Ting-Ya LO, Shao-Kuan LEE, Chi-Lin TENG, Cheng-Chin LEE, Shau-Lin SHUE, Hsiao-Kang CHANG